blob: e2c2d9f3edb5ef798916024e5188970a5cd6624e [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/version.h>
30#include <linux/init.h>
31#include <linux/pci.h>
32#include <linux/dma-mapping.h>
33#include <linux/delay.h>
34#include <linux/skbuff.h>
35#include <linux/netdevice.h>
36#include <linux/wireless.h>
37#include <net/mac80211.h>
Zhu Yib481de92007-09-25 17:54:57 -070038#include <linux/etherdevice.h>
Zhu Yi12342c42007-12-20 11:27:32 +080039#include <asm/unaligned.h>
Zhu Yib481de92007-09-25 17:54:57 -070040
Assaf Krauss6bc913b2008-03-11 16:17:18 -070041#include "iwl-eeprom.h"
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070042#include "iwl-dev.h"
Tomas Winklerfee12472008-04-03 16:05:21 -070043#include "iwl-core.h"
Tomas Winkler3395f6e2008-03-25 16:33:37 -070044#include "iwl-io.h"
Zhu Yib481de92007-09-25 17:54:57 -070045#include "iwl-helpers.h"
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -070046#include "iwl-calib.h"
Tomas Winkler5083e562008-05-29 16:35:15 +080047#include "iwl-sta.h"
Zhu Yib481de92007-09-25 17:54:57 -070048
Assaf Krauss1ea87392008-03-18 14:57:50 -070049/* module parameters */
50static struct iwl_mod_params iwl4965_mod_params = {
Emmanuel Grumbach038669e2008-04-23 17:15:04 -070051 .num_of_queues = IWL49_NUM_QUEUES,
Assaf Krauss1ea87392008-03-18 14:57:50 -070052 .enable_qos = 1,
53 .amsdu_size_8K = 1,
Ester Kummer3a1081e2008-05-06 11:05:14 +080054 .restart_fw = 1,
Assaf Krauss1ea87392008-03-18 14:57:50 -070055 /* the rest are 0 by default */
56};
57
Tomas Winkler57aab752008-04-14 21:16:03 -070058/* check contents of special bootstrap uCode SRAM */
59static int iwl4965_verify_bsm(struct iwl_priv *priv)
60{
61 __le32 *image = priv->ucode_boot.v_addr;
62 u32 len = priv->ucode_boot.len;
63 u32 reg;
64 u32 val;
65
66 IWL_DEBUG_INFO("Begin verify bsm\n");
67
68 /* verify BSM SRAM contents */
69 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
70 for (reg = BSM_SRAM_LOWER_BOUND;
71 reg < BSM_SRAM_LOWER_BOUND + len;
72 reg += sizeof(u32), image++) {
73 val = iwl_read_prph(priv, reg);
74 if (val != le32_to_cpu(*image)) {
75 IWL_ERROR("BSM uCode verification failed at "
76 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
77 BSM_SRAM_LOWER_BOUND,
78 reg - BSM_SRAM_LOWER_BOUND, len,
79 val, le32_to_cpu(*image));
80 return -EIO;
81 }
82 }
83
84 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
85
86 return 0;
87}
88
89/**
90 * iwl4965_load_bsm - Load bootstrap instructions
91 *
92 * BSM operation:
93 *
94 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
95 * in special SRAM that does not power down during RFKILL. When powering back
96 * up after power-saving sleeps (or during initial uCode load), the BSM loads
97 * the bootstrap program into the on-board processor, and starts it.
98 *
99 * The bootstrap program loads (via DMA) instructions and data for a new
100 * program from host DRAM locations indicated by the host driver in the
101 * BSM_DRAM_* registers. Once the new program is loaded, it starts
102 * automatically.
103 *
104 * When initializing the NIC, the host driver points the BSM to the
105 * "initialize" uCode image. This uCode sets up some internal data, then
106 * notifies host via "initialize alive" that it is complete.
107 *
108 * The host then replaces the BSM_DRAM_* pointer values to point to the
109 * normal runtime uCode instructions and a backup uCode data cache buffer
110 * (filled initially with starting data values for the on-board processor),
111 * then triggers the "initialize" uCode to load and launch the runtime uCode,
112 * which begins normal operation.
113 *
114 * When doing a power-save shutdown, runtime uCode saves data SRAM into
115 * the backup data cache in DRAM before SRAM is powered down.
116 *
117 * When powering back up, the BSM loads the bootstrap program. This reloads
118 * the runtime uCode instructions and the backup data cache into SRAM,
119 * and re-launches the runtime uCode from where it left off.
120 */
121static int iwl4965_load_bsm(struct iwl_priv *priv)
122{
123 __le32 *image = priv->ucode_boot.v_addr;
124 u32 len = priv->ucode_boot.len;
125 dma_addr_t pinst;
126 dma_addr_t pdata;
127 u32 inst_len;
128 u32 data_len;
129 int i;
130 u32 done;
131 u32 reg_offset;
132 int ret;
133
134 IWL_DEBUG_INFO("Begin load bsm\n");
135
Ron Rindjunskyfe9b6b72008-05-29 16:35:06 +0800136 priv->ucode_type = UCODE_RT;
137
Tomas Winkler57aab752008-04-14 21:16:03 -0700138 /* make sure bootstrap program is no larger than BSM's SRAM size */
139 if (len > IWL_MAX_BSM_SIZE)
140 return -EINVAL;
141
142 /* Tell bootstrap uCode where to find the "Initialize" uCode
143 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
Tomas Winkler2d878892008-05-29 16:34:51 +0800144 * NOTE: iwl_init_alive_start() will replace these values,
Tomas Winkler57aab752008-04-14 21:16:03 -0700145 * after the "initialize" uCode has run, to point to
Tomas Winkler2d878892008-05-29 16:34:51 +0800146 * runtime/protocol instructions and backup data cache.
147 */
Tomas Winkler57aab752008-04-14 21:16:03 -0700148 pinst = priv->ucode_init.p_addr >> 4;
149 pdata = priv->ucode_init_data.p_addr >> 4;
150 inst_len = priv->ucode_init.len;
151 data_len = priv->ucode_init_data.len;
152
153 ret = iwl_grab_nic_access(priv);
154 if (ret)
155 return ret;
156
157 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
158 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
159 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
160 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
161
162 /* Fill BSM memory with bootstrap instructions */
163 for (reg_offset = BSM_SRAM_LOWER_BOUND;
164 reg_offset < BSM_SRAM_LOWER_BOUND + len;
165 reg_offset += sizeof(u32), image++)
166 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
167
168 ret = iwl4965_verify_bsm(priv);
169 if (ret) {
170 iwl_release_nic_access(priv);
171 return ret;
172 }
173
174 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
175 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
176 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
177 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
178
179 /* Load bootstrap code into instruction SRAM now,
180 * to prepare to load "initialize" uCode */
181 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
182
183 /* Wait for load of bootstrap uCode to finish */
184 for (i = 0; i < 100; i++) {
185 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
186 if (!(done & BSM_WR_CTRL_REG_BIT_START))
187 break;
188 udelay(10);
189 }
190 if (i < 100)
191 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
192 else {
193 IWL_ERROR("BSM write did not complete!\n");
194 return -EIO;
195 }
196
197 /* Enable future boot loads whenever power management unit triggers it
198 * (e.g. when powering back up after power-save shutdown) */
199 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
200
201 iwl_release_nic_access(priv);
202
203 return 0;
204}
205
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800206/**
207 * iwl4965_set_ucode_ptrs - Set uCode address location
208 *
209 * Tell initialization uCode where to find runtime uCode.
210 *
211 * BSM registers initially contain pointers to initialization uCode.
212 * We need to replace them to load runtime uCode inst and data,
213 * and to save runtime data when powering down.
214 */
215static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
216{
217 dma_addr_t pinst;
218 dma_addr_t pdata;
219 unsigned long flags;
220 int ret = 0;
221
222 /* bits 35:4 for 4965 */
223 pinst = priv->ucode_code.p_addr >> 4;
224 pdata = priv->ucode_data_backup.p_addr >> 4;
225
226 spin_lock_irqsave(&priv->lock, flags);
227 ret = iwl_grab_nic_access(priv);
228 if (ret) {
229 spin_unlock_irqrestore(&priv->lock, flags);
230 return ret;
231 }
232
233 /* Tell bootstrap uCode where to find image to load */
234 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
235 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
236 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
237 priv->ucode_data.len);
238
239 /* Inst bytecount must be last to set up, bit 31 signals uCode
240 * that all new ptr/size info is in place */
241 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
242 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
243 iwl_release_nic_access(priv);
244
245 spin_unlock_irqrestore(&priv->lock, flags);
246
247 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
248
249 return ret;
250}
251
252/**
253 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
254 *
255 * Called after REPLY_ALIVE notification received from "initialize" uCode.
256 *
257 * The 4965 "initialize" ALIVE reply contains calibration data for:
258 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
259 * (3945 does not contain this data).
260 *
261 * Tell "initialize" uCode to go ahead and load the runtime uCode.
262*/
263static void iwl4965_init_alive_start(struct iwl_priv *priv)
264{
265 /* Check alive response for "valid" sign from uCode */
266 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
267 /* We had an error bringing up the hardware, so take it
268 * all the way back down so we can try again */
269 IWL_DEBUG_INFO("Initialize Alive failed.\n");
270 goto restart;
271 }
272
273 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
274 * This is a paranoid check, because we would not have gotten the
275 * "initialize" alive if code weren't properly loaded. */
276 if (iwl_verify_ucode(priv)) {
277 /* Runtime instruction load was bad;
278 * take it all the way back down so we can try again */
279 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
280 goto restart;
281 }
282
283 /* Calculate temperature */
284 priv->temperature = iwl4965_get_temperature(priv);
285
286 /* Send pointers to protocol/runtime uCode image ... init code will
287 * load and launch runtime uCode, which will send us another "Alive"
288 * notification. */
289 IWL_DEBUG_INFO("Initialization Alive received.\n");
290 if (iwl4965_set_ucode_ptrs(priv)) {
291 /* Runtime instruction load won't happen;
292 * take it all the way back down so we can try again */
293 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
294 goto restart;
295 }
296 return;
297
298restart:
299 queue_work(priv->workqueue, &priv->restart);
300}
301
Zhu Yib481de92007-09-25 17:54:57 -0700302static int is_fat_channel(__le32 rxon_flags)
303{
304 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
305 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
306}
307
Tomas Winkler17744ff2008-03-02 01:52:00 +0200308int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
309{
310 int idx = 0;
311
312 /* 4965 HT rate format */
313 if (rate_n_flags & RATE_MCS_HT_MSK) {
314 idx = (rate_n_flags & 0xff);
315
Guy Cohenfde0db32008-04-21 15:42:01 -0700316 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
317 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
Tomas Winkler17744ff2008-03-02 01:52:00 +0200318
319 idx += IWL_FIRST_OFDM_RATE;
320 /* skip 9M not supported in ht*/
321 if (idx >= IWL_RATE_9M_INDEX)
322 idx += 1;
323 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
324 return idx;
325
326 /* 4965 legacy rate format, search for match in table */
327 } else {
Tomas Winkler1826dcc2008-05-15 13:54:02 +0800328 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
329 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
Tomas Winkler17744ff2008-03-02 01:52:00 +0200330 return idx;
331 }
332
333 return -1;
334}
335
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800336/**
337 * translate ucode response to mac80211 tx status control values
338 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700339void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
Johannes Berge039fa42008-05-15 12:55:29 +0200340 struct ieee80211_tx_info *control)
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800341{
342 int rate_index;
343
344 control->antenna_sel_tx =
Guy Cohenfde0db32008-04-21 15:42:01 -0700345 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800346 if (rate_n_flags & RATE_MCS_HT_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200347 control->flags |= IEEE80211_TX_CTL_OFDM_HT;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800348 if (rate_n_flags & RATE_MCS_GF_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200349 control->flags |= IEEE80211_TX_CTL_GREEN_FIELD;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800350 if (rate_n_flags & RATE_MCS_FAT_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200351 control->flags |= IEEE80211_TX_CTL_40_MHZ_WIDTH;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800352 if (rate_n_flags & RATE_MCS_DUP_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200353 control->flags |= IEEE80211_TX_CTL_DUP_DATA;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800354 if (rate_n_flags & RATE_MCS_SGI_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200355 control->flags |= IEEE80211_TX_CTL_SHORT_GI;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800356 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
Johannes Berg2e92e6f2008-05-15 12:55:27 +0200357 if (control->band == IEEE80211_BAND_5GHZ)
358 rate_index -= IWL_FIRST_OFDM_RATE;
359 control->tx_rate_idx = rate_index;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800360}
Tomas Winkler17744ff2008-03-02 01:52:00 +0200361
Tomas Winkler8614f362008-04-23 17:14:55 -0700362/*
363 * EEPROM handlers
364 */
365
366static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
367{
368 u16 eeprom_ver;
369 u16 calib_ver;
370
371 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
372
373 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
374
375 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
376 calib_ver < EEPROM_4965_TX_POWER_VERSION)
377 goto err;
378
379 return 0;
380err:
381 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
382 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
383 calib_ver, EEPROM_4965_TX_POWER_VERSION);
384 return -EINVAL;
385
386}
Tomas Winkler079a2532008-04-17 16:03:39 -0700387int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
Zhu Yib481de92007-09-25 17:54:57 -0700388{
Tomas Winklerd8609652007-10-25 17:15:35 +0800389 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700390 unsigned long flags;
391
392 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700393 ret = iwl_grab_nic_access(priv);
Tomas Winklerd8609652007-10-25 17:15:35 +0800394 if (ret) {
Zhu Yib481de92007-09-25 17:54:57 -0700395 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winklerd8609652007-10-25 17:15:35 +0800396 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700397 }
398
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700399 if (src == IWL_PWR_SRC_VAUX) {
Zhu Yib481de92007-09-25 17:54:57 -0700400 u32 val;
Tomas Winklerd8609652007-10-25 17:15:35 +0800401 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700402 &val);
Zhu Yib481de92007-09-25 17:54:57 -0700403
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700404 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700405 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700406 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
407 ~APMG_PS_CTRL_MSK_PWR_SRC);
408 }
409 } else {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700410 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700411 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
412 ~APMG_PS_CTRL_MSK_PWR_SRC);
413 }
Zhu Yib481de92007-09-25 17:54:57 -0700414
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700415 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700416 spin_unlock_irqrestore(&priv->lock, flags);
417
Tomas Winklerd8609652007-10-25 17:15:35 +0800418 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700419}
420
Tomas Winklerda1bc452008-05-29 16:35:00 +0800421/*
422 * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
423 * must be called under priv->lock and mac access
424 */
425static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
Zhu Yib481de92007-09-25 17:54:57 -0700426{
Tomas Winklerda1bc452008-05-29 16:35:00 +0800427 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
Zhu Yib481de92007-09-25 17:54:57 -0700428}
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800429
Tomas Winkler91238712008-04-23 17:14:53 -0700430static int iwl4965_apm_init(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700431{
Tomas Winkler91238712008-04-23 17:14:53 -0700432 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700433
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700434 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
Tomas Winkler91238712008-04-23 17:14:53 -0700435 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
Zhu Yib481de92007-09-25 17:54:57 -0700436
Tomas Winkler8f061892008-05-29 16:34:56 +0800437 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
438 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
439 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
440
Tomas Winkler91238712008-04-23 17:14:53 -0700441 /* set "initialization complete" bit to move adapter
442 * D0U* --> D0A* state */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700443 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winkler91238712008-04-23 17:14:53 -0700444
445 /* wait for clock stabilization */
446 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
447 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
448 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
449 if (ret < 0) {
Zhu Yib481de92007-09-25 17:54:57 -0700450 IWL_DEBUG_INFO("Failed to init the card\n");
Tomas Winkler91238712008-04-23 17:14:53 -0700451 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700452 }
453
Tomas Winkler91238712008-04-23 17:14:53 -0700454 ret = iwl_grab_nic_access(priv);
455 if (ret)
456 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700457
Tomas Winkler91238712008-04-23 17:14:53 -0700458 /* enable DMA */
Tomas Winkler8f061892008-05-29 16:34:56 +0800459 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
460 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700461
462 udelay(20);
463
Tomas Winkler8f061892008-05-29 16:34:56 +0800464 /* disable L1-Active */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700465 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
Tomas Winkler91238712008-04-23 17:14:53 -0700466 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700467
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700468 iwl_release_nic_access(priv);
Tomas Winkler91238712008-04-23 17:14:53 -0700469out:
Tomas Winkler91238712008-04-23 17:14:53 -0700470 return ret;
471}
472
Tomas Winkler694cc562008-04-24 11:55:22 -0700473
474static void iwl4965_nic_config(struct iwl_priv *priv)
475{
476 unsigned long flags;
477 u32 val;
478 u16 radio_cfg;
479 u8 val_link;
480
481 spin_lock_irqsave(&priv->lock, flags);
482
483 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
484 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
485 /* Enable No Snoop field */
486 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
487 val & ~(1 << 11));
488 }
489
490 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
491
Tomas Winkler8f061892008-05-29 16:34:56 +0800492 /* L1 is enabled by BIOS */
493 if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
494 /* diable L0S disabled L1A enabled */
495 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
496 else
497 /* L0S enabled L1A disabled */
498 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
Tomas Winkler694cc562008-04-24 11:55:22 -0700499
500 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
501
502 /* write radio config values to register */
503 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
504 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
505 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
506 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
507 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
508
509 /* set CSR_HW_CONFIG_REG for uCode use */
510 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
511 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
512 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
513
514 priv->calib_info = (struct iwl_eeprom_calib_info *)
515 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
516
517 spin_unlock_irqrestore(&priv->lock, flags);
518}
519
Tomas Winkler46315e02008-05-29 16:34:59 +0800520static int iwl4965_apm_stop_master(struct iwl_priv *priv)
521{
522 int ret = 0;
523 unsigned long flags;
524
525 spin_lock_irqsave(&priv->lock, flags);
526
527 /* set stop master bit */
528 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
529
530 ret = iwl_poll_bit(priv, CSR_RESET,
531 CSR_RESET_REG_FLAG_MASTER_DISABLED,
532 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
533 if (ret < 0)
534 goto out;
535
536out:
537 spin_unlock_irqrestore(&priv->lock, flags);
538 IWL_DEBUG_INFO("stop master\n");
539
540 return ret;
541}
542
Tomas Winklerf118a912008-05-29 16:34:58 +0800543static void iwl4965_apm_stop(struct iwl_priv *priv)
544{
545 unsigned long flags;
546
Tomas Winkler46315e02008-05-29 16:34:59 +0800547 iwl4965_apm_stop_master(priv);
Tomas Winklerf118a912008-05-29 16:34:58 +0800548
549 spin_lock_irqsave(&priv->lock, flags);
550
551 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
552
553 udelay(10);
554
555 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
556 spin_unlock_irqrestore(&priv->lock, flags);
557}
558
Tomas Winkler7f066102008-05-29 16:34:57 +0800559static int iwl4965_apm_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700560{
Tomas Winkler7f066102008-05-29 16:34:57 +0800561 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700562 unsigned long flags;
563
Tomas Winkler46315e02008-05-29 16:34:59 +0800564 iwl4965_apm_stop_master(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700565
566 spin_lock_irqsave(&priv->lock, flags);
567
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700568 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
Zhu Yib481de92007-09-25 17:54:57 -0700569
570 udelay(10);
571
Tomas Winkler7f066102008-05-29 16:34:57 +0800572 /* FIXME: put here L1A -L0S w/a */
573
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700574 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winklerf118a912008-05-29 16:34:58 +0800575
Tomas Winkler7f066102008-05-29 16:34:57 +0800576 ret = iwl_poll_bit(priv, CSR_RESET,
Zhu Yib481de92007-09-25 17:54:57 -0700577 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
578 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
579
Tomas Winkler7f066102008-05-29 16:34:57 +0800580 if (ret)
581 goto out;
582
Zhu Yib481de92007-09-25 17:54:57 -0700583 udelay(10);
584
Tomas Winkler7f066102008-05-29 16:34:57 +0800585 ret = iwl_grab_nic_access(priv);
586 if (ret)
587 goto out;
588 /* Enable DMA and BSM Clock */
589 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
590 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700591
Tomas Winkler7f066102008-05-29 16:34:57 +0800592 udelay(10);
Zhu Yib481de92007-09-25 17:54:57 -0700593
Tomas Winkler7f066102008-05-29 16:34:57 +0800594 /* disable L1A */
595 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
596 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700597
Tomas Winkler7f066102008-05-29 16:34:57 +0800598 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700599
600 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
601 wake_up_interruptible(&priv->wait_command_queue);
602
Tomas Winkler7f066102008-05-29 16:34:57 +0800603out:
Zhu Yib481de92007-09-25 17:54:57 -0700604 spin_unlock_irqrestore(&priv->lock, flags);
605
Tomas Winkler7f066102008-05-29 16:34:57 +0800606 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700607}
608
609#define REG_RECALIB_PERIOD (60)
610
611/**
612 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
613 *
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700614 * This callback is provided in order to send a statistics request.
Zhu Yib481de92007-09-25 17:54:57 -0700615 *
616 * This timer function is continually reset to execute within
617 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
618 * was received. We need to ensure we receive the statistics in order
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700619 * to update the temperature used for calibrating the TXPOWER.
Zhu Yib481de92007-09-25 17:54:57 -0700620 */
621static void iwl4965_bg_statistics_periodic(unsigned long data)
622{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700623 struct iwl_priv *priv = (struct iwl_priv *)data;
Zhu Yib481de92007-09-25 17:54:57 -0700624
Zhu Yib481de92007-09-25 17:54:57 -0700625 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
626 return;
627
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700628 iwl_send_statistics_request(priv, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -0700629}
630
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700631void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700632{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800633 struct iwl4965_ct_kill_config cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700634 unsigned long flags;
Tomas Winkler857485c2008-03-21 13:53:44 -0700635 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700636
637 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700638 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -0700639 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
640 spin_unlock_irqrestore(&priv->lock, flags);
641
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700642 cmd.critical_temperature_R =
Emmanuel Grumbachb73cdf22008-04-21 15:41:58 -0700643 cpu_to_le32(priv->hw_params.ct_kill_threshold);
644
Tomas Winkler857485c2008-03-21 13:53:44 -0700645 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
646 sizeof(cmd), &cmd);
647 if (ret)
Zhu Yib481de92007-09-25 17:54:57 -0700648 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
649 else
Emmanuel Grumbachb73cdf22008-04-21 15:41:58 -0700650 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
651 "critical temperature is %d\n",
652 cmd.critical_temperature_R);
Zhu Yib481de92007-09-25 17:54:57 -0700653}
654
Zhu Yib481de92007-09-25 17:54:57 -0700655/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
656 * Called after every association, but this runs only once!
657 * ... once chain noise is calibrated the first time, it's good forever. */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700658static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700659{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700660 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
Zhu Yib481de92007-09-25 17:54:57 -0700661
Tomas Winkler3109ece2008-03-28 16:33:35 -0700662 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800663 struct iwl4965_calibration_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700664
665 memset(&cmd, 0, sizeof(cmd));
666 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
667 cmd.diff_gain_a = 0;
668 cmd.diff_gain_b = 0;
669 cmd.diff_gain_c = 0;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700670 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
671 sizeof(cmd), &cmd))
672 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
Zhu Yib481de92007-09-25 17:54:57 -0700673 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
674 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
675 }
Zhu Yib481de92007-09-25 17:54:57 -0700676}
677
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700678static void iwl4965_gain_computation(struct iwl_priv *priv,
679 u32 *average_noise,
680 u16 min_average_noise_antenna_i,
681 u32 min_average_noise)
Zhu Yib481de92007-09-25 17:54:57 -0700682{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700683 int i, ret;
684 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
Zhu Yib481de92007-09-25 17:54:57 -0700685
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700686 data->delta_gain_code[min_average_noise_antenna_i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700687
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700688 for (i = 0; i < NUM_RX_CHAINS; i++) {
689 s32 delta_g = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700690
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700691 if (!(data->disconn_array[i]) &&
692 (data->delta_gain_code[i] ==
Zhu Yib481de92007-09-25 17:54:57 -0700693 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700694 delta_g = average_noise[i] - min_average_noise;
695 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
696 data->delta_gain_code[i] =
697 min(data->delta_gain_code[i],
698 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
Zhu Yib481de92007-09-25 17:54:57 -0700699
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700700 data->delta_gain_code[i] =
701 (data->delta_gain_code[i] | (1 << 2));
702 } else {
703 data->delta_gain_code[i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700704 }
Zhu Yib481de92007-09-25 17:54:57 -0700705 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700706 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
707 data->delta_gain_code[0],
708 data->delta_gain_code[1],
709 data->delta_gain_code[2]);
Zhu Yib481de92007-09-25 17:54:57 -0700710
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700711 /* Differential gain gets sent to uCode only once */
712 if (!data->radio_write) {
713 struct iwl4965_calibration_cmd cmd;
714 data->radio_write = 1;
Zhu Yib481de92007-09-25 17:54:57 -0700715
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700716 memset(&cmd, 0, sizeof(cmd));
717 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
718 cmd.diff_gain_a = data->delta_gain_code[0];
719 cmd.diff_gain_b = data->delta_gain_code[1];
720 cmd.diff_gain_c = data->delta_gain_code[2];
721 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
722 sizeof(cmd), &cmd);
723 if (ret)
724 IWL_DEBUG_CALIB("fail sending cmd "
725 "REPLY_PHY_CALIBRATION_CMD \n");
Zhu Yib481de92007-09-25 17:54:57 -0700726
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700727 /* TODO we might want recalculate
728 * rx_chain in rxon cmd */
729
730 /* Mark so we run this algo only once! */
731 data->state = IWL_CHAIN_NOISE_CALIBRATED;
Zhu Yib481de92007-09-25 17:54:57 -0700732 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700733 data->chain_noise_a = 0;
734 data->chain_noise_b = 0;
735 data->chain_noise_c = 0;
736 data->chain_signal_a = 0;
737 data->chain_signal_b = 0;
738 data->chain_signal_c = 0;
739 data->beacon_count = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700740}
741
Zhu Yib481de92007-09-25 17:54:57 -0700742static void iwl4965_bg_txpower_work(struct work_struct *work)
743{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700744 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700745 txpower_work);
746
747 /* If a scan happened to start before we got here
748 * then just return; the statistics notification will
749 * kick off another scheduled work to compensate for
750 * any temperature delta we missed here. */
751 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
752 test_bit(STATUS_SCANNING, &priv->status))
753 return;
754
755 mutex_lock(&priv->mutex);
756
757 /* Regardless of if we are assocaited, we must reconfigure the
758 * TX power since frames can be sent on non-radar channels while
759 * not associated */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800760 iwl4965_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700761
762 /* Update last_temperature to keep is_calib_needed from running
763 * when it isn't needed... */
764 priv->last_temperature = priv->temperature;
765
766 mutex_unlock(&priv->mutex);
767}
768
769/*
770 * Acquire priv->lock before calling this function !
771 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700772static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
Zhu Yib481de92007-09-25 17:54:57 -0700773{
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700774 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
Zhu Yib481de92007-09-25 17:54:57 -0700775 (index & 0xff) | (txq_id << 8));
Tomas Winkler12a81f62008-04-03 16:05:20 -0700776 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
Zhu Yib481de92007-09-25 17:54:57 -0700777}
778
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800779/**
780 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
781 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
782 * @scd_retry: (1) Indicates queue will be used in aggregation mode
783 *
784 * NOTE: Acquire priv->lock before calling this function !
Zhu Yib481de92007-09-25 17:54:57 -0700785 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700786static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800787 struct iwl_tx_queue *txq,
Zhu Yib481de92007-09-25 17:54:57 -0700788 int tx_fifo_id, int scd_retry)
789{
790 int txq_id = txq->q.id;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800791
792 /* Find out whether to activate Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -0700793 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
794
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800795 /* Set up and activate */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700796 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700797 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
798 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
799 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
800 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
801 IWL49_SCD_QUEUE_STTS_REG_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700802
803 txq->sched_retry = scd_retry;
804
805 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800806 active ? "Activate" : "Deactivate",
Zhu Yib481de92007-09-25 17:54:57 -0700807 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
808}
809
810static const u16 default_queue_to_tx_fifo[] = {
811 IWL_TX_FIFO_AC3,
812 IWL_TX_FIFO_AC2,
813 IWL_TX_FIFO_AC1,
814 IWL_TX_FIFO_AC0,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700815 IWL49_CMD_FIFO_NUM,
Zhu Yib481de92007-09-25 17:54:57 -0700816 IWL_TX_FIFO_HCCA_1,
817 IWL_TX_FIFO_HCCA_2
818};
819
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700820int iwl4965_alive_notify(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700821{
822 u32 a;
823 int i = 0;
824 unsigned long flags;
Tomas Winkler857485c2008-03-21 13:53:44 -0700825 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700826
827 spin_lock_irqsave(&priv->lock, flags);
828
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700829 ret = iwl_grab_nic_access(priv);
Tomas Winkler857485c2008-03-21 13:53:44 -0700830 if (ret) {
Zhu Yib481de92007-09-25 17:54:57 -0700831 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winkler857485c2008-03-21 13:53:44 -0700832 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700833 }
834
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800835 /* Clear 4965's internal Tx Scheduler data base */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700836 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700837 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
838 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700839 iwl_write_targ_mem(priv, a, 0);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700840 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700841 iwl_write_targ_mem(priv, a, 0);
Tomas Winkler5425e492008-04-15 16:01:38 -0700842 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700843 iwl_write_targ_mem(priv, a, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700844
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800845 /* Tel 4965 where to find Tx byte count tables */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700846 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
Tomas Winkler059ff822008-04-14 21:16:14 -0700847 (priv->shared_phys +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800848 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800849
850 /* Disable chain mode for all queues */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700851 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700852
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800853 /* Initialize each Tx queue (including the command queue) */
Tomas Winkler5425e492008-04-15 16:01:38 -0700854 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800855
856 /* TFD circular buffer read/write indexes */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700857 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700858 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800859
860 /* Max Tx Window size for Scheduler-ACK mode */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700861 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700862 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
863 (SCD_WIN_SIZE <<
864 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
865 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800866
867 /* Frame limit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700868 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700869 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
870 sizeof(u32),
871 (SCD_FRAME_LIMIT <<
872 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
873 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700874
875 }
Tomas Winkler12a81f62008-04-03 16:05:20 -0700876 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
Tomas Winkler5425e492008-04-15 16:01:38 -0700877 (1 << priv->hw_params.max_txq_num) - 1);
Zhu Yib481de92007-09-25 17:54:57 -0700878
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800879 /* Activate all Tx DMA/FIFO channels */
Tomas Winklerda1bc452008-05-29 16:35:00 +0800880 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
Zhu Yib481de92007-09-25 17:54:57 -0700881
882 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800883
884 /* Map each Tx/cmd queue to its corresponding fifo */
Zhu Yib481de92007-09-25 17:54:57 -0700885 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
886 int ac = default_queue_to_tx_fifo[i];
Ron Rindjunsky36470742008-05-15 13:54:10 +0800887 iwl_txq_ctx_activate(priv, i);
Zhu Yib481de92007-09-25 17:54:57 -0700888 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
889 }
890
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700891 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700892 spin_unlock_irqrestore(&priv->lock, flags);
893
Tomas Winkler857485c2008-03-21 13:53:44 -0700894 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700895}
896
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700897static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
898 .min_nrg_cck = 97,
899 .max_nrg_cck = 0,
900
901 .auto_corr_min_ofdm = 85,
902 .auto_corr_min_ofdm_mrc = 170,
903 .auto_corr_min_ofdm_x1 = 105,
904 .auto_corr_min_ofdm_mrc_x1 = 220,
905
906 .auto_corr_max_ofdm = 120,
907 .auto_corr_max_ofdm_mrc = 210,
908 .auto_corr_max_ofdm_x1 = 140,
909 .auto_corr_max_ofdm_mrc_x1 = 270,
910
911 .auto_corr_min_cck = 125,
912 .auto_corr_max_cck = 200,
913 .auto_corr_min_cck_mrc = 200,
914 .auto_corr_max_cck_mrc = 400,
915
916 .nrg_th_cck = 100,
917 .nrg_th_ofdm = 100,
918};
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700919
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800920/**
Tomas Winkler5425e492008-04-15 16:01:38 -0700921 * iwl4965_hw_set_hw_params
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800922 *
923 * Called when initializing driver
924 */
Tomas Winkler5425e492008-04-15 16:01:38 -0700925int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700926{
Assaf Krauss316c30d2008-03-14 10:38:46 -0700927
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700928 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
Assaf Krauss1ea87392008-03-18 14:57:50 -0700929 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
Assaf Krauss316c30d2008-03-14 10:38:46 -0700930 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700931 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
Tomas Winkler059ff822008-04-14 21:16:14 -0700932 return -EINVAL;
Assaf Krauss316c30d2008-03-14 10:38:46 -0700933 }
934
Tomas Winkler5425e492008-04-15 16:01:38 -0700935 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700936 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
Tomas Winkler5425e492008-04-15 16:01:38 -0700937 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
938 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
Assaf Krauss1ea87392008-03-18 14:57:50 -0700939 if (priv->cfg->mod_params->amsdu_size_8K)
Tomas Winkler5425e492008-04-15 16:01:38 -0700940 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +0200941 else
Tomas Winkler5425e492008-04-15 16:01:38 -0700942 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
943 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
944 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
945 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
Tomas Winkler3e82a822008-02-13 11:32:31 -0800946
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700947 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
948 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
949 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
950 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
951
Tomas Winklerec35cf22008-04-15 16:01:39 -0700952 priv->hw_params.tx_chains_num = 2;
953 priv->hw_params.rx_chains_num = 2;
Guy Cohenfde0db32008-04-21 15:42:01 -0700954 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
955 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700956 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
957
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700958 priv->hw_params.sens = &iwl4965_sensitivity;
Tomas Winkler3e82a822008-02-13 11:32:31 -0800959
Tomas Winkler059ff822008-04-14 21:16:14 -0700960 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700961}
962
Mohamed Abbas5da4b552008-04-21 15:41:51 -0700963/* set card power command */
964static int iwl4965_set_power(struct iwl_priv *priv,
965 void *cmd)
966{
967 int ret = 0;
968
969 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
970 sizeof(struct iwl4965_powertable_cmd),
971 cmd, NULL);
972 return ret;
973}
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700974int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
Zhu Yib481de92007-09-25 17:54:57 -0700975{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800976 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
Zhu Yib481de92007-09-25 17:54:57 -0700977 return -EINVAL;
978}
979
980static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
981{
982 s32 sign = 1;
983
984 if (num < 0) {
985 sign = -sign;
986 num = -num;
987 }
988 if (denom < 0) {
989 sign = -sign;
990 denom = -denom;
991 }
992 *res = 1;
993 *res = ((num * 2 + denom) / (denom * 2)) * sign;
994
995 return 1;
996}
997
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800998/**
999 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1000 *
1001 * Determines power supply voltage compensation for txpower calculations.
1002 * Returns number of 1/2-dB steps to subtract from gain table index,
1003 * to compensate for difference between power supply voltage during
1004 * factory measurements, vs. current power supply voltage.
1005 *
1006 * Voltage indication is higher for lower voltage.
1007 * Lower voltage requires more gain (lower gain table index).
1008 */
Zhu Yib481de92007-09-25 17:54:57 -07001009static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1010 s32 current_voltage)
1011{
1012 s32 comp = 0;
1013
1014 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1015 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1016 return 0;
1017
1018 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1019 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1020
1021 if (current_voltage > eeprom_voltage)
1022 comp *= 2;
1023 if ((comp < -2) || (comp > 2))
1024 comp = 0;
1025
1026 return comp;
1027}
1028
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001029static const struct iwl_channel_info *
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001030iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01001031 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001032{
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001033 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001034
Assaf Krauss8622e702008-03-21 13:53:43 -07001035 ch_info = iwl_get_channel_info(priv, band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001036
1037 if (!is_channel_valid(ch_info))
1038 return NULL;
1039
1040 return ch_info;
1041}
1042
1043static s32 iwl4965_get_tx_atten_grp(u16 channel)
1044{
1045 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1046 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1047 return CALIB_CH_GROUP_5;
1048
1049 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1050 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1051 return CALIB_CH_GROUP_1;
1052
1053 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1054 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1055 return CALIB_CH_GROUP_2;
1056
1057 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1058 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1059 return CALIB_CH_GROUP_3;
1060
1061 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1062 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1063 return CALIB_CH_GROUP_4;
1064
1065 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1066 return -1;
1067}
1068
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001069static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001070{
1071 s32 b = -1;
1072
1073 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -07001074 if (priv->calib_info->band_info[b].ch_from == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001075 continue;
1076
Tomas Winkler073d3f52008-04-21 15:41:52 -07001077 if ((channel >= priv->calib_info->band_info[b].ch_from)
1078 && (channel <= priv->calib_info->band_info[b].ch_to))
Zhu Yib481de92007-09-25 17:54:57 -07001079 break;
1080 }
1081
1082 return b;
1083}
1084
1085static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1086{
1087 s32 val;
1088
1089 if (x2 == x1)
1090 return y1;
1091 else {
1092 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1093 return val + y2;
1094 }
1095}
1096
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001097/**
1098 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1099 *
1100 * Interpolates factory measurements from the two sample channels within a
1101 * sub-band, to apply to channel of interest. Interpolation is proportional to
1102 * differences in channel frequencies, which is proportional to differences
1103 * in channel number.
1104 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001105static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
Tomas Winkler073d3f52008-04-21 15:41:52 -07001106 struct iwl_eeprom_calib_ch_info *chan_info)
Zhu Yib481de92007-09-25 17:54:57 -07001107{
1108 s32 s = -1;
1109 u32 c;
1110 u32 m;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001111 const struct iwl_eeprom_calib_measure *m1;
1112 const struct iwl_eeprom_calib_measure *m2;
1113 struct iwl_eeprom_calib_measure *omeas;
Zhu Yib481de92007-09-25 17:54:57 -07001114 u32 ch_i1;
1115 u32 ch_i2;
1116
1117 s = iwl4965_get_sub_band(priv, channel);
1118 if (s >= EEPROM_TX_POWER_BANDS) {
1119 IWL_ERROR("Tx Power can not find channel %d ", channel);
1120 return -1;
1121 }
1122
Tomas Winkler073d3f52008-04-21 15:41:52 -07001123 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1124 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
Zhu Yib481de92007-09-25 17:54:57 -07001125 chan_info->ch_num = (u8) channel;
1126
1127 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1128 channel, s, ch_i1, ch_i2);
1129
1130 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1131 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -07001132 m1 = &(priv->calib_info->band_info[s].ch1.
Zhu Yib481de92007-09-25 17:54:57 -07001133 measurements[c][m]);
Tomas Winkler073d3f52008-04-21 15:41:52 -07001134 m2 = &(priv->calib_info->band_info[s].ch2.
Zhu Yib481de92007-09-25 17:54:57 -07001135 measurements[c][m]);
1136 omeas = &(chan_info->measurements[c][m]);
1137
1138 omeas->actual_pow =
1139 (u8) iwl4965_interpolate_value(channel, ch_i1,
1140 m1->actual_pow,
1141 ch_i2,
1142 m2->actual_pow);
1143 omeas->gain_idx =
1144 (u8) iwl4965_interpolate_value(channel, ch_i1,
1145 m1->gain_idx, ch_i2,
1146 m2->gain_idx);
1147 omeas->temperature =
1148 (u8) iwl4965_interpolate_value(channel, ch_i1,
1149 m1->temperature,
1150 ch_i2,
1151 m2->temperature);
1152 omeas->pa_det =
1153 (s8) iwl4965_interpolate_value(channel, ch_i1,
1154 m1->pa_det, ch_i2,
1155 m2->pa_det);
1156
1157 IWL_DEBUG_TXPOWER
1158 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1159 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1160 IWL_DEBUG_TXPOWER
1161 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1162 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1163 IWL_DEBUG_TXPOWER
1164 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1165 m1->pa_det, m2->pa_det, omeas->pa_det);
1166 IWL_DEBUG_TXPOWER
1167 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1168 m1->temperature, m2->temperature,
1169 omeas->temperature);
1170 }
1171 }
1172
1173 return 0;
1174}
1175
1176/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1177 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1178static s32 back_off_table[] = {
1179 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1180 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1181 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1182 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1183 10 /* CCK */
1184};
1185
1186/* Thermal compensation values for txpower for various frequency ranges ...
1187 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001188static struct iwl4965_txpower_comp_entry {
Zhu Yib481de92007-09-25 17:54:57 -07001189 s32 degrees_per_05db_a;
1190 s32 degrees_per_05db_a_denom;
1191} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1192 {9, 2}, /* group 0 5.2, ch 34-43 */
1193 {4, 1}, /* group 1 5.2, ch 44-70 */
1194 {4, 1}, /* group 2 5.2, ch 71-124 */
1195 {4, 1}, /* group 3 5.2, ch 125-200 */
1196 {3, 1} /* group 4 2.4, ch all */
1197};
1198
1199static s32 get_min_power_index(s32 rate_power_index, u32 band)
1200{
1201 if (!band) {
1202 if ((rate_power_index & 7) <= 4)
1203 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1204 }
1205 return MIN_TX_GAIN_INDEX;
1206}
1207
1208struct gain_entry {
1209 u8 dsp;
1210 u8 radio;
1211};
1212
1213static const struct gain_entry gain_table[2][108] = {
1214 /* 5.2GHz power gain index table */
1215 {
1216 {123, 0x3F}, /* highest txpower */
1217 {117, 0x3F},
1218 {110, 0x3F},
1219 {104, 0x3F},
1220 {98, 0x3F},
1221 {110, 0x3E},
1222 {104, 0x3E},
1223 {98, 0x3E},
1224 {110, 0x3D},
1225 {104, 0x3D},
1226 {98, 0x3D},
1227 {110, 0x3C},
1228 {104, 0x3C},
1229 {98, 0x3C},
1230 {110, 0x3B},
1231 {104, 0x3B},
1232 {98, 0x3B},
1233 {110, 0x3A},
1234 {104, 0x3A},
1235 {98, 0x3A},
1236 {110, 0x39},
1237 {104, 0x39},
1238 {98, 0x39},
1239 {110, 0x38},
1240 {104, 0x38},
1241 {98, 0x38},
1242 {110, 0x37},
1243 {104, 0x37},
1244 {98, 0x37},
1245 {110, 0x36},
1246 {104, 0x36},
1247 {98, 0x36},
1248 {110, 0x35},
1249 {104, 0x35},
1250 {98, 0x35},
1251 {110, 0x34},
1252 {104, 0x34},
1253 {98, 0x34},
1254 {110, 0x33},
1255 {104, 0x33},
1256 {98, 0x33},
1257 {110, 0x32},
1258 {104, 0x32},
1259 {98, 0x32},
1260 {110, 0x31},
1261 {104, 0x31},
1262 {98, 0x31},
1263 {110, 0x30},
1264 {104, 0x30},
1265 {98, 0x30},
1266 {110, 0x25},
1267 {104, 0x25},
1268 {98, 0x25},
1269 {110, 0x24},
1270 {104, 0x24},
1271 {98, 0x24},
1272 {110, 0x23},
1273 {104, 0x23},
1274 {98, 0x23},
1275 {110, 0x22},
1276 {104, 0x18},
1277 {98, 0x18},
1278 {110, 0x17},
1279 {104, 0x17},
1280 {98, 0x17},
1281 {110, 0x16},
1282 {104, 0x16},
1283 {98, 0x16},
1284 {110, 0x15},
1285 {104, 0x15},
1286 {98, 0x15},
1287 {110, 0x14},
1288 {104, 0x14},
1289 {98, 0x14},
1290 {110, 0x13},
1291 {104, 0x13},
1292 {98, 0x13},
1293 {110, 0x12},
1294 {104, 0x08},
1295 {98, 0x08},
1296 {110, 0x07},
1297 {104, 0x07},
1298 {98, 0x07},
1299 {110, 0x06},
1300 {104, 0x06},
1301 {98, 0x06},
1302 {110, 0x05},
1303 {104, 0x05},
1304 {98, 0x05},
1305 {110, 0x04},
1306 {104, 0x04},
1307 {98, 0x04},
1308 {110, 0x03},
1309 {104, 0x03},
1310 {98, 0x03},
1311 {110, 0x02},
1312 {104, 0x02},
1313 {98, 0x02},
1314 {110, 0x01},
1315 {104, 0x01},
1316 {98, 0x01},
1317 {110, 0x00},
1318 {104, 0x00},
1319 {98, 0x00},
1320 {93, 0x00},
1321 {88, 0x00},
1322 {83, 0x00},
1323 {78, 0x00},
1324 },
1325 /* 2.4GHz power gain index table */
1326 {
1327 {110, 0x3f}, /* highest txpower */
1328 {104, 0x3f},
1329 {98, 0x3f},
1330 {110, 0x3e},
1331 {104, 0x3e},
1332 {98, 0x3e},
1333 {110, 0x3d},
1334 {104, 0x3d},
1335 {98, 0x3d},
1336 {110, 0x3c},
1337 {104, 0x3c},
1338 {98, 0x3c},
1339 {110, 0x3b},
1340 {104, 0x3b},
1341 {98, 0x3b},
1342 {110, 0x3a},
1343 {104, 0x3a},
1344 {98, 0x3a},
1345 {110, 0x39},
1346 {104, 0x39},
1347 {98, 0x39},
1348 {110, 0x38},
1349 {104, 0x38},
1350 {98, 0x38},
1351 {110, 0x37},
1352 {104, 0x37},
1353 {98, 0x37},
1354 {110, 0x36},
1355 {104, 0x36},
1356 {98, 0x36},
1357 {110, 0x35},
1358 {104, 0x35},
1359 {98, 0x35},
1360 {110, 0x34},
1361 {104, 0x34},
1362 {98, 0x34},
1363 {110, 0x33},
1364 {104, 0x33},
1365 {98, 0x33},
1366 {110, 0x32},
1367 {104, 0x32},
1368 {98, 0x32},
1369 {110, 0x31},
1370 {104, 0x31},
1371 {98, 0x31},
1372 {110, 0x30},
1373 {104, 0x30},
1374 {98, 0x30},
1375 {110, 0x6},
1376 {104, 0x6},
1377 {98, 0x6},
1378 {110, 0x5},
1379 {104, 0x5},
1380 {98, 0x5},
1381 {110, 0x4},
1382 {104, 0x4},
1383 {98, 0x4},
1384 {110, 0x3},
1385 {104, 0x3},
1386 {98, 0x3},
1387 {110, 0x2},
1388 {104, 0x2},
1389 {98, 0x2},
1390 {110, 0x1},
1391 {104, 0x1},
1392 {98, 0x1},
1393 {110, 0x0},
1394 {104, 0x0},
1395 {98, 0x0},
1396 {97, 0},
1397 {96, 0},
1398 {95, 0},
1399 {94, 0},
1400 {93, 0},
1401 {92, 0},
1402 {91, 0},
1403 {90, 0},
1404 {89, 0},
1405 {88, 0},
1406 {87, 0},
1407 {86, 0},
1408 {85, 0},
1409 {84, 0},
1410 {83, 0},
1411 {82, 0},
1412 {81, 0},
1413 {80, 0},
1414 {79, 0},
1415 {78, 0},
1416 {77, 0},
1417 {76, 0},
1418 {75, 0},
1419 {74, 0},
1420 {73, 0},
1421 {72, 0},
1422 {71, 0},
1423 {70, 0},
1424 {69, 0},
1425 {68, 0},
1426 {67, 0},
1427 {66, 0},
1428 {65, 0},
1429 {64, 0},
1430 {63, 0},
1431 {62, 0},
1432 {61, 0},
1433 {60, 0},
1434 {59, 0},
1435 }
1436};
1437
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001438static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
Zhu Yib481de92007-09-25 17:54:57 -07001439 u8 is_fat, u8 ctrl_chan_high,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001440 struct iwl4965_tx_power_db *tx_power_tbl)
Zhu Yib481de92007-09-25 17:54:57 -07001441{
1442 u8 saturation_power;
1443 s32 target_power;
1444 s32 user_target_power;
1445 s32 power_limit;
1446 s32 current_temp;
1447 s32 reg_limit;
1448 s32 current_regulatory;
1449 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1450 int i;
1451 int c;
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001452 const struct iwl_channel_info *ch_info = NULL;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001453 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1454 const struct iwl_eeprom_calib_measure *measurement;
Zhu Yib481de92007-09-25 17:54:57 -07001455 s16 voltage;
1456 s32 init_voltage;
1457 s32 voltage_compensation;
1458 s32 degrees_per_05db_num;
1459 s32 degrees_per_05db_denom;
1460 s32 factory_temp;
1461 s32 temperature_comp[2];
1462 s32 factory_gain_index[2];
1463 s32 factory_actual_pwr[2];
1464 s32 power_index;
1465
1466 /* Sanity check requested level (dBm) */
1467 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1468 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1469 priv->user_txpower_limit);
1470 return -EINVAL;
1471 }
1472 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1473 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1474 priv->user_txpower_limit);
1475 return -EINVAL;
1476 }
1477
1478 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1479 * are used for indexing into txpower table) */
1480 user_target_power = 2 * priv->user_txpower_limit;
1481
1482 /* Get current (RXON) channel, band, width */
1483 ch_info =
Johannes Berg8318d782008-01-24 19:38:38 +01001484 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001485
1486 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1487 is_fat);
1488
1489 if (!ch_info)
1490 return -EINVAL;
1491
1492 /* get txatten group, used to select 1) thermal txpower adjustment
1493 * and 2) mimo txpower balance between Tx chains. */
1494 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1495 if (txatten_grp < 0)
1496 return -EINVAL;
1497
1498 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1499 channel, txatten_grp);
1500
1501 if (is_fat) {
1502 if (ctrl_chan_high)
1503 channel -= 2;
1504 else
1505 channel += 2;
1506 }
1507
1508 /* hardware txpower limits ...
1509 * saturation (clipping distortion) txpowers are in half-dBm */
1510 if (band)
Tomas Winkler073d3f52008-04-21 15:41:52 -07001511 saturation_power = priv->calib_info->saturation_power24;
Zhu Yib481de92007-09-25 17:54:57 -07001512 else
Tomas Winkler073d3f52008-04-21 15:41:52 -07001513 saturation_power = priv->calib_info->saturation_power52;
Zhu Yib481de92007-09-25 17:54:57 -07001514
1515 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1516 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1517 if (band)
1518 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1519 else
1520 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1521 }
1522
1523 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1524 * max_power_avg values are in dBm, convert * 2 */
1525 if (is_fat)
1526 reg_limit = ch_info->fat_max_power_avg * 2;
1527 else
1528 reg_limit = ch_info->max_power_avg * 2;
1529
1530 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1531 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1532 if (band)
1533 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1534 else
1535 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1536 }
1537
1538 /* Interpolate txpower calibration values for this channel,
1539 * based on factory calibration tests on spaced channels. */
1540 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1541
1542 /* calculate tx gain adjustment based on power supply voltage */
Tomas Winkler073d3f52008-04-21 15:41:52 -07001543 voltage = priv->calib_info->voltage;
Zhu Yib481de92007-09-25 17:54:57 -07001544 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1545 voltage_compensation =
1546 iwl4965_get_voltage_compensation(voltage, init_voltage);
1547
1548 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1549 init_voltage,
1550 voltage, voltage_compensation);
1551
1552 /* get current temperature (Celsius) */
1553 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1554 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1555 current_temp = KELVIN_TO_CELSIUS(current_temp);
1556
1557 /* select thermal txpower adjustment params, based on channel group
1558 * (same frequency group used for mimo txatten adjustment) */
1559 degrees_per_05db_num =
1560 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1561 degrees_per_05db_denom =
1562 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1563
1564 /* get per-chain txpower values from factory measurements */
1565 for (c = 0; c < 2; c++) {
1566 measurement = &ch_eeprom_info.measurements[c][1];
1567
1568 /* txgain adjustment (in half-dB steps) based on difference
1569 * between factory and current temperature */
1570 factory_temp = measurement->temperature;
1571 iwl4965_math_div_round((current_temp - factory_temp) *
1572 degrees_per_05db_denom,
1573 degrees_per_05db_num,
1574 &temperature_comp[c]);
1575
1576 factory_gain_index[c] = measurement->gain_idx;
1577 factory_actual_pwr[c] = measurement->actual_pow;
1578
1579 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1580 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1581 "curr tmp %d, comp %d steps\n",
1582 factory_temp, current_temp,
1583 temperature_comp[c]);
1584
1585 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1586 factory_gain_index[c],
1587 factory_actual_pwr[c]);
1588 }
1589
1590 /* for each of 33 bit-rates (including 1 for CCK) */
1591 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1592 u8 is_mimo_rate;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001593 union iwl4965_tx_power_dual_stream tx_power;
Zhu Yib481de92007-09-25 17:54:57 -07001594
1595 /* for mimo, reduce each chain's txpower by half
1596 * (3dB, 6 steps), so total output power is regulatory
1597 * compliant. */
1598 if (i & 0x8) {
1599 current_regulatory = reg_limit -
1600 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1601 is_mimo_rate = 1;
1602 } else {
1603 current_regulatory = reg_limit;
1604 is_mimo_rate = 0;
1605 }
1606
1607 /* find txpower limit, either hardware or regulatory */
1608 power_limit = saturation_power - back_off_table[i];
1609 if (power_limit > current_regulatory)
1610 power_limit = current_regulatory;
1611
1612 /* reduce user's txpower request if necessary
1613 * for this rate on this channel */
1614 target_power = user_target_power;
1615 if (target_power > power_limit)
1616 target_power = power_limit;
1617
1618 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1619 i, saturation_power - back_off_table[i],
1620 current_regulatory, user_target_power,
1621 target_power);
1622
1623 /* for each of 2 Tx chains (radio transmitters) */
1624 for (c = 0; c < 2; c++) {
1625 s32 atten_value;
1626
1627 if (is_mimo_rate)
1628 atten_value =
1629 (s32)le32_to_cpu(priv->card_alive_init.
1630 tx_atten[txatten_grp][c]);
1631 else
1632 atten_value = 0;
1633
1634 /* calculate index; higher index means lower txpower */
1635 power_index = (u8) (factory_gain_index[c] -
1636 (target_power -
1637 factory_actual_pwr[c]) -
1638 temperature_comp[c] -
1639 voltage_compensation +
1640 atten_value);
1641
1642/* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1643 power_index); */
1644
1645 if (power_index < get_min_power_index(i, band))
1646 power_index = get_min_power_index(i, band);
1647
1648 /* adjust 5 GHz index to support negative indexes */
1649 if (!band)
1650 power_index += 9;
1651
1652 /* CCK, rate 32, reduce txpower for CCK */
1653 if (i == POWER_TABLE_CCK_ENTRY)
1654 power_index +=
1655 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1656
1657 /* stay within the table! */
1658 if (power_index > 107) {
1659 IWL_WARNING("txpower index %d > 107\n",
1660 power_index);
1661 power_index = 107;
1662 }
1663 if (power_index < 0) {
1664 IWL_WARNING("txpower index %d < 0\n",
1665 power_index);
1666 power_index = 0;
1667 }
1668
1669 /* fill txpower command for this rate/chain */
1670 tx_power.s.radio_tx_gain[c] =
1671 gain_table[band][power_index].radio;
1672 tx_power.s.dsp_predis_atten[c] =
1673 gain_table[band][power_index].dsp;
1674
1675 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1676 "gain 0x%02x dsp %d\n",
1677 c, atten_value, power_index,
1678 tx_power.s.radio_tx_gain[c],
1679 tx_power.s.dsp_predis_atten[c]);
1680 }/* for each chain */
1681
1682 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1683
1684 }/* for each rate */
1685
1686 return 0;
1687}
1688
1689/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001690 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
Zhu Yib481de92007-09-25 17:54:57 -07001691 *
1692 * Uses the active RXON for channel, band, and characteristics (fat, high)
1693 * The power limit is taken from priv->user_txpower_limit.
1694 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001695int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001696{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001697 struct iwl4965_txpowertable_cmd cmd = { 0 };
Tomas Winkler857485c2008-03-21 13:53:44 -07001698 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07001699 u8 band = 0;
1700 u8 is_fat = 0;
1701 u8 ctrl_chan_high = 0;
1702
1703 if (test_bit(STATUS_SCANNING, &priv->status)) {
1704 /* If this gets hit a lot, switch it to a BUG() and catch
1705 * the stack trace to find out who is calling this during
1706 * a scan. */
1707 IWL_WARNING("TX Power requested while scanning!\n");
1708 return -EAGAIN;
1709 }
1710
Johannes Berg8318d782008-01-24 19:38:38 +01001711 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001712
1713 is_fat = is_fat_channel(priv->active_rxon.flags);
1714
1715 if (is_fat &&
1716 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1717 ctrl_chan_high = 1;
1718
1719 cmd.band = band;
1720 cmd.channel = priv->active_rxon.channel;
1721
Tomas Winkler857485c2008-03-21 13:53:44 -07001722 ret = iwl4965_fill_txpower_tbl(priv, band,
Zhu Yib481de92007-09-25 17:54:57 -07001723 le16_to_cpu(priv->active_rxon.channel),
1724 is_fat, ctrl_chan_high, &cmd.tx_power);
Tomas Winkler857485c2008-03-21 13:53:44 -07001725 if (ret)
1726 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07001727
Tomas Winkler857485c2008-03-21 13:53:44 -07001728 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1729
1730out:
1731 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001732}
1733
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001734static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1735{
1736 int ret = 0;
1737 struct iwl4965_rxon_assoc_cmd rxon_assoc;
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001738 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1739 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001740
1741 if ((rxon1->flags == rxon2->flags) &&
1742 (rxon1->filter_flags == rxon2->filter_flags) &&
1743 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1744 (rxon1->ofdm_ht_single_stream_basic_rates ==
1745 rxon2->ofdm_ht_single_stream_basic_rates) &&
1746 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1747 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1748 (rxon1->rx_chain == rxon2->rx_chain) &&
1749 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1750 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1751 return 0;
1752 }
1753
1754 rxon_assoc.flags = priv->staging_rxon.flags;
1755 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1756 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1757 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1758 rxon_assoc.reserved = 0;
1759 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1760 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1761 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1762 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1763 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1764
1765 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1766 sizeof(rxon_assoc), &rxon_assoc, NULL);
1767 if (ret)
1768 return ret;
1769
1770 return ret;
1771}
1772
1773
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001774int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001775{
1776 int rc;
1777 u8 band = 0;
1778 u8 is_fat = 0;
1779 u8 ctrl_chan_high = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001780 struct iwl4965_channel_switch_cmd cmd = { 0 };
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001781 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001782
Johannes Berg8318d782008-01-24 19:38:38 +01001783 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001784
Assaf Krauss8622e702008-03-21 13:53:43 -07001785 ch_info = iwl_get_channel_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001786
1787 is_fat = is_fat_channel(priv->staging_rxon.flags);
1788
1789 if (is_fat &&
1790 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1791 ctrl_chan_high = 1;
1792
1793 cmd.band = band;
1794 cmd.expect_beacon = 0;
1795 cmd.channel = cpu_to_le16(channel);
1796 cmd.rxon_flags = priv->active_rxon.flags;
1797 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1798 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1799 if (ch_info)
1800 cmd.expect_beacon = is_channel_radar(ch_info);
1801 else
1802 cmd.expect_beacon = 1;
1803
1804 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1805 ctrl_chan_high, &cmd.tx_power);
1806 if (rc) {
1807 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1808 return rc;
1809 }
1810
Tomas Winkler857485c2008-03-21 13:53:44 -07001811 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001812 return rc;
1813}
1814
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08001815static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001816{
Tomas Winkler059ff822008-04-14 21:16:14 -07001817 struct iwl4965_shared *s = priv->shared_virt;
1818 return le32_to_cpu(s->rb_closed) & 0xFFF;
Zhu Yib481de92007-09-25 17:54:57 -07001819}
1820
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001821int iwl4965_hw_get_temperature(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001822{
1823 return priv->temperature;
1824}
1825
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001826unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
Tomas Winklerfcab4232008-05-15 13:54:01 +08001827 struct iwl_frame *frame, u8 rate)
Zhu Yib481de92007-09-25 17:54:57 -07001828{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001829 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001830 unsigned int frame_size;
1831
1832 tx_beacon_cmd = &frame->u.beacon;
1833 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1834
Tomas Winkler5425e492008-04-15 16:01:38 -07001835 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
Zhu Yib481de92007-09-25 17:54:57 -07001836 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1837
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001838 frame_size = iwl4965_fill_beacon_frame(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001839 tx_beacon_cmd->frame,
Tomas Winkler57bd1be2008-05-15 13:54:03 +08001840 iwl_bcast_addr,
Zhu Yib481de92007-09-25 17:54:57 -07001841 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1842
1843 BUG_ON(frame_size > MAX_MPDU_SIZE);
1844 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1845
1846 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1847 tx_beacon_cmd->tx.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001848 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001849 else
1850 tx_beacon_cmd->tx.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001851 iwl4965_hw_set_rate_n_flags(rate, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001852
1853 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1854 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1855 return (sizeof(*tx_beacon_cmd) + frame_size);
1856}
1857
Ron Rindjunsky399f4902008-04-23 17:14:56 -07001858static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1859{
1860 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1861 sizeof(struct iwl4965_shared),
1862 &priv->shared_phys);
1863 if (!priv->shared_virt)
1864 return -ENOMEM;
1865
1866 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1867
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08001868 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1869
Ron Rindjunsky399f4902008-04-23 17:14:56 -07001870 return 0;
1871}
1872
1873static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1874{
1875 if (priv->shared_virt)
1876 pci_free_consistent(priv->pci_dev,
1877 sizeof(struct iwl4965_shared),
1878 priv->shared_virt,
1879 priv->shared_phys);
1880}
1881
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001882/**
Tomas Winklere2a722e2008-04-14 21:16:10 -07001883 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001884 */
Tomas Winklere2a722e2008-04-14 21:16:10 -07001885static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +08001886 struct iwl_tx_queue *txq,
Tomas Winklere2a722e2008-04-14 21:16:10 -07001887 u16 byte_cnt)
Zhu Yib481de92007-09-25 17:54:57 -07001888{
1889 int len;
1890 int txq_id = txq->q.id;
Tomas Winkler059ff822008-04-14 21:16:14 -07001891 struct iwl4965_shared *shared_data = priv->shared_virt;
Zhu Yib481de92007-09-25 17:54:57 -07001892
Zhu Yib481de92007-09-25 17:54:57 -07001893 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1894
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001895 /* Set up byte count within first 256 entries */
Zhu Yib481de92007-09-25 17:54:57 -07001896 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
Tomas Winklerfc4b6852007-10-25 17:15:24 +08001897 tfd_offset[txq->q.write_ptr], byte_cnt, len);
Zhu Yib481de92007-09-25 17:54:57 -07001898
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001899 /* If within first 64 entries, duplicate at end */
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001900 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
Zhu Yib481de92007-09-25 17:54:57 -07001901 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001902 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
Zhu Yib481de92007-09-25 17:54:57 -07001903 byte_cnt, len);
Zhu Yib481de92007-09-25 17:54:57 -07001904}
1905
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001906/**
Zhu Yib481de92007-09-25 17:54:57 -07001907 * sign_extend - Sign extend a value using specified bit as sign-bit
1908 *
1909 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1910 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1911 *
1912 * @param oper value to sign extend
1913 * @param index 0 based bit index (0<=index<32) to sign bit
1914 */
1915static s32 sign_extend(u32 oper, int index)
1916{
1917 u8 shift = 31 - index;
1918
1919 return (s32)(oper << shift) >> shift;
1920}
1921
1922/**
1923 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
1924 * @statistics: Provides the temperature reading from the uCode
1925 *
1926 * A return of <0 indicates bogus data in the statistics
1927 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001928int iwl4965_get_temperature(const struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001929{
1930 s32 temperature;
1931 s32 vt;
1932 s32 R1, R2, R3;
1933 u32 R4;
1934
1935 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1936 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1937 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1938 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1939 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1940 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1941 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1942 } else {
1943 IWL_DEBUG_TEMP("Running temperature calibration\n");
1944 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1945 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1946 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1947 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1948 }
1949
1950 /*
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001951 * Temperature is only 23 bits, so sign extend out to 32.
Zhu Yib481de92007-09-25 17:54:57 -07001952 *
1953 * NOTE If we haven't received a statistics notification yet
1954 * with an updated temperature, use R4 provided to us in the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001955 * "initialize" ALIVE response.
1956 */
Zhu Yib481de92007-09-25 17:54:57 -07001957 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1958 vt = sign_extend(R4, 23);
1959 else
1960 vt = sign_extend(
1961 le32_to_cpu(priv->statistics.general.temperature), 23);
1962
1963 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
1964 R1, R2, R3, vt);
1965
1966 if (R3 == R1) {
1967 IWL_ERROR("Calibration conflict R1 == R3\n");
1968 return -1;
1969 }
1970
1971 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1972 * Add offset to center the adjustment around 0 degrees Centigrade. */
1973 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1974 temperature /= (R3 - R1);
1975 temperature = (temperature * 97) / 100 +
1976 TEMPERATURE_CALIB_KELVIN_OFFSET;
1977
1978 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
1979 KELVIN_TO_CELSIUS(temperature));
1980
1981 return temperature;
1982}
1983
1984/* Adjust Txpower only if temperature variance is greater than threshold. */
1985#define IWL_TEMPERATURE_THRESHOLD 3
1986
1987/**
1988 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1989 *
1990 * If the temperature changed has changed sufficiently, then a recalibration
1991 * is needed.
1992 *
1993 * Assumes caller will replace priv->last_temperature once calibration
1994 * executed.
1995 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001996static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001997{
1998 int temp_diff;
1999
2000 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2001 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2002 return 0;
2003 }
2004
2005 temp_diff = priv->temperature - priv->last_temperature;
2006
2007 /* get absolute value */
2008 if (temp_diff < 0) {
2009 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2010 temp_diff = -temp_diff;
2011 } else if (temp_diff == 0)
2012 IWL_DEBUG_POWER("Same temp, \n");
2013 else
2014 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2015
2016 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2017 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2018 return 0;
2019 }
2020
2021 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2022
2023 return 1;
2024}
2025
2026/* Calculate noise level, based on measurements during network silence just
2027 * before arriving beacon. This measurement can be done only if we know
2028 * exactly when to expect beacons, therefore only when we're associated. */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002029static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002030{
2031 struct statistics_rx_non_phy *rx_info
2032 = &(priv->statistics.rx.general);
2033 int num_active_rx = 0;
2034 int total_silence = 0;
2035 int bcn_silence_a =
2036 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2037 int bcn_silence_b =
2038 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2039 int bcn_silence_c =
2040 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2041
2042 if (bcn_silence_a) {
2043 total_silence += bcn_silence_a;
2044 num_active_rx++;
2045 }
2046 if (bcn_silence_b) {
2047 total_silence += bcn_silence_b;
2048 num_active_rx++;
2049 }
2050 if (bcn_silence_c) {
2051 total_silence += bcn_silence_c;
2052 num_active_rx++;
2053 }
2054
2055 /* Average among active antennas */
2056 if (num_active_rx)
2057 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2058 else
2059 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2060
2061 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2062 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2063 priv->last_rx_noise);
2064}
2065
Tomas Winklera55360e2008-05-05 10:22:28 +08002066void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2067 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002068{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002069 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002070 int change;
2071 s32 temp;
2072
2073 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2074 (int)sizeof(priv->statistics), pkt->len);
2075
2076 change = ((priv->statistics.general.temperature !=
2077 pkt->u.stats.general.temperature) ||
2078 ((priv->statistics.flag &
2079 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2080 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2081
2082 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2083
2084 set_bit(STATUS_STATISTICS, &priv->status);
2085
2086 /* Reschedule the statistics timer to occur in
2087 * REG_RECALIB_PERIOD seconds to ensure we get a
2088 * thermal update even if the uCode doesn't give
2089 * us one */
2090 mod_timer(&priv->statistics_periodic, jiffies +
2091 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2092
2093 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2094 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2095 iwl4965_rx_calc_noise(priv);
Emmanuel Grumbach16e727e2008-06-12 09:46:52 +08002096 queue_work(priv->workqueue, &priv->run_time_calib_work);
Zhu Yib481de92007-09-25 17:54:57 -07002097 }
2098
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002099 iwl_leds_background(priv);
2100
Zhu Yib481de92007-09-25 17:54:57 -07002101 /* If the hardware hasn't reported a change in
2102 * temperature then don't bother computing a
2103 * calibrated temperature value */
2104 if (!change)
2105 return;
2106
2107 temp = iwl4965_get_temperature(priv);
2108 if (temp < 0)
2109 return;
2110
2111 if (priv->temperature != temp) {
2112 if (priv->temperature)
2113 IWL_DEBUG_TEMP("Temperature changed "
2114 "from %dC to %dC\n",
2115 KELVIN_TO_CELSIUS(priv->temperature),
2116 KELVIN_TO_CELSIUS(temp));
2117 else
2118 IWL_DEBUG_TEMP("Temperature "
2119 "initialized to %dC\n",
2120 KELVIN_TO_CELSIUS(temp));
2121 }
2122
2123 priv->temperature = temp;
2124 set_bit(STATUS_TEMPERATURE, &priv->status);
2125
2126 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2127 iwl4965_is_temp_calib_needed(priv))
2128 queue_work(priv->workqueue, &priv->txpower_work);
2129}
2130
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002131static void iwl4965_add_radiotap(struct iwl_priv *priv,
Zhu Yi12342c42007-12-20 11:27:32 +08002132 struct sk_buff *skb,
2133 struct iwl4965_rx_phy_res *rx_start,
2134 struct ieee80211_rx_status *stats,
2135 u32 ampdu_status)
2136{
Bruno Randolf566bfe52008-05-08 19:15:40 +02002137 s8 signal = stats->signal;
Zhu Yi12342c42007-12-20 11:27:32 +08002138 s8 noise = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01002139 int rate = stats->rate_idx;
Zhu Yi12342c42007-12-20 11:27:32 +08002140 u64 tsf = stats->mactime;
Johannes Berga0b484f2008-04-01 17:51:47 +02002141 __le16 antenna;
Zhu Yi12342c42007-12-20 11:27:32 +08002142 __le16 phy_flags_hw = rx_start->phy_flags;
2143 struct iwl4965_rt_rx_hdr {
2144 struct ieee80211_radiotap_header rt_hdr;
2145 __le64 rt_tsf; /* TSF */
2146 u8 rt_flags; /* radiotap packet flags */
2147 u8 rt_rate; /* rate in 500kb/s */
2148 __le16 rt_channelMHz; /* channel in MHz */
2149 __le16 rt_chbitmask; /* channel bitfield */
2150 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2151 s8 rt_dbmnoise;
2152 u8 rt_antenna; /* antenna number */
2153 } __attribute__ ((packed)) *iwl4965_rt;
2154
2155 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2156 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2157 if (net_ratelimit())
2158 printk(KERN_ERR "not enough headroom [%d] for "
Miguel Botón01c20982008-01-04 23:34:35 +01002159 "radiotap head [%zd]\n",
Zhu Yi12342c42007-12-20 11:27:32 +08002160 skb_headroom(skb), sizeof(*iwl4965_rt));
2161 return;
2162 }
2163
2164 /* put radiotap header in front of 802.11 header and data */
2165 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2166
2167 /* initialise radiotap header */
2168 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2169 iwl4965_rt->rt_hdr.it_pad = 0;
2170
2171 /* total header + data */
2172 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2173 &iwl4965_rt->rt_hdr.it_len);
2174
2175 /* Indicate all the fields we add to the radiotap header */
2176 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2177 (1 << IEEE80211_RADIOTAP_FLAGS) |
2178 (1 << IEEE80211_RADIOTAP_RATE) |
2179 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2180 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2181 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2182 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2183 &iwl4965_rt->rt_hdr.it_present);
2184
2185 /* Zero the flags, we'll add to them as we go */
2186 iwl4965_rt->rt_flags = 0;
2187
2188 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2189
2190 iwl4965_rt->rt_dbmsignal = signal;
2191 iwl4965_rt->rt_dbmnoise = noise;
2192
2193 /* Convert the channel frequency and set the flags */
2194 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2195 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2196 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2197 IEEE80211_CHAN_5GHZ),
2198 &iwl4965_rt->rt_chbitmask);
2199 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2200 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2201 IEEE80211_CHAN_2GHZ),
2202 &iwl4965_rt->rt_chbitmask);
2203 else /* 802.11g */
2204 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2205 IEEE80211_CHAN_2GHZ),
2206 &iwl4965_rt->rt_chbitmask);
2207
Zhu Yi12342c42007-12-20 11:27:32 +08002208 if (rate == -1)
2209 iwl4965_rt->rt_rate = 0;
2210 else
Tomas Winkler1826dcc2008-05-15 13:54:02 +08002211 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
Zhu Yi12342c42007-12-20 11:27:32 +08002212
2213 /*
2214 * "antenna number"
2215 *
2216 * It seems that the antenna field in the phy flags value
2217 * is actually a bitfield. This is undefined by radiotap,
2218 * it wants an actual antenna number but I always get "7"
2219 * for most legacy frames I receive indicating that the
2220 * same frame was received on all three RX chains.
2221 *
2222 * I think this field should be removed in favour of a
2223 * new 802.11n radiotap field "RX chains" that is defined
2224 * as a bitmask.
2225 */
Johannes Berga0b484f2008-04-01 17:51:47 +02002226 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2227 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
Zhu Yi12342c42007-12-20 11:27:32 +08002228
2229 /* set the preamble flag if appropriate */
2230 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2231 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2232
2233 stats->flag |= RX_FLAG_RADIOTAP;
2234}
2235
Tomas Winkler19758be2008-03-12 16:58:51 -07002236static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2237{
2238 /* 0 - mgmt, 1 - cnt, 2 - data */
2239 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2240 priv->rx_stats[idx].cnt++;
2241 priv->rx_stats[idx].bytes += len;
2242}
2243
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002244/*
2245 * returns non-zero if packet should be dropped
2246 */
2247static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2248 struct ieee80211_hdr *hdr,
2249 u32 decrypt_res,
2250 struct ieee80211_rx_status *stats)
2251{
2252 u16 fc = le16_to_cpu(hdr->frame_control);
2253
2254 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2255 return 0;
2256
2257 if (!(fc & IEEE80211_FCTL_PROTECTED))
2258 return 0;
2259
2260 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2261 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2262 case RX_RES_STATUS_SEC_TYPE_TKIP:
2263 /* The uCode has got a bad phase 1 Key, pushes the packet.
2264 * Decryption will be done in SW. */
2265 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2266 RX_RES_STATUS_BAD_KEY_TTAK)
2267 break;
2268
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +08002269 case RX_RES_STATUS_SEC_TYPE_WEP:
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002270 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2271 RX_RES_STATUS_BAD_ICV_MIC) {
2272 /* bad ICV, the packet is destroyed since the
2273 * decryption is inplace, drop it */
2274 IWL_DEBUG_RX("Packet destroyed\n");
2275 return -1;
2276 }
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002277 case RX_RES_STATUS_SEC_TYPE_CCMP:
2278 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2279 RX_RES_STATUS_DECRYPT_OK) {
2280 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2281 stats->flag |= RX_FLAG_DECRYPTED;
2282 }
2283 break;
2284
2285 default:
2286 break;
2287 }
2288 return 0;
2289}
2290
Ester Kummerbf403db2008-05-05 10:22:40 +08002291static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002292{
2293 u32 decrypt_out = 0;
2294
2295 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2296 RX_RES_STATUS_STATION_FOUND)
2297 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2298 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2299
2300 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2301
2302 /* packet was not encrypted */
2303 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2304 RX_RES_STATUS_SEC_TYPE_NONE)
2305 return decrypt_out;
2306
2307 /* packet was encrypted with unknown alg */
2308 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2309 RX_RES_STATUS_SEC_TYPE_ERR)
2310 return decrypt_out;
2311
2312 /* decryption was not done in HW */
2313 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2314 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2315 return decrypt_out;
2316
2317 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2318
2319 case RX_RES_STATUS_SEC_TYPE_CCMP:
2320 /* alg is CCM: check MIC only */
2321 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2322 /* Bad MIC */
2323 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2324 else
2325 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2326
2327 break;
2328
2329 case RX_RES_STATUS_SEC_TYPE_TKIP:
2330 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2331 /* Bad TTAK */
2332 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2333 break;
2334 }
2335 /* fall through if TTAK OK */
2336 default:
2337 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2338 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2339 else
2340 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2341 break;
2342 };
2343
2344 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2345 decrypt_in, decrypt_out);
2346
2347 return decrypt_out;
2348}
2349
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002350static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
Zhu Yib481de92007-09-25 17:54:57 -07002351 int include_phy,
Tomas Winklera55360e2008-05-05 10:22:28 +08002352 struct iwl_rx_mem_buffer *rxb,
Zhu Yib481de92007-09-25 17:54:57 -07002353 struct ieee80211_rx_status *stats)
2354{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002355 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002356 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2357 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2358 struct ieee80211_hdr *hdr;
2359 u16 len;
2360 __le32 *rx_end;
2361 unsigned int skblen;
2362 u32 ampdu_status;
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002363 u32 ampdu_status_legacy;
Zhu Yib481de92007-09-25 17:54:57 -07002364
2365 if (!include_phy && priv->last_phy_res[0])
2366 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2367
2368 if (!rx_start) {
2369 IWL_ERROR("MPDU frame without a PHY data\n");
2370 return;
2371 }
2372 if (include_phy) {
2373 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2374 rx_start->cfg_phy_cnt);
2375
2376 len = le16_to_cpu(rx_start->byte_count);
2377
2378 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2379 sizeof(struct iwl4965_rx_phy_res) +
2380 rx_start->cfg_phy_cnt + len);
2381
2382 } else {
2383 struct iwl4965_rx_mpdu_res_start *amsdu =
2384 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2385
2386 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2387 sizeof(struct iwl4965_rx_mpdu_res_start));
2388 len = le16_to_cpu(amsdu->byte_count);
2389 rx_start->byte_count = amsdu->byte_count;
2390 rx_end = (__le32 *) (((u8 *) hdr) + len);
2391 }
Abhijeet Kolekar4419e392008-05-05 10:22:47 +08002392 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2393 if (len > priv->hw_params.max_pkt_size ||
2394 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
Zhu Yi12342c42007-12-20 11:27:32 +08002395 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07002396 return;
2397 }
2398
2399 ampdu_status = le32_to_cpu(*rx_end);
2400 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2401
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002402 if (!include_phy) {
2403 /* New status scheme, need to translate */
2404 ampdu_status_legacy = ampdu_status;
Ester Kummerbf403db2008-05-05 10:22:40 +08002405 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002406 }
2407
Zhu Yib481de92007-09-25 17:54:57 -07002408 /* start from MAC */
2409 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2410 skb_put(rxb->skb, len); /* end where data ends */
2411
2412 /* We only process data packets if the interface is open */
2413 if (unlikely(!priv->is_open)) {
2414 IWL_DEBUG_DROP_LIMIT
2415 ("Dropping packet while interface is not open.\n");
2416 return;
2417 }
2418
Zhu Yib481de92007-09-25 17:54:57 -07002419 stats->flag = 0;
2420 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2421
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002422 /* in case of HW accelerated crypto and bad decryption, drop */
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07002423 if (!priv->hw_params.sw_crypto &&
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002424 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2425 return;
Zhu Yib481de92007-09-25 17:54:57 -07002426
Zhu Yi12342c42007-12-20 11:27:32 +08002427 if (priv->add_radiotap)
2428 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2429
Tomas Winkler19758be2008-03-12 16:58:51 -07002430 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
Zhu Yib481de92007-09-25 17:54:57 -07002431 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2432 priv->alloc_rxb_skb--;
2433 rxb->skb = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002434}
2435
2436/* Calc max signal level (dBm) among 3 possible receivers */
Ester Kummerbf403db2008-05-05 10:22:40 +08002437static int iwl4965_calc_rssi(struct iwl_priv *priv,
2438 struct iwl4965_rx_phy_res *rx_resp)
Zhu Yib481de92007-09-25 17:54:57 -07002439{
2440 /* data from PHY/DSP regarding signal strength, etc.,
2441 * contents are always there, not configurable by host. */
2442 struct iwl4965_rx_non_cfg_phy *ncphy =
2443 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2444 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2445 >> IWL_AGC_DB_POS;
2446
2447 u32 valid_antennae =
2448 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2449 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2450 u8 max_rssi = 0;
2451 u32 i;
2452
2453 /* Find max rssi among 3 possible receivers.
2454 * These values are measured by the digital signal processor (DSP).
2455 * They should stay fairly constant even as the signal strength varies,
2456 * if the radio's automatic gain control (AGC) is working right.
2457 * AGC value (see below) will provide the "interesting" info. */
2458 for (i = 0; i < 3; i++)
2459 if (valid_antennae & (1 << i))
2460 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2461
2462 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2463 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2464 max_rssi, agc);
2465
2466 /* dBm = max_rssi dB - agc dB - constant.
2467 * Higher AGC (higher radio gain) means lower signal. */
2468 return (max_rssi - agc - IWL_RSSI_OFFSET);
2469}
2470
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002471static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07002472{
2473 unsigned long flags;
2474
2475 spin_lock_irqsave(&priv->sta_lock, flags);
2476 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2477 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2478 priv->stations[sta_id].sta.sta.modify_mask = 0;
2479 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2480 spin_unlock_irqrestore(&priv->sta_lock, flags);
2481
Tomas Winkler133636d2008-05-05 10:22:34 +08002482 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002483}
2484
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002485static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
Zhu Yib481de92007-09-25 17:54:57 -07002486{
2487 /* FIXME: need locking over ps_status ??? */
Tomas Winkler947b13a2008-04-16 16:34:48 -07002488 u8 sta_id = iwl_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07002489
2490 if (sta_id != IWL_INVALID_STATION) {
2491 u8 sta_awake = priv->stations[sta_id].
2492 ps_status == STA_PS_STATUS_WAKE;
2493
2494 if (sta_awake && ps_bit)
2495 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2496 else if (!sta_awake && !ps_bit) {
2497 iwl4965_sta_modify_ps_wake(priv, sta_id);
2498 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2499 }
2500 }
2501}
Tomas Winkler0a6857e2008-03-12 16:58:49 -07002502#ifdef CONFIG_IWLWIFI_DEBUG
Tomas Winkler17744ff2008-03-02 01:52:00 +02002503
2504/**
2505 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2506 *
2507 * You may hack this function to show different aspects of received frames,
2508 * including selective frame dumps.
2509 * group100 parameter selects whether to show 1 out of 100 good frames.
2510 *
2511 * TODO: This was originally written for 3945, need to audit for
2512 * proper operation with 4965.
2513 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002514static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
Tomas Winklerdb11d632008-05-05 10:22:33 +08002515 struct iwl_rx_packet *pkt,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002516 struct ieee80211_hdr *header, int group100)
2517{
2518 u32 to_us;
2519 u32 print_summary = 0;
2520 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2521 u32 hundred = 0;
2522 u32 dataframe = 0;
2523 u16 fc;
2524 u16 seq_ctl;
2525 u16 channel;
2526 u16 phy_flags;
2527 int rate_sym;
2528 u16 length;
2529 u16 status;
2530 u16 bcn_tmr;
2531 u32 tsf_low;
2532 u64 tsf;
2533 u8 rssi;
2534 u8 agc;
2535 u16 sig_avg;
2536 u16 noise_diff;
2537 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2538 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2539 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2540 u8 *data = IWL_RX_DATA(pkt);
2541
Ester Kummerbf403db2008-05-05 10:22:40 +08002542 if (likely(!(priv->debug_level & IWL_DL_RX)))
Tomas Winkler17744ff2008-03-02 01:52:00 +02002543 return;
2544
2545 /* MAC header */
2546 fc = le16_to_cpu(header->frame_control);
2547 seq_ctl = le16_to_cpu(header->seq_ctrl);
2548
2549 /* metadata */
2550 channel = le16_to_cpu(rx_hdr->channel);
2551 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2552 rate_sym = rx_hdr->rate;
2553 length = le16_to_cpu(rx_hdr->len);
2554
2555 /* end-of-frame status and timestamp */
2556 status = le32_to_cpu(rx_end->status);
2557 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2558 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2559 tsf = le64_to_cpu(rx_end->timestamp);
2560
2561 /* signal statistics */
2562 rssi = rx_stats->rssi;
2563 agc = rx_stats->agc;
2564 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2565 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2566
2567 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2568
2569 /* if data frame is to us and all is good,
2570 * (optionally) print summary for only 1 out of every 100 */
2571 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2572 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2573 dataframe = 1;
2574 if (!group100)
2575 print_summary = 1; /* print each frame */
2576 else if (priv->framecnt_to_us < 100) {
2577 priv->framecnt_to_us++;
2578 print_summary = 0;
2579 } else {
2580 priv->framecnt_to_us = 0;
2581 print_summary = 1;
2582 hundred = 1;
2583 }
2584 } else {
2585 /* print summary for all other frames */
2586 print_summary = 1;
2587 }
2588
2589 if (print_summary) {
2590 char *title;
2591 int rate_idx;
2592 u32 bitrate;
2593
2594 if (hundred)
2595 title = "100Frames";
2596 else if (fc & IEEE80211_FCTL_RETRY)
2597 title = "Retry";
2598 else if (ieee80211_is_assoc_response(fc))
2599 title = "AscRsp";
2600 else if (ieee80211_is_reassoc_response(fc))
2601 title = "RasRsp";
2602 else if (ieee80211_is_probe_response(fc)) {
2603 title = "PrbRsp";
2604 print_dump = 1; /* dump frame contents */
2605 } else if (ieee80211_is_beacon(fc)) {
2606 title = "Beacon";
2607 print_dump = 1; /* dump frame contents */
2608 } else if (ieee80211_is_atim(fc))
2609 title = "ATIM";
2610 else if (ieee80211_is_auth(fc))
2611 title = "Auth";
2612 else if (ieee80211_is_deauth(fc))
2613 title = "DeAuth";
2614 else if (ieee80211_is_disassoc(fc))
2615 title = "DisAssoc";
2616 else
2617 title = "Frame";
2618
2619 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2620 if (unlikely(rate_idx == -1))
2621 bitrate = 0;
2622 else
Tomas Winkler1826dcc2008-05-15 13:54:02 +08002623 bitrate = iwl_rates[rate_idx].ieee / 2;
Tomas Winkler17744ff2008-03-02 01:52:00 +02002624
2625 /* print frame summary.
2626 * MAC addresses show just the last byte (for brevity),
2627 * but you can hack it to show more, if you'd like to. */
2628 if (dataframe)
2629 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2630 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2631 title, fc, header->addr1[5],
2632 length, rssi, channel, bitrate);
2633 else {
2634 /* src/dst addresses assume managed mode */
2635 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2636 "src=0x%02x, rssi=%u, tim=%lu usec, "
2637 "phy=0x%02x, chnl=%d\n",
2638 title, fc, header->addr1[5],
2639 header->addr3[5], rssi,
2640 tsf_low - priv->scan_start_tsf,
2641 phy_flags, channel);
2642 }
2643 }
2644 if (print_dump)
Ester Kummerbf403db2008-05-05 10:22:40 +08002645 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002646}
2647#else
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002648static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
Tomas Winklerdb11d632008-05-05 10:22:33 +08002649 struct iwl_rx_packet *pkt,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002650 struct ieee80211_hdr *header,
2651 int group100)
2652{
2653}
2654#endif
2655
Zhu Yib481de92007-09-25 17:54:57 -07002656
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002657
Tomas Winkler857485c2008-03-21 13:53:44 -07002658/* Called for REPLY_RX (legacy ABG frames), or
Zhu Yib481de92007-09-25 17:54:57 -07002659 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
Ron Rindjunsky37a44212008-05-29 16:35:18 +08002660void iwl4965_rx_reply_rx(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002661 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002662{
Tomas Winkler17744ff2008-03-02 01:52:00 +02002663 struct ieee80211_hdr *header;
2664 struct ieee80211_rx_status rx_status;
Tomas Winklerdb11d632008-05-05 10:22:33 +08002665 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002666 /* Use phy data (Rx signal strength, etc.) contained within
2667 * this rx packet for legacy frames,
2668 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
Tomas Winkler857485c2008-03-21 13:53:44 -07002669 int include_phy = (pkt->hdr.cmd == REPLY_RX);
Zhu Yib481de92007-09-25 17:54:57 -07002670 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2671 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2672 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2673 __le32 *rx_end;
2674 unsigned int len = 0;
Zhu Yib481de92007-09-25 17:54:57 -07002675 u16 fc;
Zhu Yib481de92007-09-25 17:54:57 -07002676 u8 network_packet;
2677
Tomas Winkler17744ff2008-03-02 01:52:00 +02002678 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
Tomas Winklerdc92e492008-04-03 16:05:22 -07002679 rx_status.freq =
Emmanuel Grumbachc0186072008-05-08 11:34:05 +08002680 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
Tomas Winkler17744ff2008-03-02 01:52:00 +02002681 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2682 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
Tomas Winklerdc92e492008-04-03 16:05:22 -07002683 rx_status.rate_idx =
2684 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
Tomas Winkler17744ff2008-03-02 01:52:00 +02002685 if (rx_status.band == IEEE80211_BAND_5GHZ)
2686 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2687
2688 rx_status.antenna = 0;
2689 rx_status.flag = 0;
2690
Zhu Yib481de92007-09-25 17:54:57 -07002691 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
Tomas Winklerdc92e492008-04-03 16:05:22 -07002692 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2693 rx_start->cfg_phy_cnt);
Zhu Yib481de92007-09-25 17:54:57 -07002694 return;
2695 }
Tomas Winkler17744ff2008-03-02 01:52:00 +02002696
Zhu Yib481de92007-09-25 17:54:57 -07002697 if (!include_phy) {
2698 if (priv->last_phy_res[0])
2699 rx_start = (struct iwl4965_rx_phy_res *)
2700 &priv->last_phy_res[1];
2701 else
2702 rx_start = NULL;
2703 }
2704
2705 if (!rx_start) {
2706 IWL_ERROR("MPDU frame without a PHY data\n");
2707 return;
2708 }
2709
2710 if (include_phy) {
2711 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2712 + rx_start->cfg_phy_cnt);
2713
2714 len = le16_to_cpu(rx_start->byte_count);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002715 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
Zhu Yib481de92007-09-25 17:54:57 -07002716 sizeof(struct iwl4965_rx_phy_res) + len);
2717 } else {
2718 struct iwl4965_rx_mpdu_res_start *amsdu =
2719 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2720
2721 header = (void *)(pkt->u.raw +
2722 sizeof(struct iwl4965_rx_mpdu_res_start));
2723 len = le16_to_cpu(amsdu->byte_count);
2724 rx_end = (__le32 *) (pkt->u.raw +
2725 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2726 }
2727
2728 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2729 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2730 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2731 le32_to_cpu(*rx_end));
2732 return;
2733 }
2734
2735 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2736
Zhu Yib481de92007-09-25 17:54:57 -07002737 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
Bruno Randolf566bfe52008-05-08 19:15:40 +02002738 rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
Zhu Yib481de92007-09-25 17:54:57 -07002739
2740 /* Meaningful noise values are available only from beacon statistics,
2741 * which are gathered only when associated, and indicate noise
2742 * only for the associated network channel ...
2743 * Ignore these noise values while scanning (other channels) */
Tomas Winkler3109ece2008-03-28 16:33:35 -07002744 if (iwl_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07002745 !test_bit(STATUS_SCANNING, &priv->status)) {
Tomas Winkler17744ff2008-03-02 01:52:00 +02002746 rx_status.noise = priv->last_rx_noise;
Bruno Randolf566bfe52008-05-08 19:15:40 +02002747 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002748 rx_status.noise);
Zhu Yib481de92007-09-25 17:54:57 -07002749 } else {
Tomas Winkler17744ff2008-03-02 01:52:00 +02002750 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
Bruno Randolf566bfe52008-05-08 19:15:40 +02002751 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002752 }
2753
2754 /* Reset beacon noise level if not associated. */
Tomas Winkler3109ece2008-03-28 16:33:35 -07002755 if (!iwl_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07002756 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2757
Tomas Winkler17744ff2008-03-02 01:52:00 +02002758 /* Set "1" to report good data frames in groups of 100 */
2759 /* FIXME: need to optimze the call: */
2760 iwl4965_dbg_report_frame(priv, pkt, header, 1);
Zhu Yib481de92007-09-25 17:54:57 -07002761
Tomas Winkler17744ff2008-03-02 01:52:00 +02002762 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
Bruno Randolf566bfe52008-05-08 19:15:40 +02002763 rx_status.signal, rx_status.noise, rx_status.signal,
John W. Linville06501d22008-04-01 17:38:47 -04002764 (unsigned long long)rx_status.mactime);
Zhu Yib481de92007-09-25 17:54:57 -07002765
Abhijeet Kolekar4419e392008-05-05 10:22:47 +08002766
2767 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2768 iwl4965_handle_data_packet(priv, 1, include_phy,
2769 rxb, &rx_status);
2770 return;
2771 }
2772
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002773 network_packet = iwl4965_is_network_packet(priv, header);
Zhu Yib481de92007-09-25 17:54:57 -07002774 if (network_packet) {
Bruno Randolf566bfe52008-05-08 19:15:40 +02002775 priv->last_rx_rssi = rx_status.signal;
Zhu Yib481de92007-09-25 17:54:57 -07002776 priv->last_beacon_time = priv->ucode_beacon_time;
2777 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2778 }
2779
2780 fc = le16_to_cpu(header->frame_control);
2781 switch (fc & IEEE80211_FCTL_FTYPE) {
2782 case IEEE80211_FTYPE_MGMT:
Zhu Yib481de92007-09-25 17:54:57 -07002783 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2784 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2785 header->addr2);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002786 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002787 break;
2788
2789 case IEEE80211_FTYPE_CTL:
Zhu Yib481de92007-09-25 17:54:57 -07002790 switch (fc & IEEE80211_FCTL_STYPE) {
2791 case IEEE80211_STYPE_BACK_REQ:
2792 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2793 iwl4965_handle_data_packet(priv, 0, include_phy,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002794 rxb, &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002795 break;
2796 default:
2797 break;
2798 }
Zhu Yib481de92007-09-25 17:54:57 -07002799 break;
2800
Joe Perches0795af52007-10-03 17:59:30 -07002801 case IEEE80211_FTYPE_DATA: {
2802 DECLARE_MAC_BUF(mac1);
2803 DECLARE_MAC_BUF(mac2);
2804 DECLARE_MAC_BUF(mac3);
2805
Zhu Yib481de92007-09-25 17:54:57 -07002806 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2807 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2808 header->addr2);
2809
2810 if (unlikely(!network_packet))
2811 IWL_DEBUG_DROP("Dropping (non network): "
Joe Perches0795af52007-10-03 17:59:30 -07002812 "%s, %s, %s\n",
2813 print_mac(mac1, header->addr1),
2814 print_mac(mac2, header->addr2),
2815 print_mac(mac3, header->addr3));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002816 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
Joe Perches0795af52007-10-03 17:59:30 -07002817 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2818 print_mac(mac1, header->addr1),
2819 print_mac(mac2, header->addr2),
2820 print_mac(mac3, header->addr3));
Zhu Yib481de92007-09-25 17:54:57 -07002821 else
2822 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002823 &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002824 break;
Joe Perches0795af52007-10-03 17:59:30 -07002825 }
Zhu Yib481de92007-09-25 17:54:57 -07002826 default:
2827 break;
2828
2829 }
2830}
2831
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002832/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002833 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2834 *
2835 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2836 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2837 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002838static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
Tomas Winkler6def9762008-05-05 10:22:31 +08002839 struct iwl_ht_agg *agg,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002840 struct iwl4965_compressed_ba_resp*
Zhu Yib481de92007-09-25 17:54:57 -07002841 ba_resp)
2842
2843{
2844 int i, sh, ack;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002845 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2846 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2847 u64 bitmap;
2848 int successes = 0;
Johannes Berge039fa42008-05-15 12:55:29 +02002849 struct ieee80211_tx_info *info;
Zhu Yib481de92007-09-25 17:54:57 -07002850
2851 if (unlikely(!agg->wait_for_ba)) {
2852 IWL_ERROR("Received BA when not expected\n");
2853 return -EINVAL;
2854 }
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002855
2856 /* Mark that the expected block-ack response arrived */
Zhu Yib481de92007-09-25 17:54:57 -07002857 agg->wait_for_ba = 0;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002858 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002859
2860 /* Calculate shift to align block-ack bits with our Tx window bits */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002861 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
Ian Schram01ebd062007-10-25 17:15:22 +08002862 if (sh < 0) /* tbw something is wrong with indices */
Zhu Yib481de92007-09-25 17:54:57 -07002863 sh += 0x100;
2864
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002865 /* don't use 64-bit values for now */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002866 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
Zhu Yib481de92007-09-25 17:54:57 -07002867
2868 if (agg->frame_count > (64 - sh)) {
2869 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
2870 return -1;
2871 }
2872
2873 /* check for success or failure according to the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002874 * transmitted bitmap and block-ack bitmap */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002875 bitmap &= agg->bitmap;
Zhu Yib481de92007-09-25 17:54:57 -07002876
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002877 /* For each frame attempted in aggregation,
2878 * update driver's record of tx frame's status. */
Zhu Yib481de92007-09-25 17:54:57 -07002879 for (i = 0; i < agg->frame_count ; i++) {
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002880 ack = bitmap & (1 << i);
2881 successes += !!ack;
Zhu Yib481de92007-09-25 17:54:57 -07002882 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002883 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
2884 agg->start_idx + i);
Zhu Yib481de92007-09-25 17:54:57 -07002885 }
2886
Johannes Berge039fa42008-05-15 12:55:29 +02002887 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
2888 memset(&info->status, 0, sizeof(info->status));
2889 info->flags = IEEE80211_TX_STAT_ACK;
2890 info->flags |= IEEE80211_TX_STAT_AMPDU;
2891 info->status.ampdu_ack_map = successes;
2892 info->status.ampdu_ack_len = agg->frame_count;
2893 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
Zhu Yib481de92007-09-25 17:54:57 -07002894
John W. Linvillef868f4e2008-03-07 16:38:43 -05002895 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002896
2897 return 0;
2898}
2899
2900/**
2901 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2902 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002903static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002904 u16 txq_id)
2905{
2906 /* Simply stop the queue, but don't change any configuration;
2907 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07002908 iwl_write_prph(priv,
Tomas Winkler12a81f62008-04-03 16:05:20 -07002909 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07002910 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
2911 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002912}
2913
2914/**
2915 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08002916 * priv->lock must be held by the caller
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002917 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08002918static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
2919 u16 ssn_idx, u8 tx_fifo)
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002920{
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08002921 int ret = 0;
2922
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002923 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
2924 IWL_WARNING("queue number too small: %d, must be > %d\n",
2925 txq_id, IWL_BACK_QUEUE_FIRST_ID);
2926 return -EINVAL;
2927 }
2928
Tomas Winkler3395f6e2008-03-25 16:33:37 -07002929 ret = iwl_grab_nic_access(priv);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08002930 if (ret)
2931 return ret;
2932
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002933 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2934
Tomas Winkler12a81f62008-04-03 16:05:20 -07002935 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002936
2937 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2938 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2939 /* supposes that ssn_idx is valid (!= 0xFFF) */
2940 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2941
Tomas Winkler12a81f62008-04-03 16:05:20 -07002942 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Ron Rindjunsky36470742008-05-15 13:54:10 +08002943 iwl_txq_ctx_deactivate(priv, txq_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002944 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
2945
Tomas Winkler3395f6e2008-03-25 16:33:37 -07002946 iwl_release_nic_access(priv);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08002947
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002948 return 0;
2949}
2950
Zhu Yib481de92007-09-25 17:54:57 -07002951
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002952/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002953 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
2954 *
2955 * Handles block-acknowledge notification from device, which reports success
2956 * of frames sent via aggregation.
2957 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002958static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002959 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002960{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002961 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002962 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
Zhu Yib481de92007-09-25 17:54:57 -07002963 int index;
Ron Rindjunsky16466902008-05-05 10:22:50 +08002964 struct iwl_tx_queue *txq = NULL;
Tomas Winkler6def9762008-05-05 10:22:31 +08002965 struct iwl_ht_agg *agg;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002966 DECLARE_MAC_BUF(mac);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002967
2968 /* "flow" corresponds to Tx queue */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002969 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002970
2971 /* "ssn" is start of block-ack Tx window, corresponds to index
2972 * (in Tx queue's circular buffer) of first TFD/frame in window */
Zhu Yib481de92007-09-25 17:54:57 -07002973 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
2974
Ron Rindjunskydfe7d452008-04-15 16:01:45 -07002975 if (scd_flow >= priv->hw_params.max_txq_num) {
Zhu Yib481de92007-09-25 17:54:57 -07002976 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
2977 return;
2978 }
2979
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002980 txq = &priv->txq[scd_flow];
Zhu Yib481de92007-09-25 17:54:57 -07002981 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002982
2983 /* Find index just before block-ack window */
Tomas Winkler443cfd42008-05-15 13:53:57 +08002984 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
Zhu Yib481de92007-09-25 17:54:57 -07002985
Ian Schram01ebd062007-10-25 17:15:22 +08002986 /* TODO: Need to get this copy more safely - now good for debug */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002987
Joe Perches0795af52007-10-03 17:59:30 -07002988 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
2989 "sta_id = %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07002990 agg->wait_for_ba,
Joe Perches0795af52007-10-03 17:59:30 -07002991 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
Zhu Yib481de92007-09-25 17:54:57 -07002992 ba_resp->sta_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002993 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
Zhu Yib481de92007-09-25 17:54:57 -07002994 "%d, scd_ssn = %d\n",
2995 ba_resp->tid,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02002996 ba_resp->seq_ctl,
Tomas Winkler0310ae72008-03-11 16:17:19 -07002997 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
Zhu Yib481de92007-09-25 17:54:57 -07002998 ba_resp->scd_flow,
2999 ba_resp->scd_ssn);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003000 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
Zhu Yib481de92007-09-25 17:54:57 -07003001 agg->start_idx,
John W. Linvillef868f4e2008-03-07 16:38:43 -05003002 (unsigned long long)agg->bitmap);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003003
3004 /* Update driver's record of ACK vs. not for each frame in window */
Zhu Yib481de92007-09-25 17:54:57 -07003005 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003006
3007 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3008 * block-ack window (we assume that they've been successfully
3009 * transmitted ... if not, it's too late anyway). */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003010 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
Ron Rindjunsky0d0b2c12008-05-04 14:48:18 +03003011 /* calculate mac80211 ampdu sw queue to wake */
3012 int ampdu_q =
3013 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
Tomas Winkler17b88922008-05-29 16:35:12 +08003014 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003015 priv->stations[ba_resp->sta_id].
3016 tid[ba_resp->tid].tfds_in_queue -= freed;
Tomas Winkler443cfd42008-05-15 13:53:57 +08003017 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003018 priv->mac80211_registered &&
3019 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
Ron Rindjunsky0d0b2c12008-05-04 14:48:18 +03003020 ieee80211_wake_queue(priv->hw, ampdu_q);
Tomas Winkler30e553e2008-05-29 16:35:16 +08003021
3022 iwl_txq_check_empty(priv, ba_resp->sta_id,
3023 ba_resp->tid, scd_flow);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003024 }
Zhu Yib481de92007-09-25 17:54:57 -07003025}
3026
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003027/**
3028 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3029 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003030static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
Zhu Yib481de92007-09-25 17:54:57 -07003031 u16 txq_id)
3032{
3033 u32 tbl_dw_addr;
3034 u32 tbl_dw;
3035 u16 scd_q2ratid;
3036
Tomas Winkler30e553e2008-05-29 16:35:16 +08003037 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07003038
3039 tbl_dw_addr = priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003040 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
Zhu Yib481de92007-09-25 17:54:57 -07003041
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003042 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003043
3044 if (txq_id & 0x1)
3045 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3046 else
3047 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3048
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003049 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
Zhu Yib481de92007-09-25 17:54:57 -07003050
3051 return 0;
3052}
3053
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003054
Zhu Yib481de92007-09-25 17:54:57 -07003055/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003056 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3057 *
3058 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3059 * i.e. it must be one of the higher queues used for aggregation
Zhu Yib481de92007-09-25 17:54:57 -07003060 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08003061static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
3062 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
Zhu Yib481de92007-09-25 17:54:57 -07003063{
3064 unsigned long flags;
Tomas Winkler30e553e2008-05-29 16:35:16 +08003065 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07003066 u16 ra_tid;
3067
3068 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3069 IWL_WARNING("queue number too small: %d, must be > %d\n",
3070 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3071
3072 ra_tid = BUILD_RAxTID(sta_id, tid);
3073
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003074 /* Modify device's station table to Tx this TID */
Tomas Winkler5083e562008-05-29 16:35:15 +08003075 iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
Zhu Yib481de92007-09-25 17:54:57 -07003076
3077 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler30e553e2008-05-29 16:35:16 +08003078 ret = iwl_grab_nic_access(priv);
3079 if (ret) {
Zhu Yib481de92007-09-25 17:54:57 -07003080 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winkler30e553e2008-05-29 16:35:16 +08003081 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07003082 }
3083
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003084 /* Stop this Tx queue before configuring it */
Zhu Yib481de92007-09-25 17:54:57 -07003085 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3086
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003087 /* Map receiver-address / traffic-ID to this queue */
Zhu Yib481de92007-09-25 17:54:57 -07003088 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3089
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003090 /* Set this queue as a chain-building queue */
Tomas Winkler12a81f62008-04-03 16:05:20 -07003091 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07003092
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003093 /* Place first TFD at index corresponding to start sequence number.
3094 * Assumes that ssn_idx is valid (!= 0xFFF) */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003095 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3096 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
Zhu Yib481de92007-09-25 17:54:57 -07003097 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3098
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003099 /* Set up Tx window size and frame limit for this queue */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003100 iwl_write_targ_mem(priv,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003101 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3102 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3103 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07003104
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003105 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003106 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3107 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3108 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07003109
Tomas Winkler12a81f62008-04-03 16:05:20 -07003110 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07003111
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003112 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
Zhu Yib481de92007-09-25 17:54:57 -07003113 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3114
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003115 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003116 spin_unlock_irqrestore(&priv->lock, flags);
3117
3118 return 0;
3119}
3120
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003121static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3122 const u8 *addr, int tid, u16 ssn)
Zhu Yib481de92007-09-25 17:54:57 -07003123{
3124 unsigned long flags;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003125 int sta_id;
3126
3127 sta_id = iwl_find_station(priv, addr);
3128 if (sta_id == IWL_INVALID_STATION)
3129 return -ENXIO;
Zhu Yib481de92007-09-25 17:54:57 -07003130
3131 spin_lock_irqsave(&priv->sta_lock, flags);
3132 priv->stations[sta_id].sta.station_flags_msk = 0;
3133 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3134 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3135 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3136 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3137 spin_unlock_irqrestore(&priv->sta_lock, flags);
3138
Tomas Winkler133636d2008-05-05 10:22:34 +08003139 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003140 CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07003141}
3142
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003143static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3144 const u8 *addr, int tid)
Zhu Yib481de92007-09-25 17:54:57 -07003145{
3146 unsigned long flags;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003147 int sta_id;
3148
3149 sta_id = iwl_find_station(priv, addr);
3150 if (sta_id == IWL_INVALID_STATION)
3151 return -ENXIO;
Zhu Yib481de92007-09-25 17:54:57 -07003152
3153 spin_lock_irqsave(&priv->sta_lock, flags);
3154 priv->stations[sta_id].sta.station_flags_msk = 0;
3155 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3156 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3157 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3158 spin_unlock_irqrestore(&priv->sta_lock, flags);
3159
Tomas Winkler133636d2008-05-05 10:22:34 +08003160 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003161 CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07003162}
3163
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003164int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3165 enum ieee80211_ampdu_mlme_action action,
3166 const u8 *addr, u16 tid, u16 *ssn)
3167{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003168 struct iwl_priv *priv = hw->priv;
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003169 DECLARE_MAC_BUF(mac);
3170
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003171 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3172 print_mac(mac, addr), tid);
3173
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003174 switch (action) {
3175 case IEEE80211_AMPDU_RX_START:
3176 IWL_DEBUG_HT("start Rx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003177 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003178 case IEEE80211_AMPDU_RX_STOP:
3179 IWL_DEBUG_HT("stop Rx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003180 return iwl4965_rx_agg_stop(priv, addr, tid);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003181 case IEEE80211_AMPDU_TX_START:
3182 IWL_DEBUG_HT("start Tx\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08003183 return iwl_tx_agg_start(priv, addr, tid, ssn);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003184 case IEEE80211_AMPDU_TX_STOP:
3185 IWL_DEBUG_HT("stop Tx\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08003186 return iwl_tx_agg_stop(priv, addr, tid);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003187 default:
3188 IWL_DEBUG_HT("unknown\n");
3189 return -EINVAL;
3190 break;
3191 }
3192 return 0;
3193}
Tomas Winkler133636d2008-05-05 10:22:34 +08003194
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08003195static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
3196{
3197 switch (cmd_id) {
3198 case REPLY_RXON:
3199 return (u16) sizeof(struct iwl4965_rxon_cmd);
3200 default:
3201 return len;
3202 }
3203}
3204
Tomas Winkler133636d2008-05-05 10:22:34 +08003205static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3206{
3207 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3208 addsta->mode = cmd->mode;
3209 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3210 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3211 addsta->station_flags = cmd->station_flags;
3212 addsta->station_flags_msk = cmd->station_flags_msk;
3213 addsta->tid_disable_tx = cmd->tid_disable_tx;
3214 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3215 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3216 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3217 addsta->reserved1 = __constant_cpu_to_le16(0);
3218 addsta->reserved2 = __constant_cpu_to_le32(0);
3219
3220 return (u16)sizeof(struct iwl4965_addsta_cmd);
3221}
Tomas Winklerf20217d2008-05-29 16:35:10 +08003222
Tomas Winklerf20217d2008-05-29 16:35:10 +08003223static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3224{
3225 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3226 tx_resp->frame_count);
3227 return le32_to_cpu(*scd_ssn) & MAX_SN;
3228
3229}
3230
3231/**
3232 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3233 */
3234static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
3235 struct iwl_ht_agg *agg,
3236 struct iwl4965_tx_resp_agg *tx_resp,
3237 u16 start_idx)
3238{
3239 u16 status;
3240 struct agg_tx_status *frame_status = &tx_resp->status;
3241 struct ieee80211_tx_info *info = NULL;
3242 struct ieee80211_hdr *hdr = NULL;
3243 int i, sh;
3244 int txq_id, idx;
3245 u16 seq;
3246
3247 if (agg->wait_for_ba)
3248 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3249
3250 agg->frame_count = tx_resp->frame_count;
3251 agg->start_idx = start_idx;
3252 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3253 agg->bitmap = 0;
3254
3255 /* # frames attempted by Tx command */
3256 if (agg->frame_count == 1) {
3257 /* Only one frame was attempted; no block-ack will arrive */
3258 status = le16_to_cpu(frame_status[0].status);
3259 seq = le16_to_cpu(frame_status[0].sequence);
3260 idx = SEQ_TO_INDEX(seq);
3261 txq_id = SEQ_TO_QUEUE(seq);
3262
3263 /* FIXME: code repetition */
3264 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3265 agg->frame_count, agg->start_idx, idx);
3266
3267 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
3268 info->status.retry_count = tx_resp->failure_frame;
3269 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
3270 info->flags |= iwl_is_tx_success(status)?
3271 IEEE80211_TX_STAT_ACK : 0;
3272 iwl4965_hwrate_to_tx_control(priv,
3273 le32_to_cpu(tx_resp->rate_n_flags),
3274 info);
3275 /* FIXME: code repetition end */
3276
3277 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3278 status & 0xff, tx_resp->failure_frame);
3279 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
3280 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
3281
3282 agg->wait_for_ba = 0;
3283 } else {
3284 /* Two or more frames were attempted; expect block-ack */
3285 u64 bitmap = 0;
3286 int start = agg->start_idx;
3287
3288 /* Construct bit-map of pending frames within Tx window */
3289 for (i = 0; i < agg->frame_count; i++) {
3290 u16 sc;
3291 status = le16_to_cpu(frame_status[i].status);
3292 seq = le16_to_cpu(frame_status[i].sequence);
3293 idx = SEQ_TO_INDEX(seq);
3294 txq_id = SEQ_TO_QUEUE(seq);
3295
3296 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3297 AGG_TX_STATE_ABORT_MSK))
3298 continue;
3299
3300 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3301 agg->frame_count, txq_id, idx);
3302
3303 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
3304
3305 sc = le16_to_cpu(hdr->seq_ctrl);
3306 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3307 IWL_ERROR("BUG_ON idx doesn't match seq control"
3308 " idx=%d, seq_idx=%d, seq=%d\n",
3309 idx, SEQ_TO_SN(sc),
3310 hdr->seq_ctrl);
3311 return -1;
3312 }
3313
3314 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3315 i, idx, SEQ_TO_SN(sc));
3316
3317 sh = idx - start;
3318 if (sh > 64) {
3319 sh = (start - idx) + 0xff;
3320 bitmap = bitmap << sh;
3321 sh = 0;
3322 start = idx;
3323 } else if (sh < -64)
3324 sh = 0xff - (start - idx);
3325 else if (sh < 0) {
3326 sh = start - idx;
3327 start = idx;
3328 bitmap = bitmap << sh;
3329 sh = 0;
3330 }
3331 bitmap |= (1 << sh);
3332 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3333 start, (u32)(bitmap & 0xFFFFFFFF));
3334 }
3335
3336 agg->bitmap = bitmap;
3337 agg->start_idx = start;
3338 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3339 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
3340 agg->frame_count, agg->start_idx,
3341 (unsigned long long)agg->bitmap);
3342
3343 if (bitmap)
3344 agg->wait_for_ba = 1;
3345 }
3346 return 0;
3347}
Tomas Winklerf20217d2008-05-29 16:35:10 +08003348
3349/**
3350 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3351 */
3352static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
3353 struct iwl_rx_mem_buffer *rxb)
3354{
3355 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3356 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3357 int txq_id = SEQ_TO_QUEUE(sequence);
3358 int index = SEQ_TO_INDEX(sequence);
3359 struct iwl_tx_queue *txq = &priv->txq[txq_id];
3360 struct ieee80211_tx_info *info;
3361 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3362 u32 status = le32_to_cpu(tx_resp->status);
Tomas Winklerf20217d2008-05-29 16:35:10 +08003363 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3364 u16 fc;
3365 struct ieee80211_hdr *hdr;
3366 u8 *qc = NULL;
Tomas Winklerf20217d2008-05-29 16:35:10 +08003367
3368 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
3369 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3370 "is out of range [0-%d] %d %d\n", txq_id,
3371 index, txq->q.n_bd, txq->q.write_ptr,
3372 txq->q.read_ptr);
3373 return;
3374 }
3375
3376 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
3377 memset(&info->status, 0, sizeof(info->status));
3378
Tomas Winklerf20217d2008-05-29 16:35:10 +08003379 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
3380 fc = le16_to_cpu(hdr->frame_control);
3381 if (ieee80211_is_qos_data(fc)) {
3382 qc = ieee80211_get_qos_ctrl(hdr, ieee80211_get_hdrlen(fc));
3383 tid = qc[0] & 0xf;
3384 }
3385
3386 sta_id = iwl_get_ra_sta_id(priv, hdr);
3387 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3388 IWL_ERROR("Station not known\n");
3389 return;
3390 }
3391
3392 if (txq->sched_retry) {
3393 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3394 struct iwl_ht_agg *agg = NULL;
3395
3396 if (!qc)
3397 return;
3398
3399 agg = &priv->stations[sta_id].tid[tid].agg;
3400
3401 iwl4965_tx_status_reply_tx(priv, agg,
3402 (struct iwl4965_tx_resp_agg *)tx_resp, index);
3403
3404 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status)) {
3405 /* TODO: send BAR */
3406 }
3407
3408 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3409 int freed, ampdu_q;
3410 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3411 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3412 "%d index %d\n", scd_ssn , index);
Tomas Winkler17b88922008-05-29 16:35:12 +08003413 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08003414 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3415
3416 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3417 txq_id >= 0 && priv->mac80211_registered &&
3418 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
3419 /* calculate mac80211 ampdu sw queue to wake */
3420 ampdu_q = txq_id - IWL_BACK_QUEUE_FIRST_ID +
3421 priv->hw->queues;
3422 if (agg->state == IWL_AGG_OFF)
3423 ieee80211_wake_queue(priv->hw, txq_id);
3424 else
3425 ieee80211_wake_queue(priv->hw, ampdu_q);
3426 }
Tomas Winkler30e553e2008-05-29 16:35:16 +08003427 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08003428 }
3429 } else {
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03003430 info->status.retry_count = tx_resp->failure_frame;
3431 info->flags |=
3432 iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
3433 iwl4965_hwrate_to_tx_control(priv,
3434 le32_to_cpu(tx_resp->rate_n_flags),
3435 info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08003436
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03003437 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
3438 "0x%x retries %d\n", txq_id,
3439 iwl_get_tx_fail_reason(status),
3440 status, le32_to_cpu(tx_resp->rate_n_flags),
3441 tx_resp->failure_frame);
Tomas Winklerf20217d2008-05-29 16:35:10 +08003442
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03003443 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3444 if (index != -1) {
3445 int freed = iwl_tx_queue_reclaim(priv, txq_id, index);
3446 if (tid != MAX_TID_COUNT)
Tomas Winklerf20217d2008-05-29 16:35:10 +08003447 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03003448 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
Tomas Winklerf20217d2008-05-29 16:35:10 +08003449 (txq_id >= 0) && priv->mac80211_registered)
3450 ieee80211_wake_queue(priv->hw, txq_id);
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03003451 if (tid != MAX_TID_COUNT)
Tomas Winkler30e553e2008-05-29 16:35:16 +08003452 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03003453 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08003454 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08003455
3456 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3457 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3458}
3459
3460
Zhu Yib481de92007-09-25 17:54:57 -07003461/* Set up 4965-specific Rx frame reply handlers */
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07003462static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003463{
3464 /* Legacy Rx frames */
Tomas Winkler857485c2008-03-21 13:53:44 -07003465 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
Ron Rindjunsky37a44212008-05-29 16:35:18 +08003466 /* Tx response */
Tomas Winklerf20217d2008-05-29 16:35:10 +08003467 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03003468 /* block ack */
Zhu Yib481de92007-09-25 17:54:57 -07003469 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
Zhu Yib481de92007-09-25 17:54:57 -07003470}
3471
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003472void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003473{
3474 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07003475 init_timer(&priv->statistics_periodic);
3476 priv->statistics_periodic.data = (unsigned long)priv;
3477 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3478}
3479
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003480void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003481{
3482 del_timer_sync(&priv->statistics_periodic);
3483
3484 cancel_delayed_work(&priv->init_alive_start);
3485}
3486
Tomas Winkler3c424c22008-04-15 16:01:42 -07003487
3488static struct iwl_hcmd_ops iwl4965_hcmd = {
Tomas Winkler7e8c5192008-04-15 16:01:43 -07003489 .rxon_assoc = iwl4965_send_rxon_assoc,
Tomas Winkler3c424c22008-04-15 16:01:42 -07003490};
3491
Tomas Winkler857485c2008-03-21 13:53:44 -07003492static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08003493 .get_hcmd_size = iwl4965_get_hcmd_size,
Tomas Winkler133636d2008-05-05 10:22:34 +08003494 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07003495 .chain_noise_reset = iwl4965_chain_noise_reset,
3496 .gain_computation = iwl4965_gain_computation,
Tomas Winkler857485c2008-03-21 13:53:44 -07003497};
3498
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003499static struct iwl_lib_ops iwl4965_lib = {
Tomas Winkler5425e492008-04-15 16:01:38 -07003500 .set_hw_params = iwl4965_hw_set_hw_params,
Ron Rindjunsky399f4902008-04-23 17:14:56 -07003501 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3502 .free_shared_mem = iwl4965_free_shared_mem,
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08003503 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
Tomas Winklere2a722e2008-04-14 21:16:10 -07003504 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
Tomas Winklerda1bc452008-05-29 16:35:00 +08003505 .txq_set_sched = iwl4965_txq_set_sched,
Tomas Winkler30e553e2008-05-29 16:35:16 +08003506 .txq_agg_enable = iwl4965_txq_agg_enable,
3507 .txq_agg_disable = iwl4965_txq_agg_disable,
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07003508 .rx_handler_setup = iwl4965_rx_handler_setup,
Tomas Winkler57aab752008-04-14 21:16:03 -07003509 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3510 .alive_notify = iwl4965_alive_notify,
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +08003511 .init_alive_start = iwl4965_init_alive_start,
Tomas Winkler57aab752008-04-14 21:16:03 -07003512 .load_ucode = iwl4965_load_bsm,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07003513 .apm_ops = {
Tomas Winkler91238712008-04-23 17:14:53 -07003514 .init = iwl4965_apm_init,
Tomas Winkler7f066102008-05-29 16:34:57 +08003515 .reset = iwl4965_apm_reset,
Tomas Winklerf118a912008-05-29 16:34:58 +08003516 .stop = iwl4965_apm_stop,
Tomas Winkler694cc562008-04-24 11:55:22 -07003517 .config = iwl4965_nic_config,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07003518 .set_pwr_src = iwl4965_set_pwr_src,
3519 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003520 .eeprom_ops = {
Tomas Winkler073d3f52008-04-21 15:41:52 -07003521 .regulatory_bands = {
3522 EEPROM_REGULATORY_BAND_1_CHANNELS,
3523 EEPROM_REGULATORY_BAND_2_CHANNELS,
3524 EEPROM_REGULATORY_BAND_3_CHANNELS,
3525 EEPROM_REGULATORY_BAND_4_CHANNELS,
3526 EEPROM_REGULATORY_BAND_5_CHANNELS,
3527 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3528 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3529 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003530 .verify_signature = iwlcore_eeprom_verify_signature,
3531 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3532 .release_semaphore = iwlcore_eeprom_release_semaphore,
Tomas Winkler8614f362008-04-23 17:14:55 -07003533 .check_version = iwl4965_eeprom_check_version,
Tomas Winkler073d3f52008-04-21 15:41:52 -07003534 .query_addr = iwlcore_eeprom_query_addr,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003535 },
Mohamed Abbasad97edd2008-03-28 16:21:06 -07003536 .radio_kill_sw = iwl4965_radio_kill_sw,
Mohamed Abbas5da4b552008-04-21 15:41:51 -07003537 .set_power = iwl4965_set_power,
3538 .update_chain_flags = iwl4965_update_chain_flags,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003539};
3540
3541static struct iwl_ops iwl4965_ops = {
3542 .lib = &iwl4965_lib,
Tomas Winkler3c424c22008-04-15 16:01:42 -07003543 .hcmd = &iwl4965_hcmd,
Tomas Winkler857485c2008-03-21 13:53:44 -07003544 .utils = &iwl4965_hcmd_utils,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003545};
3546
Ron Rindjunskyfed90172008-04-15 16:01:41 -07003547struct iwl_cfg iwl4965_agn_cfg = {
Tomas Winkler82b9a122008-03-04 18:09:30 -08003548 .name = "4965AGN",
Tomas Winkler4bf775c2008-03-04 18:09:31 -08003549 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
Tomas Winkler82b9a122008-03-04 18:09:30 -08003550 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
Tomas Winkler073d3f52008-04-21 15:41:52 -07003551 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003552 .ops = &iwl4965_ops,
Assaf Krauss1ea87392008-03-18 14:57:50 -07003553 .mod_params = &iwl4965_mod_params,
Tomas Winkler82b9a122008-03-04 18:09:30 -08003554};
3555
Assaf Krauss1ea87392008-03-18 14:57:50 -07003556module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3557MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3558module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3559MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Emmanuel Grumbachfcc76c62008-04-15 16:01:47 -07003560module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3561MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
Assaf Krauss1ea87392008-03-18 14:57:50 -07003562module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3563MODULE_PARM_DESC(debug, "debug output mask");
3564module_param_named(
3565 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3566MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3567
3568module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3569MODULE_PARM_DESC(queues_num, "number of hw queues.");
3570
3571/* QoS */
3572module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3573MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3574module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3575MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Ester Kummer3a1081e2008-05-06 11:05:14 +08003576module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3577MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");