| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * arch/m68k/q40/q40ints.c | 
 | 3 |  * | 
 | 4 |  * Copyright (C) 1999,2001 Richard Zidlicky | 
 | 5 |  * | 
 | 6 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 7 |  * License.  See the file COPYING in the main directory of this archive | 
 | 8 |  * for more details. | 
 | 9 |  * | 
 | 10 |  * .. used to be loosely based on bvme6000ints.c | 
 | 11 |  * | 
 | 12 |  */ | 
 | 13 |  | 
 | 14 | #include <linux/types.h> | 
 | 15 | #include <linux/kernel.h> | 
 | 16 | #include <linux/errno.h> | 
 | 17 | #include <linux/string.h> | 
 | 18 | #include <linux/sched.h> | 
 | 19 | #include <linux/seq_file.h> | 
 | 20 | #include <linux/interrupt.h> | 
 | 21 | #include <linux/hardirq.h> | 
 | 22 |  | 
 | 23 | #include <asm/rtc.h> | 
 | 24 | #include <asm/ptrace.h> | 
 | 25 | #include <asm/system.h> | 
 | 26 | #include <asm/irq.h> | 
 | 27 | #include <asm/traps.h> | 
 | 28 |  | 
 | 29 | #include <asm/q40_master.h> | 
 | 30 | #include <asm/q40ints.h> | 
 | 31 |  | 
 | 32 | /* | 
 | 33 |  * Q40 IRQs are defined as follows: | 
 | 34 |  *            3,4,5,6,7,10,11,14,15 : ISA dev IRQs | 
 | 35 |  *            16-31: reserved | 
 | 36 |  *            32   : keyboard int | 
 | 37 |  *            33   : frame int (50/200 Hz periodic timer) | 
 | 38 |  *            34   : sample int (10/20 KHz periodic timer) | 
 | 39 |  * | 
 | 40 | */ | 
 | 41 |  | 
 | 42 | extern int ints_inited; | 
 | 43 |  | 
 | 44 |  | 
 | 45 | irqreturn_t q40_irq2_handler (int, void *, struct pt_regs *fp); | 
 | 46 |  | 
 | 47 |  | 
 | 48 | static irqreturn_t q40_defhand (int irq, void *dev_id, struct pt_regs *fp); | 
 | 49 | static irqreturn_t default_handler(int lev, void *dev_id, struct pt_regs *regs); | 
 | 50 |  | 
 | 51 |  | 
 | 52 | #define DEVNAME_SIZE 24 | 
 | 53 |  | 
 | 54 | static struct q40_irq_node { | 
 | 55 | 	irqreturn_t	(*handler)(int, void *, struct pt_regs *); | 
 | 56 | 	unsigned long	flags; | 
 | 57 | 	void		*dev_id; | 
 | 58 |   /*        struct q40_irq_node *next;*/ | 
 | 59 |         char	        devname[DEVNAME_SIZE]; | 
 | 60 | 	unsigned	count; | 
 | 61 |         unsigned short  state; | 
 | 62 | } irq_tab[Q40_IRQ_MAX+1]; | 
 | 63 |  | 
 | 64 | short unsigned q40_ablecount[Q40_IRQ_MAX+1]; | 
 | 65 |  | 
 | 66 | /* | 
 | 67 |  * void q40_init_IRQ (void) | 
 | 68 |  * | 
 | 69 |  * Parameters:	None | 
 | 70 |  * | 
 | 71 |  * Returns:	Nothing | 
 | 72 |  * | 
 | 73 |  * This function is called during kernel startup to initialize | 
 | 74 |  * the q40 IRQ handling routines. | 
 | 75 |  */ | 
 | 76 |  | 
 | 77 | static int disabled=0; | 
 | 78 |  | 
 | 79 | void q40_init_IRQ (void) | 
 | 80 | { | 
 | 81 | 	int i; | 
 | 82 |  | 
 | 83 | 	disabled=0; | 
 | 84 | 	for (i = 0; i <= Q40_IRQ_MAX; i++) { | 
 | 85 | 		irq_tab[i].handler = q40_defhand; | 
 | 86 | 		irq_tab[i].flags = 0; | 
 | 87 | 		irq_tab[i].dev_id = NULL; | 
 | 88 | 		/*		irq_tab[i].next = NULL;*/ | 
 | 89 | 		irq_tab[i].devname[0] = 0; | 
 | 90 | 		irq_tab[i].count = 0; | 
 | 91 | 		irq_tab[i].state =0; | 
 | 92 | 		q40_ablecount[i]=0;   /* all enabled */ | 
 | 93 | 	} | 
 | 94 |  | 
 | 95 | 	/* setup handler for ISA ints */ | 
 | 96 | 	cpu_request_irq(IRQ2, q40_irq2_handler, 0, "q40 ISA and master chip", | 
 | 97 | 			NULL); | 
 | 98 |  | 
 | 99 | 	/* now enable some ints.. */ | 
 | 100 | 	master_outb(1,EXT_ENABLE_REG);  /* ISA IRQ 5-15 */ | 
 | 101 |  | 
 | 102 | 	/* make sure keyboard IRQ is disabled */ | 
 | 103 | 	master_outb(0,KEY_IRQ_ENABLE_REG); | 
 | 104 | } | 
 | 105 |  | 
 | 106 | int q40_request_irq(unsigned int irq, | 
 | 107 | 		irqreturn_t (*handler)(int, void *, struct pt_regs *), | 
 | 108 |                 unsigned long flags, const char *devname, void *dev_id) | 
 | 109 | { | 
 | 110 |   /*printk("q40_request_irq %d, %s\n",irq,devname);*/ | 
 | 111 |  | 
 | 112 | 	if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) { | 
 | 113 | 		printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname); | 
 | 114 | 		return -ENXIO; | 
 | 115 | 	} | 
 | 116 |  | 
 | 117 | 	/* test for ISA ints not implemented by HW */ | 
 | 118 | 	switch (irq) | 
 | 119 | 	  { | 
 | 120 | 	  case 1: case 2: case 8: case 9: | 
 | 121 | 	  case 12: case 13: | 
 | 122 | 	    printk("%s: ISA IRQ %d from %s not implemented by HW\n", __FUNCTION__, irq, devname); | 
 | 123 | 	    return -ENXIO; | 
 | 124 | 	  case 11: | 
 | 125 | 	    printk("warning IRQ 10 and 11 not distinguishable\n"); | 
 | 126 | 	    irq=10; | 
 | 127 | 	  default: | 
 | 128 | 	    ; | 
 | 129 | 	  } | 
 | 130 |  | 
 | 131 | 	if (irq<Q40_IRQ_SAMPLE) | 
 | 132 | 	  { | 
 | 133 | 	    if (irq_tab[irq].dev_id != NULL) | 
 | 134 | 		  { | 
 | 135 | 		    printk("%s: IRQ %d from %s is not replaceable\n", | 
 | 136 | 			   __FUNCTION__, irq, irq_tab[irq].devname); | 
 | 137 | 		    return -EBUSY; | 
 | 138 | 		  } | 
 | 139 | 	    /*printk("IRQ %d set to handler %p\n",irq,handler);*/ | 
 | 140 | 	    if (dev_id==NULL) | 
 | 141 | 		  { | 
 | 142 | 		printk("WARNING: dev_id == NULL in request_irq\n"); | 
 | 143 | 		dev_id=(void*)1; | 
 | 144 | 	      } | 
 | 145 | 	    irq_tab[irq].handler = handler; | 
 | 146 | 	    irq_tab[irq].flags   = flags; | 
 | 147 | 	    irq_tab[irq].dev_id  = dev_id; | 
 | 148 | 	    strlcpy(irq_tab[irq].devname,devname,sizeof(irq_tab[irq].devname)); | 
 | 149 | 	    irq_tab[irq].state = 0; | 
 | 150 | 	    return 0; | 
 | 151 | 	  } | 
 | 152 | 	else { | 
 | 153 | 	  /* Q40_IRQ_SAMPLE :somewhat special actions required here ..*/ | 
 | 154 | 	  cpu_request_irq(4, handler, flags, devname, dev_id); | 
 | 155 | 	  cpu_request_irq(6, handler, flags, devname, dev_id); | 
 | 156 | 	  return 0; | 
 | 157 | 	} | 
 | 158 | } | 
 | 159 |  | 
 | 160 | void q40_free_irq(unsigned int irq, void *dev_id) | 
 | 161 | { | 
 | 162 | 	if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) { | 
 | 163 | 		printk("%s: Incorrect IRQ %d, dev_id %x \n", __FUNCTION__, irq, (unsigned)dev_id); | 
 | 164 | 		return; | 
 | 165 | 	} | 
 | 166 |  | 
 | 167 | 	/* test for ISA ints not implemented by HW */ | 
 | 168 | 	switch (irq) | 
 | 169 | 	  { | 
 | 170 | 	  case 1: case 2: case 8: case 9: | 
 | 171 | 	  case 12: case 13: | 
 | 172 | 	    printk("%s: ISA IRQ %d from %x invalid\n", __FUNCTION__, irq, (unsigned)dev_id); | 
 | 173 | 	    return; | 
 | 174 | 	  case 11: irq=10; | 
 | 175 | 	  default: | 
 | 176 | 	    ; | 
 | 177 | 	  } | 
 | 178 |  | 
 | 179 | 	if (irq<Q40_IRQ_SAMPLE) | 
 | 180 | 	  { | 
 | 181 | 	    if (irq_tab[irq].dev_id != dev_id) | 
 | 182 | 	      printk("%s: Removing probably wrong IRQ %d from %s\n", | 
 | 183 | 		     __FUNCTION__, irq, irq_tab[irq].devname); | 
 | 184 |  | 
 | 185 | 	    irq_tab[irq].handler = q40_defhand; | 
 | 186 | 	    irq_tab[irq].flags   = 0; | 
 | 187 | 	    irq_tab[irq].dev_id  = NULL; | 
 | 188 | 	    /* irq_tab[irq].devname = NULL; */ | 
 | 189 | 	    /* do not reset state !! */ | 
 | 190 | 	  } | 
 | 191 | 	else | 
 | 192 | 	  { /* == Q40_IRQ_SAMPLE */ | 
 | 193 | 	    cpu_free_irq(4, dev_id); | 
 | 194 | 	    cpu_free_irq(6, dev_id); | 
 | 195 | 	  } | 
 | 196 | } | 
 | 197 |  | 
 | 198 |  | 
 | 199 | irqreturn_t q40_process_int (int level, struct pt_regs *fp) | 
 | 200 | { | 
 | 201 |   printk("unexpected interrupt vec=%x, pc=%lx, d0=%lx, d0_orig=%lx, d1=%lx, d2=%lx\n", | 
 | 202 |           level, fp->pc, fp->d0, fp->orig_d0, fp->d1, fp->d2); | 
 | 203 |   printk("\tIIRQ_REG = %x, EIRQ_REG = %x\n",master_inb(IIRQ_REG),master_inb(EIRQ_REG)); | 
 | 204 |   return IRQ_HANDLED; | 
 | 205 | } | 
 | 206 |  | 
 | 207 | /* | 
 | 208 |  * this stuff doesn't really belong here.. | 
 | 209 | */ | 
 | 210 |  | 
 | 211 | int ql_ticks;              /* 200Hz ticks since last jiffie */ | 
 | 212 | static int sound_ticks; | 
 | 213 |  | 
 | 214 | #define SVOL 45 | 
 | 215 |  | 
 | 216 | void q40_mksound(unsigned int hz, unsigned int ticks) | 
 | 217 | { | 
 | 218 |   /* for now ignore hz, except that hz==0 switches off sound */ | 
 | 219 |   /* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */ | 
 | 220 |   if (hz==0) | 
 | 221 |     { | 
 | 222 |       if (sound_ticks) | 
 | 223 | 	sound_ticks=1; | 
 | 224 |  | 
 | 225 |       *DAC_LEFT=128; | 
 | 226 |       *DAC_RIGHT=128; | 
 | 227 |  | 
 | 228 |       return; | 
 | 229 |     } | 
 | 230 |   /* sound itself is done in q40_timer_int */ | 
 | 231 |   if (sound_ticks == 0) sound_ticks=1000; /* pretty long beep */ | 
 | 232 |   sound_ticks=ticks<<1; | 
 | 233 | } | 
 | 234 |  | 
 | 235 | static irqreturn_t (*q40_timer_routine)(int, void *, struct pt_regs *); | 
 | 236 |  | 
 | 237 | static irqreturn_t q40_timer_int (int irq, void * dev, struct pt_regs * regs) | 
 | 238 | { | 
 | 239 |     ql_ticks = ql_ticks ? 0 : 1; | 
 | 240 |     if (sound_ticks) | 
 | 241 |       { | 
 | 242 | 	unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL; | 
 | 243 | 	sound_ticks--; | 
 | 244 | 	*DAC_LEFT=sval; | 
 | 245 | 	*DAC_RIGHT=sval; | 
 | 246 |       } | 
 | 247 |  | 
 | 248 |     if (!ql_ticks) | 
 | 249 | 	q40_timer_routine(irq, dev, regs); | 
 | 250 |     return IRQ_HANDLED; | 
 | 251 | } | 
 | 252 |  | 
 | 253 | void q40_sched_init (irqreturn_t (*timer_routine)(int, void *, struct pt_regs *)) | 
 | 254 | { | 
 | 255 |     int timer_irq; | 
 | 256 |  | 
 | 257 |     q40_timer_routine = timer_routine; | 
 | 258 |     timer_irq=Q40_IRQ_FRAME; | 
 | 259 |  | 
 | 260 |     if (request_irq(timer_irq, q40_timer_int, 0, | 
 | 261 | 				"timer", q40_timer_int)) | 
 | 262 | 	panic ("Couldn't register timer int"); | 
 | 263 |  | 
 | 264 |     master_outb(-1,FRAME_CLEAR_REG); | 
 | 265 |     master_outb( 1,FRAME_RATE_REG); | 
 | 266 | } | 
 | 267 |  | 
 | 268 |  | 
 | 269 | /* | 
 | 270 |  * tables to translate bits into IRQ numbers | 
 | 271 |  * it is a good idea to order the entries by priority | 
 | 272 |  * | 
 | 273 | */ | 
 | 274 |  | 
 | 275 | struct IRQ_TABLE{ unsigned mask; int irq ;}; | 
 | 276 | #if 0 | 
 | 277 | static struct IRQ_TABLE iirqs[]={ | 
 | 278 |   {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME}, | 
 | 279 |   {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD}, | 
 | 280 |   {0,0}}; | 
 | 281 | #endif | 
 | 282 | static struct IRQ_TABLE eirqs[] = { | 
 | 283 |   { .mask = Q40_IRQ3_MASK,	.irq = 3 },	/* ser 1 */ | 
 | 284 |   { .mask = Q40_IRQ4_MASK,	.irq = 4 },	/* ser 2 */ | 
 | 285 |   { .mask = Q40_IRQ14_MASK,	.irq = 14 },	/* IDE 1 */ | 
 | 286 |   { .mask = Q40_IRQ15_MASK,	.irq = 15 },	/* IDE 2 */ | 
 | 287 |   { .mask = Q40_IRQ6_MASK,	.irq = 6 },	/* floppy, handled elsewhere */ | 
 | 288 |   { .mask = Q40_IRQ7_MASK,	.irq = 7 },	/* par */ | 
 | 289 |   { .mask = Q40_IRQ5_MASK,	.irq = 5 }, | 
 | 290 |   { .mask = Q40_IRQ10_MASK,	.irq = 10 }, | 
 | 291 |   {0,0} | 
 | 292 | }; | 
 | 293 |  | 
 | 294 | /* complain only this many times about spurious ints : */ | 
 | 295 | static int ccleirq=60;    /* ISA dev IRQ's*/ | 
 | 296 | /*static int cclirq=60;*/     /* internal */ | 
 | 297 |  | 
 | 298 | /* FIXME: add shared ints,mask,unmask,probing.... */ | 
 | 299 |  | 
 | 300 | #define IRQ_INPROGRESS 1 | 
 | 301 | /*static unsigned short saved_mask;*/ | 
 | 302 | //static int do_tint=0; | 
 | 303 |  | 
 | 304 | #define DEBUG_Q40INT | 
 | 305 | /*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */ | 
 | 306 |  | 
 | 307 | static int mext_disabled=0;  /* ext irq disabled by master chip? */ | 
 | 308 | static int aliased_irq=0;  /* how many times inside handler ?*/ | 
 | 309 |  | 
 | 310 |  | 
 | 311 | /* got level 2 interrupt, dispatch to ISA or keyboard/timer IRQs */ | 
 | 312 | irqreturn_t q40_irq2_handler (int vec, void *devname, struct pt_regs *fp) | 
 | 313 | { | 
 | 314 |   unsigned mir, mer; | 
 | 315 |   int irq,i; | 
 | 316 |  | 
 | 317 | //repeat: | 
 | 318 |   mir=master_inb(IIRQ_REG); | 
 | 319 |   if (mir&Q40_IRQ_FRAME_MASK) { | 
 | 320 | 	  irq_tab[Q40_IRQ_FRAME].count++; | 
 | 321 | 	  irq_tab[Q40_IRQ_FRAME].handler(Q40_IRQ_FRAME,irq_tab[Q40_IRQ_FRAME].dev_id,fp); | 
 | 322 | 	  master_outb(-1,FRAME_CLEAR_REG); | 
 | 323 |   } | 
 | 324 |   if ((mir&Q40_IRQ_SER_MASK) || (mir&Q40_IRQ_EXT_MASK)) { | 
 | 325 | 	  mer=master_inb(EIRQ_REG); | 
 | 326 | 	  for (i=0; eirqs[i].mask; i++) { | 
 | 327 | 		  if (mer&(eirqs[i].mask)) { | 
 | 328 | 			  irq=eirqs[i].irq; | 
 | 329 | /* | 
 | 330 |  * There is a little mess wrt which IRQ really caused this irq request. The | 
 | 331 |  * main problem is that IIRQ_REG and EIRQ_REG reflect the state when they | 
 | 332 |  * are read - which is long after the request came in. In theory IRQs should | 
 | 333 |  * not just go away but they occassionally do | 
 | 334 |  */ | 
 | 335 | 			  if (irq>4 && irq<=15 && mext_disabled) { | 
 | 336 | 				  /*aliased_irq++;*/ | 
 | 337 | 				  goto iirq; | 
 | 338 | 			  } | 
 | 339 | 			  if (irq_tab[irq].handler == q40_defhand ) { | 
 | 340 | 				  printk("handler for IRQ %d not defined\n",irq); | 
 | 341 | 				  continue; /* ignore uninited INTs :-( */ | 
 | 342 | 			  } | 
 | 343 | 			  if ( irq_tab[irq].state & IRQ_INPROGRESS ) { | 
 | 344 | 				  /* some handlers do local_irq_enable() for irq latency reasons, */ | 
 | 345 | 				  /* however reentering an active irq handler is not permitted */ | 
 | 346 | #ifdef IP_USE_DISABLE | 
 | 347 | 				  /* in theory this is the better way to do it because it still */ | 
 | 348 | 				  /* lets through eg the serial irqs, unfortunately it crashes */ | 
 | 349 | 				  disable_irq(irq); | 
 | 350 | 				  disabled=1; | 
 | 351 | #else | 
 | 352 | 				  /*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",irq,disabled ? "already" : "not yet"); */ | 
 | 353 | 				  fp->sr = (((fp->sr) & (~0x700))+0x200); | 
 | 354 | 				  disabled=1; | 
 | 355 | #endif | 
 | 356 | 				  goto iirq; | 
 | 357 | 			  } | 
 | 358 | 			  irq_tab[irq].count++; | 
 | 359 | 			  irq_tab[irq].state |= IRQ_INPROGRESS; | 
 | 360 | 			  irq_tab[irq].handler(irq,irq_tab[irq].dev_id,fp); | 
 | 361 | 			  irq_tab[irq].state &= ~IRQ_INPROGRESS; | 
 | 362 |  | 
 | 363 | 			  /* naively enable everything, if that fails than    */ | 
 | 364 | 			  /* this function will be reentered immediately thus */ | 
 | 365 | 			  /* getting another chance to disable the IRQ        */ | 
 | 366 |  | 
 | 367 | 			  if ( disabled ) { | 
 | 368 | #ifdef IP_USE_DISABLE | 
 | 369 | 				  if (irq>4){ | 
 | 370 | 					  disabled=0; | 
 | 371 | 					  enable_irq(irq);} | 
 | 372 | #else | 
 | 373 | 				  disabled=0; | 
 | 374 | 				  /*printk("reenabling irq %d\n",irq); */ | 
 | 375 | #endif | 
 | 376 | 			  } | 
 | 377 | // used to do 'goto repeat;' here, this delayed bh processing too long | 
 | 378 | 			  return IRQ_HANDLED; | 
 | 379 | 		  } | 
 | 380 | 	  } | 
 | 381 | 	  if (mer && ccleirq>0 && !aliased_irq) | 
 | 382 | 		  printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer),ccleirq--; | 
 | 383 |   } | 
 | 384 |  iirq: | 
 | 385 |   mir=master_inb(IIRQ_REG); | 
 | 386 |   /* should test whether keyboard irq is really enabled, doing it in defhand */ | 
 | 387 |   if (mir&Q40_IRQ_KEYB_MASK) { | 
 | 388 | 	  irq_tab[Q40_IRQ_KEYBOARD].count++; | 
 | 389 | 	  irq_tab[Q40_IRQ_KEYBOARD].handler(Q40_IRQ_KEYBOARD,irq_tab[Q40_IRQ_KEYBOARD].dev_id,fp); | 
 | 390 |   } | 
 | 391 |   return IRQ_HANDLED; | 
 | 392 | } | 
 | 393 |  | 
 | 394 | int show_q40_interrupts (struct seq_file *p, void *v) | 
 | 395 | { | 
 | 396 | 	int i; | 
 | 397 |  | 
 | 398 | 	for (i = 0; i <= Q40_IRQ_MAX; i++) { | 
 | 399 | 		if (irq_tab[i].count) | 
 | 400 | 		      seq_printf(p, "%sIRQ %02d: %8d  %s%s\n", | 
 | 401 | 			      (i<=15) ? "ISA-" : "    " , | 
 | 402 | 			    i, irq_tab[i].count, | 
 | 403 | 			    irq_tab[i].devname[0] ? irq_tab[i].devname : "?", | 
 | 404 | 			    irq_tab[i].handler == q40_defhand ? | 
 | 405 | 					" (now unassigned)" : ""); | 
 | 406 | 	} | 
 | 407 | 	return 0; | 
 | 408 | } | 
 | 409 |  | 
 | 410 |  | 
 | 411 | static irqreturn_t q40_defhand (int irq, void *dev_id, struct pt_regs *fp) | 
 | 412 | { | 
 | 413 |         if (irq!=Q40_IRQ_KEYBOARD) | 
 | 414 | 	     printk ("Unknown q40 interrupt %d\n", irq); | 
 | 415 | 	else master_outb(-1,KEYBOARD_UNLOCK_REG); | 
 | 416 | 	return IRQ_NONE; | 
 | 417 | } | 
 | 418 | static irqreturn_t default_handler(int lev, void *dev_id, struct pt_regs *regs) | 
 | 419 | { | 
 | 420 | 	printk ("Uninitialised interrupt level %d\n", lev); | 
 | 421 | 	return IRQ_NONE; | 
 | 422 | } | 
 | 423 |  | 
 | 424 | irqreturn_t (*q40_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = { | 
 | 425 | 	 [0] = default_handler, | 
 | 426 | 	 [1] = default_handler, | 
 | 427 | 	 [2] = default_handler, | 
 | 428 | 	 [3] = default_handler, | 
 | 429 | 	 [4] = default_handler, | 
 | 430 | 	 [5] = default_handler, | 
 | 431 | 	 [6] = default_handler, | 
 | 432 | 	 [7] = default_handler | 
 | 433 | }; | 
 | 434 |  | 
 | 435 |  | 
 | 436 | void q40_enable_irq (unsigned int irq) | 
 | 437 | { | 
 | 438 |   if ( irq>=5 && irq<=15 ) | 
 | 439 |   { | 
 | 440 |     mext_disabled--; | 
 | 441 |     if (mext_disabled>0) | 
 | 442 | 	  printk("q40_enable_irq : nested disable/enable\n"); | 
 | 443 |     if (mext_disabled==0) | 
 | 444 |     master_outb(1,EXT_ENABLE_REG); | 
 | 445 |     } | 
 | 446 | } | 
 | 447 |  | 
 | 448 |  | 
 | 449 | void q40_disable_irq (unsigned int irq) | 
 | 450 | { | 
 | 451 |   /* disable ISA iqs : only do something if the driver has been | 
 | 452 |    * verified to be Q40 "compatible" - right now IDE, NE2K | 
 | 453 |    * Any driver should not attempt to sleep across disable_irq !! | 
 | 454 |    */ | 
 | 455 |  | 
 | 456 |   if ( irq>=5 && irq<=15 ) { | 
 | 457 |     master_outb(0,EXT_ENABLE_REG); | 
 | 458 |     mext_disabled++; | 
 | 459 |     if (mext_disabled>1) printk("disable_irq nesting count %d\n",mext_disabled); | 
 | 460 |   } | 
 | 461 | } | 
 | 462 |  | 
 | 463 | unsigned long q40_probe_irq_on (void) | 
 | 464 | { | 
 | 465 |   printk("irq probing not working - reconfigure the driver to avoid this\n"); | 
 | 466 |   return -1; | 
 | 467 | } | 
 | 468 | int q40_probe_irq_off (unsigned long irqs) | 
 | 469 | { | 
 | 470 |   return -1; | 
 | 471 | } | 
 | 472 | /* | 
 | 473 |  * Local variables: | 
 | 474 |  * compile-command: "m68k-linux-gcc -D__KERNEL__ -I/home/rz/lx/linux-2.2.6/include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -ffixed-a2 -m68040   -c -o q40ints.o q40ints.c" | 
 | 475 |  * End: | 
 | 476 |  */ |