| Kevin Hilman | ac7b75b | 2009-05-07 06:19:40 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * TI DaVinci EMAC platform support | 
 | 3 |  * | 
 | 4 |  * Author: Kevin Hilman, Deep Root Systems, LLC | 
 | 5 |  * | 
 | 6 |  * 2007 (c) Deep Root Systems, LLC. This file is licensed under | 
 | 7 |  * the terms of the GNU General Public License version 2. This program | 
 | 8 |  * is licensed "as is" without any warranty of any kind, whether express | 
 | 9 |  * or implied. | 
 | 10 |  */ | 
| Sriramakrishnan | 8ee2bf9 | 2009-11-19 15:58:25 +0530 | [diff] [blame] | 11 | #ifndef _LINUX_DAVINCI_EMAC_H | 
 | 12 | #define _LINUX_DAVINCI_EMAC_H | 
| Kevin Hilman | ac7b75b | 2009-05-07 06:19:40 -0700 | [diff] [blame] | 13 |  | 
 | 14 | #include <linux/if_ether.h> | 
| Mark A. Greer | b14dc0f | 2009-04-15 12:41:27 -0700 | [diff] [blame] | 15 | #include <linux/memory.h> | 
| Kevin Hilman | ac7b75b | 2009-05-07 06:19:40 -0700 | [diff] [blame] | 16 |  | 
 | 17 | struct emac_platform_data { | 
 | 18 | 	char mac_addr[ETH_ALEN]; | 
 | 19 | 	u32 ctrl_reg_offset; | 
 | 20 | 	u32 ctrl_mod_reg_offset; | 
 | 21 | 	u32 ctrl_ram_offset; | 
| Sriramakrishnan | ad021ae | 2009-11-19 15:58:27 +0530 | [diff] [blame] | 22 | 	u32 hw_ram_addr; | 
| Kevin Hilman | ac7b75b | 2009-05-07 06:19:40 -0700 | [diff] [blame] | 23 | 	u32 mdio_reg_offset; | 
 | 24 | 	u32 ctrl_ram_size; | 
 | 25 | 	u32 phy_mask; | 
 | 26 | 	u32 mdio_max_freq; | 
 | 27 | 	u8 rmii_en; | 
 | 28 | 	u8 version; | 
| Sriramakrishnan | 01a9af3 | 2009-11-19 15:58:26 +0530 | [diff] [blame] | 29 | 	void (*interrupt_enable) (void); | 
 | 30 | 	void (*interrupt_disable) (void); | 
| Kevin Hilman | ac7b75b | 2009-05-07 06:19:40 -0700 | [diff] [blame] | 31 | }; | 
 | 32 |  | 
 | 33 | enum { | 
 | 34 | 	EMAC_VERSION_1,	/* DM644x */ | 
 | 35 | 	EMAC_VERSION_2,	/* DM646x */ | 
 | 36 | }; | 
| Mark A. Greer | b14dc0f | 2009-04-15 12:41:27 -0700 | [diff] [blame] | 37 |  | 
 | 38 | void davinci_get_mac_addr(struct memory_accessor *mem_acc, void *context); | 
| Kevin Hilman | ac7b75b | 2009-05-07 06:19:40 -0700 | [diff] [blame] | 39 | #endif |