| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * Handle caching attributes in page tables (PAT) | 
|  | 3 | * | 
|  | 4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | 
|  | 5 | *          Suresh B Siddha <suresh.b.siddha@intel.com> | 
|  | 6 | * | 
|  | 7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. | 
|  | 8 | */ | 
|  | 9 |  | 
|  | 10 | #include <linux/mm.h> | 
|  | 11 | #include <linux/kernel.h> | 
|  | 12 | #include <linux/gfp.h> | 
|  | 13 | #include <linux/fs.h> | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 14 | #include <linux/bootmem.h> | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 15 |  | 
|  | 16 | #include <asm/msr.h> | 
|  | 17 | #include <asm/tlbflush.h> | 
|  | 18 | #include <asm/processor.h> | 
|  | 19 | #include <asm/pgtable.h> | 
|  | 20 | #include <asm/pat.h> | 
|  | 21 | #include <asm/e820.h> | 
|  | 22 | #include <asm/cacheflush.h> | 
|  | 23 | #include <asm/fcntl.h> | 
|  | 24 | #include <asm/mtrr.h> | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 25 | #include <asm/io.h> | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 26 |  | 
|  | 27 | int pat_wc_enabled = 1; | 
|  | 28 |  | 
|  | 29 | static u64 __read_mostly boot_pat_state; | 
|  | 30 |  | 
|  | 31 | static int nopat(char *str) | 
|  | 32 | { | 
|  | 33 | pat_wc_enabled = 0; | 
|  | 34 | printk(KERN_INFO "x86: PAT support disabled.\n"); | 
|  | 35 |  | 
|  | 36 | return 0; | 
|  | 37 | } | 
|  | 38 | early_param("nopat", nopat); | 
|  | 39 |  | 
|  | 40 | static int pat_known_cpu(void) | 
|  | 41 | { | 
|  | 42 | if (!pat_wc_enabled) | 
|  | 43 | return 0; | 
|  | 44 |  | 
| Yinghai Lu | 9307cac | 2008-03-24 23:24:34 -0700 | [diff] [blame] | 45 | if (cpu_has_pat) | 
|  | 46 | return 1; | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 47 |  | 
|  | 48 | pat_wc_enabled = 0; | 
|  | 49 | printk(KERN_INFO "CPU and/or kernel does not support PAT.\n"); | 
|  | 50 | return 0; | 
|  | 51 | } | 
|  | 52 |  | 
|  | 53 | enum { | 
|  | 54 | PAT_UC = 0,		/* uncached */ | 
|  | 55 | PAT_WC = 1,		/* Write combining */ | 
|  | 56 | PAT_WT = 4,		/* Write Through */ | 
|  | 57 | PAT_WP = 5,		/* Write Protected */ | 
|  | 58 | PAT_WB = 6,		/* Write Back (default) */ | 
|  | 59 | PAT_UC_MINUS = 7,	/* UC, but can be overriden by MTRR */ | 
|  | 60 | }; | 
|  | 61 |  | 
|  | 62 | #define PAT(x,y)	((u64)PAT_ ## y << ((x)*8)) | 
|  | 63 |  | 
|  | 64 | void pat_init(void) | 
|  | 65 | { | 
|  | 66 | u64 pat; | 
|  | 67 |  | 
|  | 68 | #ifndef CONFIG_X86_PAT | 
|  | 69 | nopat(NULL); | 
|  | 70 | #endif | 
|  | 71 |  | 
|  | 72 | /* Boot CPU enables PAT based on CPU feature */ | 
|  | 73 | if (!smp_processor_id() && !pat_known_cpu()) | 
|  | 74 | return; | 
|  | 75 |  | 
|  | 76 | /* APs enable PAT iff boot CPU has enabled it before */ | 
|  | 77 | if (smp_processor_id() && !pat_wc_enabled) | 
|  | 78 | return; | 
|  | 79 |  | 
|  | 80 | /* Set PWT to Write-Combining. All other bits stay the same */ | 
|  | 81 | /* | 
|  | 82 | * PTE encoding used in Linux: | 
|  | 83 | *      PAT | 
|  | 84 | *      |PCD | 
|  | 85 | *      ||PWT | 
|  | 86 | *      ||| | 
|  | 87 | *      000 WB		_PAGE_CACHE_WB | 
|  | 88 | *      001 WC		_PAGE_CACHE_WC | 
|  | 89 | *      010 UC-		_PAGE_CACHE_UC_MINUS | 
|  | 90 | *      011 UC		_PAGE_CACHE_UC | 
|  | 91 | * PAT bit unused | 
|  | 92 | */ | 
|  | 93 | pat = PAT(0,WB) | PAT(1,WC) | PAT(2,UC_MINUS) | PAT(3,UC) | | 
|  | 94 | PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC); | 
|  | 95 |  | 
|  | 96 | /* Boot CPU check */ | 
|  | 97 | if (!smp_processor_id()) { | 
|  | 98 | rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); | 
|  | 99 | } | 
|  | 100 |  | 
|  | 101 | wrmsrl(MSR_IA32_CR_PAT, pat); | 
|  | 102 | printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", | 
|  | 103 | smp_processor_id(), boot_pat_state, pat); | 
|  | 104 | } | 
|  | 105 |  | 
|  | 106 | #undef PAT | 
|  | 107 |  | 
|  | 108 | static char *cattr_name(unsigned long flags) | 
|  | 109 | { | 
|  | 110 | switch (flags & _PAGE_CACHE_MASK) { | 
|  | 111 | case _PAGE_CACHE_UC:		return "uncached"; | 
|  | 112 | case _PAGE_CACHE_UC_MINUS:	return "uncached-minus"; | 
|  | 113 | case _PAGE_CACHE_WB:		return "write-back"; | 
|  | 114 | case _PAGE_CACHE_WC:		return "write-combining"; | 
|  | 115 | default:			return "broken"; | 
|  | 116 | } | 
|  | 117 | } | 
|  | 118 |  | 
|  | 119 | /* | 
|  | 120 | * The global memtype list keeps track of memory type for specific | 
|  | 121 | * physical memory areas. Conflicting memory types in different | 
|  | 122 | * mappings can cause CPU cache corruption. To avoid this we keep track. | 
|  | 123 | * | 
|  | 124 | * The list is sorted based on starting address and can contain multiple | 
|  | 125 | * entries for each address (this allows reference counting for overlapping | 
|  | 126 | * areas). All the aliases have the same cache attributes of course. | 
|  | 127 | * Zero attributes are represented as holes. | 
|  | 128 | * | 
|  | 129 | * Currently the data structure is a list because the number of mappings | 
|  | 130 | * are expected to be relatively small. If this should be a problem | 
|  | 131 | * it could be changed to a rbtree or similar. | 
|  | 132 | * | 
|  | 133 | * memtype_lock protects the whole list. | 
|  | 134 | */ | 
|  | 135 |  | 
|  | 136 | struct memtype { | 
|  | 137 | u64 start; | 
|  | 138 | u64 end; | 
|  | 139 | unsigned long type; | 
|  | 140 | struct list_head nd; | 
|  | 141 | }; | 
|  | 142 |  | 
|  | 143 | static LIST_HEAD(memtype_list); | 
|  | 144 | static DEFINE_SPINLOCK(memtype_lock); 	/* protects memtype list */ | 
|  | 145 |  | 
|  | 146 | /* | 
|  | 147 | * Does intersection of PAT memory type and MTRR memory type and returns | 
|  | 148 | * the resulting memory type as PAT understands it. | 
|  | 149 | * (Type in pat and mtrr will not have same value) | 
|  | 150 | * The intersection is based on "Effective Memory Type" tables in IA-32 | 
|  | 151 | * SDM vol 3a | 
|  | 152 | */ | 
|  | 153 | static int pat_x_mtrr_type(u64 start, u64 end, unsigned long prot, | 
|  | 154 | unsigned long *ret_prot) | 
|  | 155 | { | 
|  | 156 | unsigned long pat_type; | 
|  | 157 | u8 mtrr_type; | 
|  | 158 |  | 
|  | 159 | mtrr_type = mtrr_type_lookup(start, end); | 
|  | 160 | if (mtrr_type == 0xFF) {		/* MTRR not enabled */ | 
|  | 161 | *ret_prot = prot; | 
|  | 162 | return 0; | 
|  | 163 | } | 
|  | 164 | if (mtrr_type == 0xFE) {		/* MTRR match error */ | 
|  | 165 | *ret_prot = _PAGE_CACHE_UC; | 
|  | 166 | return -1; | 
|  | 167 | } | 
|  | 168 | if (mtrr_type != MTRR_TYPE_UNCACHABLE && | 
|  | 169 | mtrr_type != MTRR_TYPE_WRBACK && | 
|  | 170 | mtrr_type != MTRR_TYPE_WRCOMB) {	/* MTRR type unhandled */ | 
|  | 171 | *ret_prot = _PAGE_CACHE_UC; | 
|  | 172 | return -1; | 
|  | 173 | } | 
|  | 174 |  | 
|  | 175 | pat_type = prot & _PAGE_CACHE_MASK; | 
|  | 176 | prot &= (~_PAGE_CACHE_MASK); | 
|  | 177 |  | 
|  | 178 | /* Currently doing intersection by hand. Optimize it later. */ | 
|  | 179 | if (pat_type == _PAGE_CACHE_WC) { | 
|  | 180 | *ret_prot = prot | _PAGE_CACHE_WC; | 
|  | 181 | } else if (pat_type == _PAGE_CACHE_UC_MINUS) { | 
|  | 182 | *ret_prot = prot | _PAGE_CACHE_UC_MINUS; | 
|  | 183 | } else if (pat_type == _PAGE_CACHE_UC || | 
|  | 184 | mtrr_type == MTRR_TYPE_UNCACHABLE) { | 
|  | 185 | *ret_prot = prot | _PAGE_CACHE_UC; | 
|  | 186 | } else if (mtrr_type == MTRR_TYPE_WRCOMB) { | 
|  | 187 | *ret_prot = prot | _PAGE_CACHE_WC; | 
|  | 188 | } else { | 
|  | 189 | *ret_prot = prot | _PAGE_CACHE_WB; | 
|  | 190 | } | 
|  | 191 |  | 
|  | 192 | return 0; | 
|  | 193 | } | 
|  | 194 |  | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 195 | /* | 
|  | 196 | * req_type typically has one of the: | 
|  | 197 | * - _PAGE_CACHE_WB | 
|  | 198 | * - _PAGE_CACHE_WC | 
|  | 199 | * - _PAGE_CACHE_UC_MINUS | 
|  | 200 | * - _PAGE_CACHE_UC | 
|  | 201 | * | 
|  | 202 | * req_type will have a special case value '-1', when requester want to inherit | 
|  | 203 | * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS. | 
|  | 204 | * | 
|  | 205 | * If ret_type is NULL, function will return an error if it cannot reserve the | 
|  | 206 | * region with req_type. If ret_type is non-null, function will return | 
|  | 207 | * available type in ret_type in case of no error. In case of any error | 
|  | 208 | * it will return a negative return value. | 
|  | 209 | */ | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 210 | int reserve_memtype(u64 start, u64 end, unsigned long req_type, | 
|  | 211 | unsigned long *ret_type) | 
|  | 212 | { | 
|  | 213 | struct memtype *new_entry = NULL; | 
|  | 214 | struct memtype *parse; | 
|  | 215 | unsigned long actual_type; | 
|  | 216 | int err = 0; | 
|  | 217 |  | 
|  | 218 | /* Only track when pat_wc_enabled */ | 
|  | 219 | if (!pat_wc_enabled) { | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 220 | /* This is identical to page table setting without PAT */ | 
|  | 221 | if (ret_type) { | 
|  | 222 | if (req_type == -1) { | 
|  | 223 | *ret_type = _PAGE_CACHE_WB; | 
|  | 224 | } else { | 
|  | 225 | *ret_type = req_type; | 
|  | 226 | } | 
|  | 227 | } | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 228 | return 0; | 
|  | 229 | } | 
|  | 230 |  | 
|  | 231 | /* Low ISA region is always mapped WB in page table. No need to track */ | 
|  | 232 | if (start >= ISA_START_ADDRESS && (end - 1) <= ISA_END_ADDRESS) { | 
|  | 233 | if (ret_type) | 
|  | 234 | *ret_type = _PAGE_CACHE_WB; | 
|  | 235 |  | 
|  | 236 | return 0; | 
|  | 237 | } | 
|  | 238 |  | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 239 | if (req_type == -1) { | 
|  | 240 | /* | 
|  | 241 | * Special case where caller wants to inherit from mtrr or | 
|  | 242 | * existing pat mapping, defaulting to UC_MINUS in case of | 
|  | 243 | * no match. | 
|  | 244 | */ | 
|  | 245 | u8 mtrr_type = mtrr_type_lookup(start, end); | 
|  | 246 | if (mtrr_type == 0xFE) { /* MTRR match error */ | 
|  | 247 | err = -1; | 
|  | 248 | } | 
|  | 249 |  | 
|  | 250 | if (mtrr_type == MTRR_TYPE_WRBACK) { | 
|  | 251 | req_type = _PAGE_CACHE_WB; | 
|  | 252 | actual_type = _PAGE_CACHE_WB; | 
|  | 253 | } else { | 
|  | 254 | req_type = _PAGE_CACHE_UC_MINUS; | 
|  | 255 | actual_type = _PAGE_CACHE_UC_MINUS; | 
|  | 256 | } | 
|  | 257 | } else { | 
|  | 258 | req_type &= _PAGE_CACHE_MASK; | 
|  | 259 | err = pat_x_mtrr_type(start, end, req_type, &actual_type); | 
|  | 260 | } | 
|  | 261 |  | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 262 | if (err) { | 
|  | 263 | if (ret_type) | 
|  | 264 | *ret_type = actual_type; | 
|  | 265 |  | 
|  | 266 | return -EINVAL; | 
|  | 267 | } | 
|  | 268 |  | 
|  | 269 | new_entry  = kmalloc(sizeof(struct memtype), GFP_KERNEL); | 
|  | 270 | if (!new_entry) | 
|  | 271 | return -ENOMEM; | 
|  | 272 |  | 
|  | 273 | new_entry->start = start; | 
|  | 274 | new_entry->end = end; | 
|  | 275 | new_entry->type = actual_type; | 
|  | 276 |  | 
|  | 277 | if (ret_type) | 
|  | 278 | *ret_type = actual_type; | 
|  | 279 |  | 
|  | 280 | spin_lock(&memtype_lock); | 
|  | 281 |  | 
|  | 282 | /* Search for existing mapping that overlaps the current range */ | 
|  | 283 | list_for_each_entry(parse, &memtype_list, nd) { | 
|  | 284 | struct memtype *saved_ptr; | 
|  | 285 |  | 
|  | 286 | if (parse->start >= end) { | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 287 | pr_debug("New Entry\n"); | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 288 | list_add(&new_entry->nd, parse->nd.prev); | 
|  | 289 | new_entry = NULL; | 
|  | 290 | break; | 
|  | 291 | } | 
|  | 292 |  | 
|  | 293 | if (start <= parse->start && end >= parse->start) { | 
|  | 294 | if (actual_type != parse->type && ret_type) { | 
|  | 295 | actual_type = parse->type; | 
|  | 296 | *ret_type = actual_type; | 
|  | 297 | new_entry->type = actual_type; | 
|  | 298 | } | 
|  | 299 |  | 
|  | 300 | if (actual_type != parse->type) { | 
|  | 301 | printk( | 
|  | 302 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | 
|  | 303 | current->comm, current->pid, | 
|  | 304 | start, end, | 
|  | 305 | cattr_name(actual_type), | 
|  | 306 | cattr_name(parse->type)); | 
|  | 307 | err = -EBUSY; | 
|  | 308 | break; | 
|  | 309 | } | 
|  | 310 |  | 
|  | 311 | saved_ptr = parse; | 
|  | 312 | /* | 
|  | 313 | * Check to see whether the request overlaps more | 
|  | 314 | * than one entry in the list | 
|  | 315 | */ | 
|  | 316 | list_for_each_entry_continue(parse, &memtype_list, nd) { | 
|  | 317 | if (end <= parse->start) { | 
|  | 318 | break; | 
|  | 319 | } | 
|  | 320 |  | 
|  | 321 | if (actual_type != parse->type) { | 
|  | 322 | printk( | 
|  | 323 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | 
|  | 324 | current->comm, current->pid, | 
|  | 325 | start, end, | 
|  | 326 | cattr_name(actual_type), | 
|  | 327 | cattr_name(parse->type)); | 
|  | 328 | err = -EBUSY; | 
|  | 329 | break; | 
|  | 330 | } | 
|  | 331 | } | 
|  | 332 |  | 
|  | 333 | if (err) { | 
|  | 334 | break; | 
|  | 335 | } | 
|  | 336 |  | 
| venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 337 | printk("Overlap at 0x%Lx-0x%Lx\n", | 
|  | 338 | saved_ptr->start, saved_ptr->end); | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 339 | /* No conflict. Go ahead and add this new entry */ | 
|  | 340 | list_add(&new_entry->nd, saved_ptr->nd.prev); | 
|  | 341 | new_entry = NULL; | 
|  | 342 | break; | 
|  | 343 | } | 
|  | 344 |  | 
|  | 345 | if (start < parse->end) { | 
|  | 346 | if (actual_type != parse->type && ret_type) { | 
|  | 347 | actual_type = parse->type; | 
|  | 348 | *ret_type = actual_type; | 
|  | 349 | new_entry->type = actual_type; | 
|  | 350 | } | 
|  | 351 |  | 
|  | 352 | if (actual_type != parse->type) { | 
|  | 353 | printk( | 
|  | 354 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | 
|  | 355 | current->comm, current->pid, | 
|  | 356 | start, end, | 
|  | 357 | cattr_name(actual_type), | 
|  | 358 | cattr_name(parse->type)); | 
|  | 359 | err = -EBUSY; | 
|  | 360 | break; | 
|  | 361 | } | 
|  | 362 |  | 
|  | 363 | saved_ptr = parse; | 
|  | 364 | /* | 
|  | 365 | * Check to see whether the request overlaps more | 
|  | 366 | * than one entry in the list | 
|  | 367 | */ | 
|  | 368 | list_for_each_entry_continue(parse, &memtype_list, nd) { | 
|  | 369 | if (end <= parse->start) { | 
|  | 370 | break; | 
|  | 371 | } | 
|  | 372 |  | 
|  | 373 | if (actual_type != parse->type) { | 
|  | 374 | printk( | 
|  | 375 | KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n", | 
|  | 376 | current->comm, current->pid, | 
|  | 377 | start, end, | 
|  | 378 | cattr_name(actual_type), | 
|  | 379 | cattr_name(parse->type)); | 
|  | 380 | err = -EBUSY; | 
|  | 381 | break; | 
|  | 382 | } | 
|  | 383 | } | 
|  | 384 |  | 
|  | 385 | if (err) { | 
|  | 386 | break; | 
|  | 387 | } | 
|  | 388 |  | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 389 | printk(KERN_INFO "Overlap at 0x%Lx-0x%Lx\n", | 
| venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 390 | saved_ptr->start, saved_ptr->end); | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 391 | /* No conflict. Go ahead and add this new entry */ | 
|  | 392 | list_add(&new_entry->nd, &saved_ptr->nd); | 
|  | 393 | new_entry = NULL; | 
|  | 394 | break; | 
|  | 395 | } | 
|  | 396 | } | 
|  | 397 |  | 
|  | 398 | if (err) { | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 399 | printk(KERN_INFO | 
| venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 400 | "reserve_memtype failed 0x%Lx-0x%Lx, track %s, req %s\n", | 
|  | 401 | start, end, cattr_name(new_entry->type), | 
|  | 402 | cattr_name(req_type)); | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 403 | kfree(new_entry); | 
|  | 404 | spin_unlock(&memtype_lock); | 
|  | 405 | return err; | 
|  | 406 | } | 
|  | 407 |  | 
|  | 408 | if (new_entry) { | 
|  | 409 | /* No conflict. Not yet added to the list. Add to the tail */ | 
|  | 410 | list_add_tail(&new_entry->nd, &memtype_list); | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 411 | pr_debug("New Entry\n"); | 
|  | 412 | } | 
| venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 413 |  | 
|  | 414 | if (ret_type) { | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 415 | pr_debug( | 
| venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 416 | "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n", | 
|  | 417 | start, end, cattr_name(actual_type), | 
|  | 418 | cattr_name(req_type), cattr_name(*ret_type)); | 
|  | 419 | } else { | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 420 | pr_debug( | 
| venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 421 | "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s\n", | 
|  | 422 | start, end, cattr_name(actual_type), | 
|  | 423 | cattr_name(req_type)); | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 424 | } | 
|  | 425 |  | 
|  | 426 | spin_unlock(&memtype_lock); | 
|  | 427 | return err; | 
|  | 428 | } | 
|  | 429 |  | 
|  | 430 | int free_memtype(u64 start, u64 end) | 
|  | 431 | { | 
|  | 432 | struct memtype *ml; | 
|  | 433 | int err = -EINVAL; | 
|  | 434 |  | 
|  | 435 | /* Only track when pat_wc_enabled */ | 
|  | 436 | if (!pat_wc_enabled) { | 
|  | 437 | return 0; | 
|  | 438 | } | 
|  | 439 |  | 
|  | 440 | /* Low ISA region is always mapped WB. No need to track */ | 
|  | 441 | if (start >= ISA_START_ADDRESS && end <= ISA_END_ADDRESS) { | 
|  | 442 | return 0; | 
|  | 443 | } | 
|  | 444 |  | 
|  | 445 | spin_lock(&memtype_lock); | 
|  | 446 | list_for_each_entry(ml, &memtype_list, nd) { | 
|  | 447 | if (ml->start == start && ml->end == end) { | 
|  | 448 | list_del(&ml->nd); | 
|  | 449 | kfree(ml); | 
|  | 450 | err = 0; | 
|  | 451 | break; | 
|  | 452 | } | 
|  | 453 | } | 
|  | 454 | spin_unlock(&memtype_lock); | 
|  | 455 |  | 
|  | 456 | if (err) { | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 457 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 458 | current->comm, current->pid, start, end); | 
|  | 459 | } | 
| venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 460 |  | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 461 | pr_debug("free_memtype request 0x%Lx-0x%Lx\n", start, end); | 
| venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 462 | return err; | 
|  | 463 | } | 
|  | 464 |  | 
| venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 465 |  | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 466 | /* | 
|  | 467 | * /dev/mem mmap interface. The memtype used for mapping varies: | 
|  | 468 | * - Use UC for mappings with O_SYNC flag | 
|  | 469 | * - Without O_SYNC flag, if there is any conflict in reserve_memtype, | 
|  | 470 | *   inherit the memtype from existing mapping. | 
|  | 471 | * - Else use UC_MINUS memtype (for backward compatibility with existing | 
|  | 472 | *   X drivers. | 
|  | 473 | */ | 
| venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 474 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | 
|  | 475 | unsigned long size, pgprot_t vma_prot) | 
|  | 476 | { | 
|  | 477 | return vma_prot; | 
|  | 478 | } | 
|  | 479 |  | 
|  | 480 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | 
|  | 481 | unsigned long size, pgprot_t *vma_prot) | 
|  | 482 | { | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 483 | u64 offset = ((u64) pfn) << PAGE_SHIFT; | 
|  | 484 | unsigned long flags = _PAGE_CACHE_UC_MINUS; | 
|  | 485 | unsigned long ret_flags; | 
|  | 486 | int retval; | 
| venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 487 |  | 
|  | 488 | if (file->f_flags & O_SYNC) { | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 489 | flags = _PAGE_CACHE_UC; | 
| venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 490 | } | 
|  | 491 |  | 
|  | 492 | #ifdef CONFIG_X86_32 | 
|  | 493 | /* | 
|  | 494 | * On the PPro and successors, the MTRRs are used to set | 
|  | 495 | * memory types for physical addresses outside main memory, | 
|  | 496 | * so blindly setting UC or PWT on those pages is wrong. | 
|  | 497 | * For Pentiums and earlier, the surround logic should disable | 
|  | 498 | * caching for the high addresses through the KEN pin, but | 
|  | 499 | * we maintain the tradition of paranoia in this code. | 
|  | 500 | */ | 
|  | 501 | if (!pat_wc_enabled && | 
|  | 502 | ! ( test_bit(X86_FEATURE_MTRR, boot_cpu_data.x86_capability) || | 
|  | 503 | test_bit(X86_FEATURE_K6_MTRR, boot_cpu_data.x86_capability) || | 
|  | 504 | test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) || | 
|  | 505 | test_bit(X86_FEATURE_CENTAUR_MCR, boot_cpu_data.x86_capability)) && | 
|  | 506 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 507 | flags = _PAGE_CACHE_UC; | 
| venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 508 | } | 
|  | 509 | #endif | 
|  | 510 |  | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 511 | /* | 
|  | 512 | * With O_SYNC, we can only take UC mapping. Fail if we cannot. | 
|  | 513 | * Without O_SYNC, we want to get | 
|  | 514 | * - WB for WB-able memory and no other conflicting mappings | 
|  | 515 | * - UC_MINUS for non-WB-able memory with no other conflicting mappings | 
|  | 516 | * - Inherit from confliting mappings otherwise | 
|  | 517 | */ | 
|  | 518 | if (flags != _PAGE_CACHE_UC_MINUS) { | 
|  | 519 | retval = reserve_memtype(offset, offset + size, flags, NULL); | 
|  | 520 | } else { | 
|  | 521 | retval = reserve_memtype(offset, offset + size, -1, &ret_flags); | 
|  | 522 | } | 
|  | 523 |  | 
|  | 524 | if (retval < 0) | 
|  | 525 | return 0; | 
|  | 526 |  | 
|  | 527 | flags = ret_flags; | 
|  | 528 |  | 
|  | 529 | if (pfn <= max_pfn_mapped && | 
|  | 530 | ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) { | 
|  | 531 | free_memtype(offset, offset + size); | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 532 | printk(KERN_INFO | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 533 | "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n", | 
|  | 534 | current->comm, current->pid, | 
|  | 535 | cattr_name(flags), | 
|  | 536 | offset, offset + size); | 
|  | 537 | return 0; | 
|  | 538 | } | 
|  | 539 |  | 
|  | 540 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | | 
|  | 541 | flags); | 
| venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 542 | return 1; | 
|  | 543 | } | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 544 |  | 
|  | 545 | void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | 
|  | 546 | { | 
|  | 547 | u64 addr = (u64)pfn << PAGE_SHIFT; | 
|  | 548 | unsigned long flags; | 
|  | 549 | unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK); | 
|  | 550 |  | 
|  | 551 | reserve_memtype(addr, addr + size, want_flags, &flags); | 
|  | 552 | if (flags != want_flags) { | 
| Ingo Molnar | 28eb559b | 2008-04-03 10:14:33 +0200 | [diff] [blame] | 553 | printk(KERN_INFO | 
| venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 554 | "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n", | 
|  | 555 | current->comm, current->pid, | 
|  | 556 | cattr_name(want_flags), | 
|  | 557 | addr, addr + size, | 
|  | 558 | cattr_name(flags)); | 
|  | 559 | } | 
|  | 560 | } | 
|  | 561 |  | 
|  | 562 | void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | 
|  | 563 | { | 
|  | 564 | u64 addr = (u64)pfn << PAGE_SHIFT; | 
|  | 565 |  | 
|  | 566 | free_memtype(addr, addr + size); | 
|  | 567 | } | 
|  | 568 |  |