| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | *  linux/arch/arm/mach-pxa/pxa27x.c | 
|  | 3 | * | 
|  | 4 | *  Author:	Nicolas Pitre | 
|  | 5 | *  Created:	Nov 05, 2002 | 
|  | 6 | *  Copyright:	MontaVista Software Inc. | 
|  | 7 | * | 
|  | 8 | * Code specific to PXA27x aka Bulverde. | 
|  | 9 | * | 
|  | 10 | * This program is free software; you can redistribute it and/or modify | 
|  | 11 | * it under the terms of the GNU General Public License version 2 as | 
|  | 12 | * published by the Free Software Foundation. | 
|  | 13 | */ | 
|  | 14 | #include <linux/config.h> | 
|  | 15 | #include <linux/module.h> | 
|  | 16 | #include <linux/kernel.h> | 
|  | 17 | #include <linux/init.h> | 
|  | 18 | #include <linux/pm.h> | 
|  | 19 | #include <linux/device.h> | 
|  | 20 |  | 
|  | 21 | #include <asm/hardware.h> | 
|  | 22 | #include <asm/irq.h> | 
|  | 23 | #include <asm/arch/pxa-regs.h> | 
|  | 24 |  | 
|  | 25 | #include "generic.h" | 
|  | 26 |  | 
|  | 27 | /* Crystal clock: 13MHz */ | 
|  | 28 | #define BASE_CLK	13000000 | 
|  | 29 |  | 
|  | 30 | /* | 
|  | 31 | * Get the clock frequency as reflected by CCSR and the turbo flag. | 
|  | 32 | * We assume these values have been applied via a fcs. | 
|  | 33 | * If info is not 0 we also display the current settings. | 
|  | 34 | */ | 
|  | 35 | unsigned int get_clk_frequency_khz( int info) | 
|  | 36 | { | 
|  | 37 | unsigned long ccsr, clkcfg; | 
|  | 38 | unsigned int l, L, m, M, n2, N, S; | 
|  | 39 | int cccr_a, t, ht, b; | 
|  | 40 |  | 
|  | 41 | ccsr = CCSR; | 
|  | 42 | cccr_a = CCCR & (1 << 25); | 
|  | 43 |  | 
|  | 44 | /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ | 
|  | 45 | asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); | 
|  | 46 | t  = clkcfg & (1 << 1); | 
|  | 47 | ht = clkcfg & (1 << 2); | 
|  | 48 | b  = clkcfg & (1 << 3); | 
|  | 49 |  | 
|  | 50 | l  = ccsr & 0x1f; | 
|  | 51 | n2 = (ccsr>>7) & 0xf; | 
|  | 52 | m  = (l <= 10) ? 1 : (l <= 20) ? 2 : 4; | 
|  | 53 |  | 
|  | 54 | L  = l * BASE_CLK; | 
|  | 55 | N  = (L * n2) / 2; | 
|  | 56 | M  = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); | 
|  | 57 | S  = (b) ? L : (L/2); | 
|  | 58 |  | 
|  | 59 | if (info) { | 
|  | 60 | printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n", | 
|  | 61 | L / 1000000, (L % 1000000) / 10000, l ); | 
|  | 62 | printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n", | 
|  | 63 | N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5, | 
|  | 64 | (t) ? "" : "in" ); | 
|  | 65 | printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n", | 
|  | 66 | M / 1000000, (M % 1000000) / 10000, m ); | 
|  | 67 | printk( KERN_INFO "System bus clock: %d.%02dMHz \n", | 
|  | 68 | S / 1000000, (S % 1000000) / 10000 ); | 
|  | 69 | } | 
|  | 70 |  | 
|  | 71 | return (t) ? (N/1000) : (L/1000); | 
|  | 72 | } | 
|  | 73 |  | 
|  | 74 | /* | 
|  | 75 | * Return the current mem clock frequency in units of 10kHz as | 
|  | 76 | * reflected by CCCR[A], B, and L | 
|  | 77 | */ | 
|  | 78 | unsigned int get_memclk_frequency_10khz(void) | 
|  | 79 | { | 
|  | 80 | unsigned long ccsr, clkcfg; | 
|  | 81 | unsigned int l, L, m, M; | 
|  | 82 | int cccr_a, b; | 
|  | 83 |  | 
|  | 84 | ccsr = CCSR; | 
|  | 85 | cccr_a = CCCR & (1 << 25); | 
|  | 86 |  | 
|  | 87 | /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ | 
|  | 88 | asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); | 
|  | 89 | b = clkcfg & (1 << 3); | 
|  | 90 |  | 
|  | 91 | l = ccsr & 0x1f; | 
|  | 92 | m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4; | 
|  | 93 |  | 
|  | 94 | L = l * BASE_CLK; | 
|  | 95 | M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); | 
|  | 96 |  | 
|  | 97 | return (M / 10000); | 
|  | 98 | } | 
|  | 99 |  | 
|  | 100 | /* | 
|  | 101 | * Return the current LCD clock frequency in units of 10kHz as | 
|  | 102 | */ | 
|  | 103 | unsigned int get_lcdclk_frequency_10khz(void) | 
|  | 104 | { | 
|  | 105 | unsigned long ccsr; | 
|  | 106 | unsigned int l, L, k, K; | 
|  | 107 |  | 
|  | 108 | ccsr = CCSR; | 
|  | 109 |  | 
|  | 110 | l = ccsr & 0x1f; | 
|  | 111 | k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4; | 
|  | 112 |  | 
|  | 113 | L = l * BASE_CLK; | 
|  | 114 | K = L / k; | 
|  | 115 |  | 
|  | 116 | return (K / 10000); | 
|  | 117 | } | 
|  | 118 |  | 
|  | 119 | EXPORT_SYMBOL(get_clk_frequency_khz); | 
|  | 120 | EXPORT_SYMBOL(get_memclk_frequency_10khz); | 
|  | 121 | EXPORT_SYMBOL(get_lcdclk_frequency_10khz); | 
|  | 122 |  | 
| Nicolas Pitre | a8fa3f0 | 2005-06-13 22:35:41 +0100 | [diff] [blame] | 123 | #ifdef CONFIG_PM | 
|  | 124 |  | 
| Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 125 | int pxa_cpu_pm_prepare(suspend_state_t state) | 
|  | 126 | { | 
|  | 127 | switch (state) { | 
|  | 128 | case PM_SUSPEND_MEM: | 
| Todd Poynor | 26705ca | 2005-07-01 11:27:05 +0100 | [diff] [blame] | 129 | case PM_SUSPEND_STANDBY: | 
| Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 130 | return 0; | 
|  | 131 | default: | 
|  | 132 | return -EINVAL; | 
|  | 133 | } | 
|  | 134 | } | 
|  | 135 |  | 
|  | 136 | void pxa_cpu_pm_enter(suspend_state_t state) | 
|  | 137 | { | 
|  | 138 | extern void pxa_cpu_standby(void); | 
|  | 139 | extern void pxa_cpu_suspend(unsigned int); | 
|  | 140 | extern void pxa_cpu_resume(void); | 
|  | 141 |  | 
| Todd Poynor | 26705ca | 2005-07-01 11:27:05 +0100 | [diff] [blame] | 142 | if (state == PM_SUSPEND_STANDBY) | 
|  | 143 | CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0; | 
|  | 144 | else | 
|  | 145 | CKEN = CKEN22_MEMC | CKEN9_OSTIMER; | 
| Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 146 |  | 
|  | 147 | /* ensure voltage-change sequencer not initiated, which hangs */ | 
|  | 148 | PCFR &= ~PCFR_FVC; | 
|  | 149 |  | 
|  | 150 | /* Clear edge-detect status register. */ | 
|  | 151 | PEDR = 0xDF12FE1B; | 
|  | 152 |  | 
|  | 153 | switch (state) { | 
| Todd Poynor | 26705ca | 2005-07-01 11:27:05 +0100 | [diff] [blame] | 154 | case PM_SUSPEND_STANDBY: | 
|  | 155 | pxa_cpu_standby(); | 
|  | 156 | break; | 
| Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 157 | case PM_SUSPEND_MEM: | 
|  | 158 | /* set resume return address */ | 
|  | 159 | PSPR = virt_to_phys(pxa_cpu_resume); | 
|  | 160 | pxa_cpu_suspend(3); | 
|  | 161 | break; | 
|  | 162 | } | 
|  | 163 | } | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 |  | 
| Nicolas Pitre | a8fa3f0 | 2005-06-13 22:35:41 +0100 | [diff] [blame] | 165 | #endif | 
|  | 166 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | /* | 
|  | 168 | * device registration specific to PXA27x. | 
|  | 169 | */ | 
|  | 170 |  | 
|  | 171 | static u64 pxa27x_dmamask = 0xffffffffUL; | 
|  | 172 |  | 
|  | 173 | static struct resource pxa27x_ohci_resources[] = { | 
|  | 174 | [0] = { | 
|  | 175 | .start  = 0x4C000000, | 
|  | 176 | .end    = 0x4C00ff6f, | 
|  | 177 | .flags  = IORESOURCE_MEM, | 
|  | 178 | }, | 
|  | 179 | [1] = { | 
|  | 180 | .start  = IRQ_USBH1, | 
|  | 181 | .end    = IRQ_USBH1, | 
|  | 182 | .flags  = IORESOURCE_IRQ, | 
|  | 183 | }, | 
|  | 184 | }; | 
|  | 185 |  | 
|  | 186 | static struct platform_device ohci_device = { | 
|  | 187 | .name		= "pxa27x-ohci", | 
|  | 188 | .id		= -1, | 
|  | 189 | .dev		= { | 
|  | 190 | .dma_mask = &pxa27x_dmamask, | 
|  | 191 | .coherent_dma_mask = 0xffffffff, | 
|  | 192 | }, | 
|  | 193 | .num_resources  = ARRAY_SIZE(pxa27x_ohci_resources), | 
|  | 194 | .resource       = pxa27x_ohci_resources, | 
|  | 195 | }; | 
|  | 196 |  | 
|  | 197 | static struct platform_device *devices[] __initdata = { | 
|  | 198 | &ohci_device, | 
|  | 199 | }; | 
|  | 200 |  | 
|  | 201 | static int __init pxa27x_init(void) | 
|  | 202 | { | 
|  | 203 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | 
|  | 204 | } | 
|  | 205 |  | 
|  | 206 | subsys_initcall(pxa27x_init); |