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review.evervolv.com / android_kernel_oneplus_sm8150 / aa93466bdfd901b926e033801f0b82b3eaa67be2 / . / sound / oss / emu10k1 / recmgr.c
blob: 67c3fd04cfdd177546be1218742758e7b44df236 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 **********************************************************************
3 * recmgr.c -- Recording manager for emu10k1 driver
4 * Copyright 1999, 2000 Creative Labs, Inc.
5 *
6 **********************************************************************
7 *
8 * Date Author Summary of changes
9 * ---- ------ ------------------
10 * October 20, 1999 Bertrand Lee base code release
11 *
12 **********************************************************************
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public
25 * License along with this program; if not, write to the Free
26 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
27 * USA.
28 *
29 **********************************************************************
30 */
31
32#include <asm/delay.h>
33#include "8010.h"
34#include "recmgr.h"
35
36void emu10k1_reset_record(struct emu10k1_card *card, struct wavein_buffer *buffer)
37{
38 DPF(2, "emu10k1_reset_record()\n");
39
40 sblive_writeptr(card, buffer->sizereg, 0, ADCBS_BUFSIZE_NONE);
41
42 sblive_writeptr(card, buffer->sizereg, 0, buffer->sizeregval);
43
44 while (sblive_readptr(card, buffer->idxreg, 0))
45 udelay(5);
46}
47
48void emu10k1_start_record(struct emu10k1_card *card, struct wavein_buffer *buffer)
49{
50 DPF(2, "emu10k1_start_record()\n");
51
52 if (buffer->adcctl)
53 sblive_writeptr(card, ADCCR, 0, buffer->adcctl);
54}
55
56void emu10k1_stop_record(struct emu10k1_card *card, struct wavein_buffer *buffer)
57{
58 DPF(2, "emu10k1_stop_record()\n");
59
60 /* Disable record transfer */
61 if (buffer->adcctl)
62 sblive_writeptr(card, ADCCR, 0, 0);
63}
64
65void emu10k1_set_record_src(struct emu10k1_card *card, struct wiinst *wiinst)
66{
67 struct wavein_buffer *buffer = &wiinst->buffer;
68
69 DPF(2, "emu10k1_set_record_src()\n");
70
71 switch (wiinst->recsrc) {
72
73 case WAVERECORD_AC97:
74 DPF(2, "recording source: AC97\n");
75 buffer->sizereg = ADCBS;
76 buffer->addrreg = ADCBA;
77 buffer->idxreg = card->is_audigy ? A_ADCIDX_IDX : ADCIDX_IDX;
78
79 switch (wiinst->format.samplingrate) {
80 case 0xBB80:
81 buffer->adcctl = ADCCR_SAMPLERATE_48;
82 break;
83 case 0xAC44:
84 buffer->adcctl = ADCCR_SAMPLERATE_44;
85 break;
86 case 0x7D00:
87 buffer->adcctl = ADCCR_SAMPLERATE_32;
88 break;
89 case 0x5DC0:
90 buffer->adcctl = ADCCR_SAMPLERATE_24;
91 break;
92 case 0x5622:
93 buffer->adcctl = ADCCR_SAMPLERATE_22;
94 break;
95 case 0x3E80:
96 buffer->adcctl = ADCCR_SAMPLERATE_16;
97 break;
98 // FIXME: audigy supports 12kHz recording
99 /*
100 case ????:
101 buffer->adcctl = A_ADCCR_SAMPLERATE_12;
102 break;
103 */
104 case 0x2B11:
105 buffer->adcctl = card->is_audigy ? A_ADCCR_SAMPLERATE_11 : ADCCR_SAMPLERATE_11;
106 break;
107 case 0x1F40:
108 buffer->adcctl = card->is_audigy ? A_ADCCR_SAMPLERATE_8 : ADCCR_SAMPLERATE_8;
109 break;
110 default:
111 BUG();
112 break;
113 }
114
115 buffer->adcctl |= card->is_audigy ? A_ADCCR_LCHANENABLE : ADCCR_LCHANENABLE;
116
117 if (wiinst->format.channels == 2)
118 buffer->adcctl |= card->is_audigy ? A_ADCCR_RCHANENABLE : ADCCR_RCHANENABLE;
119
120 break;
121
122 case WAVERECORD_MIC:
123 DPF(2, "recording source: MIC\n");
124 buffer->sizereg = MICBS;
125 buffer->addrreg = MICBA;
126 buffer->idxreg = MICIDX_IDX;
127 buffer->adcctl = 0;
128 break;
129
130 case WAVERECORD_FX:
131 DPF(2, "recording source: FX\n");
132 buffer->sizereg = FXBS;
133 buffer->addrreg = FXBA;
134 buffer->idxreg = FXIDX_IDX;
135 buffer->adcctl = 0;
136
137 sblive_writeptr(card, FXWC, 0, wiinst->fxwc);
138 break;
139 default:
140 BUG();
141 break;
142 }
143
144 DPD(2, "bus addx: %#lx\n", (unsigned long) buffer->dma_handle);
145
146 sblive_writeptr(card, buffer->addrreg, 0, (u32)buffer->dma_handle);
147}