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review.evervolv.com / android_kernel_oneplus_sm8150 / b13cfd173f73c3f6f9a307b7b6e64d45fbd756b2 / . / drivers / net / wireless / arlan.h
blob: 70a6d7b83c4a05bb26dff8d020d195973cf875f9 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * Copyright (C) 1997 Cullen Jennings
3 * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
4 * GNU General Public License applies
5 */
6
7#include <linux/module.h>
8#include <linux/config.h>
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <linux/skbuff.h>
12#include <linux/if_ether.h> /* For the statistics structure. */
13#include <linux/if_arp.h> /* For ARPHRD_ETHER */
14#include <linux/ptrace.h>
15#include <linux/ioport.h>
16#include <linux/in.h>
17#include <linux/slab.h>
18#include <linux/string.h>
19#include <linux/timer.h>
20
21#include <linux/init.h>
22#include <linux/bitops.h>
23#include <asm/system.h>
24#include <asm/io.h>
25#include <linux/errno.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29
30
31//#define ARLAN_DEBUGGING 1
32
33#define ARLAN_PROC_INTERFACE
34#define MAX_ARLANS 4 /* not more than 4 ! */
35#define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
36
37#define ARLAN_MAX_MULTICAST_ADDRS 16
38#define ARLAN_RCV_CLEAN 0
39#define ARLAN_RCV_PROMISC 1
40#define ARLAN_RCV_CONTROL 2
41
42#ifdef CONFIG_PROC_FS
43extern int init_arlan_proc(void);
44extern void cleanup_arlan_proc(void);
45#else
46#define init_arlan_proc() ({ 0; })
47#define cleanup_arlan_proc() do { } while (0)
48#endif
49
50extern struct net_device *arlan_device[MAX_ARLANS];
51extern int arlan_debug;
52extern int arlan_entry_debug;
53extern int arlan_exit_debug;
54extern int testMemory;
55extern int arlan_command(struct net_device * dev, int command);
56
57#define SIDUNKNOWN -1
58#define radioNodeIdUNKNOWN -1
59#define irqUNKNOWN 0
60#define debugUNKNOWN 0
61#define testMemoryUNKNOWN 1
62#define spreadingCodeUNKNOWN 0
63#define channelNumberUNKNOWN 0
64#define channelSetUNKNOWN 0
65#define systemIdUNKNOWN -1
66#define registrationModeUNKNOWN -1
67
68
69#define IFDEBUG( L ) if ( (L) & arlan_debug )
70#define ARLAN_FAKE_HDR_LEN 12
71
72#ifdef ARLAN_DEBUGGING
73 #define DEBUG 1
74 #define ARLAN_ENTRY_EXIT_DEBUGGING 1
75 #define ARLAN_DEBUG(a,b) printk(KERN_DEBUG a, b)
76#else
77 #define ARLAN_DEBUG(a,b)
78#endif
79
80#define ARLAN_SHMEM_SIZE 0x2000
81
82struct arlan_shmem
83{
84 /* Header Signature */
85 volatile char textRegion[48];
86 volatile u_char resetFlag;
87 volatile u_char diagnosticInfo;
88 volatile u_short diagnosticOffset;
89 volatile u_char _1[12];
90 volatile u_char lanCardNodeId[6];
91 volatile u_char broadcastAddress[6];
92 volatile u_char hardwareType;
93 volatile u_char majorHardwareVersion;
94 volatile u_char minorHardwareVersion;
95 volatile u_char radioModule;// shows EEPROM, can be overridden at 0x111
96 volatile u_char defaultChannelSet; // shows EEProm, can be overriiden at 0x10A
97 volatile u_char _2[47];
98
99 /* Control/Status Block - 0x0080 */
100 volatile u_char interruptInProgress; /* not used by lancpu */
101 volatile u_char cntrlRegImage; /* not used by lancpu */
102 volatile u_char _3[13];
103 volatile u_char dumpByte;
104 volatile u_char commandByte; /* non-zero = active */
105 volatile u_char commandParameter[15];
106
107 /* Receive Status - 0x00a0 */
108 volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
109 volatile u_char rxFrmType;
110 volatile u_short rxOffset;
111 volatile u_short rxLength;
112 volatile u_char rxSrc[6];
113 volatile u_char rxBroadcastFlag;
114 volatile u_char rxQuality;
115 volatile u_char scrambled;
116 volatile u_char _4[1];
117
118 /* Transmit Status - 0x00b0 */
119 volatile u_char txStatus;
120 volatile u_char txAckQuality;
121 volatile u_char numRetries;
122 volatile u_char _5[14];
123 volatile u_char registeredRouter[6];
124 volatile u_char backboneRouter[6];
125 volatile u_char registrationStatus;
126 volatile u_char configuredStatusFlag;
127 volatile u_char _6[1];
128 volatile u_char ultimateDestAddress[6];
129 volatile u_char immedDestAddress[6];
130 volatile u_char immedSrcAddress[6];
131 volatile u_short rxSequenceNumber;
132 volatile u_char assignedLocaltalkAddress;
133 volatile u_char _7[27];
134
135 /* System Parameter Block */
136
137 /* - Driver Parameters (Novell Specific) */
138
139 volatile u_short txTimeout;
140 volatile u_short transportTime;
141 volatile u_char _8[4];
142
143 /* - Configuration Parameters */
144 volatile u_char irqLevel;
145 volatile u_char spreadingCode;
146 volatile u_char channelSet;
147 volatile u_char channelNumber;
148 volatile u_short radioNodeId;
149 volatile u_char _9[2];
150 volatile u_char scramblingDisable;
151 volatile u_char radioType;
152 volatile u_short routerId;
153 volatile u_char _10[9];
154 volatile u_char txAttenuation;
155 volatile u_char systemId[4];
156 volatile u_short globalChecksum;
157 volatile u_char _11[4];
158 volatile u_short maxDatagramSize;
159 volatile u_short maxFrameSize;
160 volatile u_char maxRetries;
161 volatile u_char receiveMode;
162 volatile u_char priority;
163 volatile u_char rootOrRepeater;
164 volatile u_char specifiedRouter[6];
165 volatile u_short fastPollPeriod;
166 volatile u_char pollDecay;
167 volatile u_char fastPollDelay[2];
168 volatile u_char arlThreshold;
169 volatile u_char arlDecay;
170 volatile u_char _12[1];
171 volatile u_short specRouterTimeout;
172 volatile u_char _13[5];
173
174 /* Scrambled Area */
175 volatile u_char SID[4];
176 volatile u_char encryptionKey[12];
177 volatile u_char _14[2];
178 volatile u_char waitTime[2];
179 volatile u_char lParameter[2];
180 volatile u_char _15[3];
181 volatile u_short headerSize;
182 volatile u_short sectionChecksum;
183
184 volatile u_char registrationMode;
185 volatile u_char registrationFill;
186 volatile u_short pollPeriod;
187 volatile u_short refreshPeriod;
188 volatile u_char name[16];
189 volatile u_char NID[6];
190 volatile u_char localTalkAddress;
191 volatile u_char codeFormat;
192 volatile u_char numChannels;
193 volatile u_char channel1;
194 volatile u_char channel2;
195 volatile u_char channel3;
196 volatile u_char channel4;
197 volatile u_char SSCode[59];
198
199 volatile u_char _16[0xC0];
200 volatile u_short auxCmd;
201 volatile u_char dumpPtr[4];
202 volatile u_char dumpVal;
203 volatile u_char _17[0x6A];
204 volatile u_char wireTest;
205 volatile u_char _18[14];
206
207 /* Statistics Block - 0x0300 */
208 volatile u_char hostcpuLock;
209 volatile u_char lancpuLock;
210 volatile u_char resetTime[18];
211
212 volatile u_char numDatagramsTransmitted[4];
213 volatile u_char numReTransmissions[4];
214 volatile u_char numFramesDiscarded[4];
215 volatile u_char numDatagramsReceived[4];
216 volatile u_char numDuplicateReceivedFrames[4];
217 volatile u_char numDatagramsDiscarded[4];
218
219 volatile u_short maxNumReTransmitDatagram;
220 volatile u_short maxNumReTransmitFrames;
221 volatile u_short maxNumConsecutiveDuplicateFrames;
222 /* misaligned here so we have to go to characters */
223
224 volatile u_char numBytesTransmitted[4];
225 volatile u_char numBytesReceived[4];
226 volatile u_char numCRCErrors[4];
227 volatile u_char numLengthErrors[4];
228 volatile u_char numAbortErrors[4];
229 volatile u_char numTXUnderruns[4];
230 volatile u_char numRXOverruns[4];
231 volatile u_char numHoldOffs[4];
232 volatile u_char numFramesTransmitted[4];
233 volatile u_char numFramesReceived[4];
234 volatile u_char numReceiveFramesLost[4];
235 volatile u_char numRXBufferOverflows[4];
236 volatile u_char numFramesDiscardedAddrMismatch[4];
237 volatile u_char numFramesDiscardedSIDMismatch[4];
238 volatile u_char numPollsTransmistted[4];
239 volatile u_char numPollAcknowledges[4];
240 volatile u_char numStatusTimeouts[4];
241 volatile u_char numNACKReceived[4];
242
243 volatile u_char _19[0x86];
244
245 volatile u_char txBuffer[0x800];
246 volatile u_char rxBuffer[0x800];
247
248 volatile u_char _20[0x800];
249 volatile u_char _21[0x3fb];
250 volatile u_char configStatus;
251 volatile u_char _22;
252 volatile u_char progIOCtrl;
253 volatile u_char shareMBase;
254 volatile u_char controlRegister;
255};
256
257struct arlan_conf_stru {
258 int spreadingCode;
259 int channelSet;
260 int channelNumber;
261 int scramblingDisable;
262 int txAttenuation;
263 int systemId;
264 int maxDatagramSize;
265 int maxFrameSize;
266 int maxRetries;
267 int receiveMode;
268 int priority;
269 int rootOrRepeater;
270 int SID;
271 int radioNodeId;
272 int registrationMode;
273 int registrationFill;
274 int localTalkAddress;
275 int codeFormat;
276 int numChannels;
277 int channel1;
278 int channel2;
279 int channel3;
280 int channel4;
281 int txClear;
282 int txRetries;
283 int txRouting;
284 int txScrambled;
285 int rxParameter;
286 int txTimeoutMs;
287 int txAckTimeoutMs;
288 int waitCardTimeout;
289 int waitTime;
290 int lParameter;
291 int _15;
292 int headerSize;
293 int retries;
294 int tx_delay_ms;
295 int waitReTransmitPacketMaxSize;
296 int ReTransmitPacketMaxSize;
297 int fastReTransCount;
298 int driverRetransmissions;
299 int registrationInterrupts;
300 int hardwareType;
301 int radioType;
302 int writeRadioType;
303 int writeEEPROM;
304 char siteName[17];
305 int measure_rate;
306 int in_speed;
307 int out_speed;
308 int in_speed10;
309 int out_speed10;
310 int in_speed_max;
311 int out_speed_max;
312 int pre_Command_Wait;
313 int rx_tweak1;
314 int rx_tweak2;
315 int tx_queue_len;
316};
317
318extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
319
320struct TxParam
321{
322 volatile short offset;
323 volatile short length;
324 volatile u_char dest[6];
325 volatile unsigned char clear;
326 volatile unsigned char retries;
327 volatile unsigned char routing;
328 volatile unsigned char scrambled;
329};
330
331#define TX_RING_SIZE 2
332/* Information that need to be kept for each board. */
333struct arlan_private {
334 struct net_device_stats stats;
335 struct arlan_shmem __iomem * card;
336 struct arlan_shmem * conf;
337
338 struct arlan_conf_stru * Conf;
339 int bad;
340 int reset;
341 unsigned long lastReset;
342 struct timer_list timer;
343 struct timer_list tx_delay_timer;
344 struct timer_list tx_retry_timer;
345 struct timer_list rx_check_timer;
346
347 int registrationLostCount;
348 int reRegisterExp;
349 int irq_test_done;
350
351 struct TxParam txRing[TX_RING_SIZE];
352 char reTransmitBuff[0x800];
353 int txLast;
354 unsigned ReTransmitRequested;
355 unsigned long tx_done_delayed;
356 unsigned long registrationLastSeen;
357
358 unsigned long tx_last_sent;
359 unsigned long tx_last_cleared;
360 unsigned long retransmissions;
361 unsigned long interrupt_ack_requested;
362 spinlock_t lock;
363 unsigned long waiting_command_mask;
364 unsigned long card_polling_interval;
365 unsigned long last_command_buff_free_time;
366
367 int under_reset;
368 int under_config;
369 int rx_command_given;
370 int tx_command_given;
371 unsigned long interrupt_processing_active;
372 unsigned long last_rx_int_ack_time;
373 unsigned long in_bytes;
374 unsigned long out_bytes;
375 unsigned long in_time;
376 unsigned long out_time;
377 unsigned long in_time10;
378 unsigned long out_time10;
379 unsigned long in_bytes10;
380 unsigned long out_bytes10;
381 int init_etherdev_alloc;
382};
383
384
385
386#define ARLAN_CLEAR 0x00
387#define ARLAN_RESET 0x01
388#define ARLAN_CHANNEL_ATTENTION 0x02
389#define ARLAN_INTERRUPT_ENABLE 0x04
390#define ARLAN_CLEAR_INTERRUPT 0x08
391#define ARLAN_POWER 0x40
392#define ARLAN_ACCESS 0x80
393
394#define ARLAN_COM_CONF 0x01
395#define ARLAN_COM_RX_ENABLE 0x03
396#define ARLAN_COM_RX_ABORT 0x04
397#define ARLAN_COM_TX_ENABLE 0x05
398#define ARLAN_COM_TX_ABORT 0x06
399#define ARLAN_COM_NOP 0x07
400#define ARLAN_COM_STANDBY 0x08
401#define ARLAN_COM_ACTIVATE 0x09
402#define ARLAN_COM_GOTO_SLOW_POLL 0x0a
403#define ARLAN_COM_INT 0x80
404
405
406#define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
407#define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
408#define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
409
410#define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
411#define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
412
413#define READSHM(to,from,atype) {\
414 atype tmp;\
415 memcpy_fromio(&(tmp),&(from),sizeof(atype));\
416 to = tmp;\
417 }
418
419#define READSHMEM(from,atype)\
420 atype from; \
421 READSHM(from, arlan->from, atype);
422
423#define WRITESHM(to,from,atype) \
424 { atype tmpSHM = from;\
425 memcpy_toio(&(to),&tmpSHM,sizeof(atype));\
426 }
427
428#define DEBUGSHM(levelSHM,stringSHM,stuff,atype) \
429 { atype tmpSHM; \
430 memcpy_fromio(&tmpSHM,&(stuff),sizeof(atype));\
431 IFDEBUG(levelSHM) printk(stringSHM,tmpSHM);\
432 }
433
434#define WRITESHMB(to, val) \
435 writeb(val,&(to))
436#define READSHMB(to) \
437 readb(&(to))
438#define WRITESHMS(to, val) \
439 writew(val,&(to))
440#define READSHMS(to) \
441 readw(&(to))
442#define WRITESHMI(to, val) \
443 writel(val,&(to))
444#define READSHMI(to) \
445 readl(&(to))
446
447
448
449
450
451#define registrationBad(dev)\
452 ( ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
453 ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0) )
454
455
456#define readControlRegister(dev)\
457 READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
458
459#define writeControlRegister(dev, v){\
460 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage ,((v) &0xF) );\
461 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister ,(v) );}
462
463
464#define arlan_interrupt_lancpu(dev) {\
465 int cr; \
466 \
467 cr = readControlRegister(dev);\
468 if (cr & ARLAN_CHANNEL_ATTENTION){ \
469 writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
470 }else \
471 writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
472}
473
474#define clearChannelAttention(dev){ \
475 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION);}
476#define setHardwareReset(dev) {\
477 writeControlRegister(dev,readControlRegister(dev) | ARLAN_RESET);}
478#define clearHardwareReset(dev) {\
479 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_RESET);}
480#define setInterruptEnable(dev){\
481 writeControlRegister(dev,readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ;}
482#define clearInterruptEnable(dev){\
483 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ;}
484#define setClearInterrupt(dev){\
485 writeControlRegister(dev,readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ;}
486#define clearClearInterrupt(dev){\
487 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT);}
488#define setPowerOff(dev){\
489 writeControlRegister(dev,readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
490 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
491#define setPowerOn(dev){\
492 writeControlRegister(dev,readControlRegister(dev) & ~(ARLAN_POWER)); }
493#define arlan_lock_card_access(dev){\
494 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
495#define arlan_unlock_card_access(dev){\
496 writeControlRegister(dev,readControlRegister(dev) | ARLAN_ACCESS ); }
497
498
499
500
501#define ARLAN_COMMAND_RX 0x000001
502#define ARLAN_COMMAND_NOOP 0x000002
503#define ARLAN_COMMAND_NOOPINT 0x000004
504#define ARLAN_COMMAND_TX 0x000008
505#define ARLAN_COMMAND_CONF 0x000010
506#define ARLAN_COMMAND_RESET 0x000020
507#define ARLAN_COMMAND_TX_ABORT 0x000040
508#define ARLAN_COMMAND_RX_ABORT 0x000080
509#define ARLAN_COMMAND_POWERDOWN 0x000100
510#define ARLAN_COMMAND_POWERUP 0x000200
511#define ARLAN_COMMAND_SLOW_POLL 0x000400
512#define ARLAN_COMMAND_ACTIVATE 0x000800
513#define ARLAN_COMMAND_INT_ACK 0x001000
514#define ARLAN_COMMAND_INT_ENABLE 0x002000
515#define ARLAN_COMMAND_WAIT_NOW 0x004000
516#define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
517#define ARLAN_COMMAND_STANDBY 0x010000
518#define ARLAN_COMMAND_INT_RACK 0x020000
519#define ARLAN_COMMAND_INT_RENABLE 0x040000
520#define ARLAN_COMMAND_CONF_WAIT 0x080000
521#define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
522#define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
523 | ARLAN_COMMAND_RX_ABORT\
524 | ARLAN_COMMAND_CONF)
525#define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
526 | ARLAN_COMMAND_RX_ABORT\
527 | ARLAN_COMMAND_RESET)
528
529
530
531#define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
532#define ARLAN_DEBUG_RESET 0x00002
533#define ARLAN_DEBUG_TIMING 0x00004
534#define ARLAN_DEBUG_CARD_STATE 0x00008
535#define ARLAN_DEBUG_TX_CHAIN 0x00010
536#define ARLAN_DEBUG_MULTICAST 0x00020
537#define ARLAN_DEBUG_HEADER_DUMP 0x00040
538#define ARLAN_DEBUG_INTERRUPT 0x00080
539#define ARLAN_DEBUG_STARTUP 0x00100
540#define ARLAN_DEBUG_SHUTDOWN 0x00200
541