blob: 79e7c16c71ff1ad0cdfcdcfcc6958d8cf1f26a1b [file] [log] [blame]
Clemens Ladischd0ce9942007-12-23 19:50:57 +01001/*
2 * C-Media CMI8788 driver - main driver module
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
Clemens Ladischd0ce9942007-12-23 19:50:57 +010020#include <linux/delay.h>
21#include <linux/interrupt.h>
22#include <linux/mutex.h>
23#include <linux/pci.h>
24#include <sound/ac97_codec.h>
25#include <sound/asoundef.h>
26#include <sound/core.h>
27#include <sound/info.h>
28#include <sound/mpu401.h>
29#include <sound/pcm.h>
30#include "oxygen.h"
31
32MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
33MODULE_DESCRIPTION("C-Media CMI8788 helper library");
34MODULE_LICENSE("GPL");
35
36
37static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
38{
39 struct oxygen *chip = dev_id;
40 unsigned int status, clear, elapsed_streams, i;
41
42 status = oxygen_read16(chip, OXYGEN_INTERRUPT_STATUS);
43 if (!status)
44 return IRQ_NONE;
45
46 spin_lock(&chip->reg_lock);
47
48 clear = status & (OXYGEN_CHANNEL_A |
49 OXYGEN_CHANNEL_B |
50 OXYGEN_CHANNEL_C |
51 OXYGEN_CHANNEL_SPDIF |
52 OXYGEN_CHANNEL_MULTICH |
53 OXYGEN_CHANNEL_AC97 |
Clemens Ladischc2353a02008-01-18 09:17:53 +010054 OXYGEN_INT_SPDIF_IN_DETECT |
Clemens Ladischd0ce9942007-12-23 19:50:57 +010055 OXYGEN_INT_GPIO);
56 if (clear) {
Clemens Ladischc2353a02008-01-18 09:17:53 +010057 if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
58 chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
Clemens Ladischd0ce9942007-12-23 19:50:57 +010059 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
60 chip->interrupt_mask & ~clear);
61 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
62 chip->interrupt_mask);
63 }
64
65 elapsed_streams = status & chip->pcm_running;
66
67 spin_unlock(&chip->reg_lock);
68
69 for (i = 0; i < PCM_COUNT; ++i)
70 if ((elapsed_streams & (1 << i)) && chip->streams[i])
71 snd_pcm_period_elapsed(chip->streams[i]);
72
Clemens Ladischc2353a02008-01-18 09:17:53 +010073 if (status & OXYGEN_INT_SPDIF_IN_DETECT) {
Clemens Ladischd0ce9942007-12-23 19:50:57 +010074 spin_lock(&chip->reg_lock);
75 i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
Clemens Ladischc2353a02008-01-18 09:17:53 +010076 if (i & OXYGEN_SPDIF_RATE_INT) {
Clemens Ladischd0ce9942007-12-23 19:50:57 +010077 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
78 schedule_work(&chip->spdif_input_bits_work);
79 }
80 spin_unlock(&chip->reg_lock);
81 }
82
83 if (status & OXYGEN_INT_GPIO)
84 ;
85
86 if ((status & OXYGEN_INT_MIDI) && chip->midi)
87 snd_mpu401_uart_interrupt(0, chip->midi->private_data);
88
89 return IRQ_HANDLED;
90}
91
92static void oxygen_spdif_input_bits_changed(struct work_struct *work)
93{
94 struct oxygen *chip = container_of(work, struct oxygen,
95 spdif_input_bits_work);
96
97 spin_lock_irq(&chip->reg_lock);
Clemens Ladischc2353a02008-01-18 09:17:53 +010098 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
99 OXYGEN_SPDIF_IN_CLOCK_96,
100 OXYGEN_SPDIF_IN_CLOCK_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100101 spin_unlock_irq(&chip->reg_lock);
102 msleep(1);
103 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL)
Clemens Ladischc2353a02008-01-18 09:17:53 +0100104 & OXYGEN_SPDIF_LOCK_STATUS)) {
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100105 spin_lock_irq(&chip->reg_lock);
Clemens Ladischc2353a02008-01-18 09:17:53 +0100106 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
107 OXYGEN_SPDIF_IN_CLOCK_192,
108 OXYGEN_SPDIF_IN_CLOCK_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100109 spin_unlock_irq(&chip->reg_lock);
110 msleep(1);
111 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL)
Clemens Ladischc2353a02008-01-18 09:17:53 +0100112 & OXYGEN_SPDIF_LOCK_STATUS)) {
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100113 spin_lock_irq(&chip->reg_lock);
Clemens Ladischc2353a02008-01-18 09:17:53 +0100114 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
115 OXYGEN_SPDIF_IN_CLOCK_96,
116 OXYGEN_SPDIF_IN_CLOCK_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100117 spin_unlock_irq(&chip->reg_lock);
118 }
119 }
120
Clemens Ladisch01a3aff2008-01-14 08:56:01 +0100121 if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100122 spin_lock_irq(&chip->reg_lock);
Clemens Ladischc2353a02008-01-18 09:17:53 +0100123 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100124 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
125 chip->interrupt_mask);
126 spin_unlock_irq(&chip->reg_lock);
127
128 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
Clemens Ladisch01a3aff2008-01-14 08:56:01 +0100129 &chip->controls[CONTROL_SPDIF_INPUT_BITS]->id);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100130 }
131}
132
133#ifdef CONFIG_PROC_FS
134static void oxygen_proc_read(struct snd_info_entry *entry,
135 struct snd_info_buffer *buffer)
136{
137 struct oxygen *chip = entry->private_data;
138 int i, j;
139
140 snd_iprintf(buffer, "CMI8788\n\n");
141 for (i = 0; i < 0x100; i += 0x10) {
142 snd_iprintf(buffer, "%02x:", i);
143 for (j = 0; j < 0x10; ++j)
144 snd_iprintf(buffer, " %02x", oxygen_read8(chip, i + j));
145 snd_iprintf(buffer, "\n");
146 }
147 if (mutex_lock_interruptible(&chip->mutex) < 0)
148 return;
Clemens Ladisch31c77642008-01-16 08:28:17 +0100149 if (chip->has_ac97_0) {
150 snd_iprintf(buffer, "\nAC97\n");
151 for (i = 0; i < 0x80; i += 0x10) {
152 snd_iprintf(buffer, "%02x:", i);
153 for (j = 0; j < 0x10; j += 2)
154 snd_iprintf(buffer, " %04x",
155 oxygen_read_ac97(chip, 0, i + j));
156 snd_iprintf(buffer, "\n");
157 }
158 }
159 if (chip->has_ac97_1) {
160 snd_iprintf(buffer, "\nAC97 2\n");
161 for (i = 0; i < 0x80; i += 0x10) {
162 snd_iprintf(buffer, "%02x:", i);
163 for (j = 0; j < 0x10; j += 2)
164 snd_iprintf(buffer, " %04x",
165 oxygen_read_ac97(chip, 1, i + j));
166 snd_iprintf(buffer, "\n");
167 }
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100168 }
169 mutex_unlock(&chip->mutex);
170}
171
172static void __devinit oxygen_proc_init(struct oxygen *chip)
173{
174 struct snd_info_entry *entry;
175
176 if (!snd_card_proc_new(chip->card, "cmi8788", &entry))
177 snd_info_set_text_ops(entry, chip, oxygen_proc_read);
178}
179#else
180#define oxygen_proc_init(chip)
181#endif
182
183static void __devinit oxygen_init(struct oxygen *chip)
184{
185 unsigned int i;
186
187 chip->dac_routing = 1;
188 for (i = 0; i < 8; ++i)
189 chip->dac_volume[i] = 0xff;
190 chip->spdif_playback_enable = 1;
191 chip->spdif_bits = OXYGEN_SPDIF_C | OXYGEN_SPDIF_ORIGINAL |
192 (IEC958_AES1_CON_PCM_CODER << OXYGEN_SPDIF_CATEGORY_SHIFT);
193 chip->spdif_pcm_bits = chip->spdif_bits;
194
195 if (oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_REVISION_2)
196 chip->revision = 2;
197 else
198 chip->revision = 1;
199
200 if (chip->revision == 1)
Clemens Ladischc2353a02008-01-18 09:17:53 +0100201 oxygen_set_bits8(chip, OXYGEN_MISC,
202 OXYGEN_MISC_PCI_MEM_W_1_CLOCK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100203
Clemens Ladisch31c77642008-01-16 08:28:17 +0100204 i = oxygen_read16(chip, OXYGEN_AC97_CONTROL);
205 chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0;
206 chip->has_ac97_1 = (i & OXYGEN_AC97_CODEC_1) != 0;
207
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100208 oxygen_set_bits8(chip, OXYGEN_FUNCTION,
209 OXYGEN_FUNCTION_RESET_CODEC |
Clemens Ladisch84aa6b72008-01-16 08:28:54 +0100210 chip->model->function_flags);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100211 oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT, 0x010a);
212 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, 0x010a);
213 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT, 0x010a);
214 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT, 0x010a);
Clemens Ladischc2353a02008-01-18 09:17:53 +0100215 oxygen_set_bits32(chip, OXYGEN_SPDIF_CONTROL, OXYGEN_SPDIF_RATE_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100216 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits);
Clemens Ladisch7113e952008-01-14 08:55:03 +0100217 oxygen_write16(chip, OXYGEN_PLAY_ROUTING, 0xe100);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100218 oxygen_write8(chip, OXYGEN_REC_ROUTING, 0x10);
219 oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0x00);
220 oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING, 0xe4);
221
222 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
223 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
224
225 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0x00);
Clemens Ladisch31c77642008-01-16 08:28:17 +0100226 if (chip->has_ac97_0) {
227 oxygen_clear_bits16(chip, OXYGEN_AC97_OUT_CONFIG,
Clemens Ladischc2353a02008-01-18 09:17:53 +0100228 OXYGEN_AC97_CODEC0_FRONTL |
229 OXYGEN_AC97_CODEC0_FRONTR |
230 OXYGEN_AC97_CODEC0_SIDEL |
231 OXYGEN_AC97_CODEC0_SIDER |
232 OXYGEN_AC97_CODEC0_CENTER |
233 OXYGEN_AC97_CODEC0_BASE |
234 OXYGEN_AC97_CODEC0_REARL |
235 OXYGEN_AC97_CODEC0_REARR);
Clemens Ladisch31c77642008-01-16 08:28:17 +0100236 oxygen_set_bits16(chip, OXYGEN_AC97_IN_CONFIG,
Clemens Ladischc2353a02008-01-18 09:17:53 +0100237 OXYGEN_AC97_CODEC0_LINEL |
238 OXYGEN_AC97_CODEC0_LINER);
Clemens Ladisch31c77642008-01-16 08:28:17 +0100239 oxygen_write_ac97(chip, 0, AC97_RESET, 0);
240 msleep(1);
241 oxygen_ac97_set_bits(chip, 0, 0x70, 0x0300);
242 oxygen_ac97_set_bits(chip, 0, 0x64, 0x8043);
243 oxygen_ac97_set_bits(chip, 0, 0x62, 0x180f);
244 oxygen_write_ac97(chip, 0, AC97_MASTER, 0x0000);
245 oxygen_write_ac97(chip, 0, AC97_PC_BEEP, 0x8000);
246 oxygen_write_ac97(chip, 0, AC97_MIC, 0x8808);
247 oxygen_write_ac97(chip, 0, AC97_LINE, 0x0808);
248 oxygen_write_ac97(chip, 0, AC97_CD, 0x8808);
249 oxygen_write_ac97(chip, 0, AC97_VIDEO, 0x8808);
250 oxygen_write_ac97(chip, 0, AC97_AUX, 0x8808);
251 oxygen_write_ac97(chip, 0, AC97_REC_GAIN, 0x8000);
252 oxygen_write_ac97(chip, 0, AC97_CENTER_LFE_MASTER, 0x8080);
253 oxygen_write_ac97(chip, 0, AC97_SURROUND_MASTER, 0x8080);
254 oxygen_ac97_clear_bits(chip, 0, 0x72, 0x0001);
255 /* power down unused ADCs and DACs */
256 oxygen_ac97_set_bits(chip, 0, AC97_POWERDOWN,
257 AC97_PD_PR0 | AC97_PD_PR1);
258 oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS,
259 AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK);
260 }
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100261}
262
263static void oxygen_card_free(struct snd_card *card)
264{
265 struct oxygen *chip = card->private_data;
266
267 spin_lock_irq(&chip->reg_lock);
268 chip->interrupt_mask = 0;
269 chip->pcm_running = 0;
270 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
271 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
272 spin_unlock_irq(&chip->reg_lock);
273 if (chip->irq >= 0) {
274 free_irq(chip->irq, chip);
275 synchronize_irq(chip->irq);
276 }
277 flush_scheduled_work();
278 chip->model->cleanup(chip);
279 mutex_destroy(&chip->mutex);
280 pci_release_regions(chip->pci);
281 pci_disable_device(chip->pci);
282}
283
284int __devinit oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
285 const struct oxygen_model *model)
286{
287 struct snd_card *card;
288 struct oxygen *chip;
289 int err;
290
291 card = snd_card_new(index, id, model->owner, sizeof *chip);
292 if (!card)
293 return -ENOMEM;
294
295 chip = card->private_data;
296 chip->card = card;
297 chip->pci = pci;
298 chip->irq = -1;
299 chip->model = model;
300 spin_lock_init(&chip->reg_lock);
301 mutex_init(&chip->mutex);
302 INIT_WORK(&chip->spdif_input_bits_work,
303 oxygen_spdif_input_bits_changed);
304
305 err = pci_enable_device(pci);
306 if (err < 0)
307 goto err_card;
308
309 err = pci_request_regions(pci, model->chip);
310 if (err < 0) {
311 snd_printk(KERN_ERR "cannot reserve PCI resources\n");
312 goto err_pci_enable;
313 }
314
315 if (!(pci_resource_flags(pci, 0) & IORESOURCE_IO) ||
316 pci_resource_len(pci, 0) < 0x100) {
317 snd_printk(KERN_ERR "invalid PCI I/O range\n");
318 err = -ENXIO;
319 goto err_pci_regions;
320 }
321 chip->addr = pci_resource_start(pci, 0);
322
323 pci_set_master(pci);
324 snd_card_set_dev(card, &pci->dev);
325 card->private_free = oxygen_card_free;
326
327 oxygen_init(chip);
328 model->init(chip);
329
330 err = request_irq(pci->irq, oxygen_interrupt, IRQF_SHARED,
331 model->chip, chip);
332 if (err < 0) {
333 snd_printk(KERN_ERR "cannot grab interrupt %d\n", pci->irq);
334 goto err_card;
335 }
336 chip->irq = pci->irq;
337
338 strcpy(card->driver, model->chip);
339 strcpy(card->shortname, model->shortname);
340 sprintf(card->longname, "%s (rev %u) at %#lx, irq %i",
341 model->longname, chip->revision, chip->addr, chip->irq);
342 strcpy(card->mixername, model->chip);
343 snd_component_add(card, model->chip);
344
345 err = oxygen_pcm_init(chip);
346 if (err < 0)
347 goto err_card;
348
349 err = oxygen_mixer_init(chip);
350 if (err < 0)
351 goto err_card;
352
353 if (oxygen_read8(chip, OXYGEN_MISC) & OXYGEN_MISC_MIDI) {
354 err = snd_mpu401_uart_new(card, 0, MPU401_HW_CMIPCI,
355 chip->addr + OXYGEN_MPU401,
356 MPU401_INFO_INTEGRATED, 0, 0,
357 &chip->midi);
358 if (err < 0)
359 goto err_card;
360 }
361
362 oxygen_proc_init(chip);
363
364 spin_lock_irq(&chip->reg_lock);
Clemens Ladischc2353a02008-01-18 09:17:53 +0100365 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100366 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
367 spin_unlock_irq(&chip->reg_lock);
368
369 err = snd_card_register(card);
370 if (err < 0)
371 goto err_card;
372
373 pci_set_drvdata(pci, card);
374 return 0;
375
376err_pci_regions:
377 pci_release_regions(pci);
378err_pci_enable:
379 pci_disable_device(pci);
380err_card:
381 snd_card_free(card);
382 return err;
383}
384EXPORT_SYMBOL(oxygen_pci_probe);
385
386void __devexit oxygen_pci_remove(struct pci_dev *pci)
387{
388 snd_card_free(pci_get_drvdata(pci));
389 pci_set_drvdata(pci, NULL);
390}
391EXPORT_SYMBOL(oxygen_pci_remove);