| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 3 |  * License.  See the file "COPYING" in the main directory of this archive | 
 | 4 |  * for more details. | 
 | 5 |  * | 
 | 6 |  * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle | 
 | 7 |  * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | 
 | 8 |  * Copyright (C) 2001 MIPS Technologies, Inc. | 
 | 9 |  */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 |  | 
 | 11 | #include <asm/asm.h> | 
 | 12 | #include <asm/asmmacro.h> | 
 | 13 | #include <asm/regdef.h> | 
 | 14 | #include <asm/mipsregs.h> | 
 | 15 | #include <asm/stackframe.h> | 
 | 16 | #include <asm/isadep.h> | 
 | 17 | #include <asm/thread_info.h> | 
 | 18 | #include <asm/war.h> | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 19 | #ifdef CONFIG_MIPS_MT_SMTC | 
 | 20 | #include <asm/mipsmtregs.h> | 
 | 21 | #endif | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 |  | 
| Atsushi Nemoto | f431baa | 2006-10-09 01:24:23 +0900 | [diff] [blame] | 23 | #ifndef CONFIG_PREEMPT | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #define resume_kernel	restore_all | 
| Franck Bui-Huu | 7da8a58 | 2007-02-13 14:50:18 +0100 | [diff] [blame] | 25 | #else | 
 | 26 | #define __ret_from_irq	ret_from_exception | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #endif | 
 | 28 |  | 
 | 29 | 	.text | 
 | 30 | 	.align	5 | 
| Franck Bui-Huu | 7da8a58 | 2007-02-13 14:50:18 +0100 | [diff] [blame] | 31 | #ifndef CONFIG_PREEMPT | 
 | 32 | FEXPORT(ret_from_exception) | 
 | 33 | 	local_irq_disable			# preempt stop | 
 | 34 | 	b	__ret_from_irq | 
 | 35 | #endif | 
| Atsushi Nemoto | f431baa | 2006-10-09 01:24:23 +0900 | [diff] [blame] | 36 | FEXPORT(ret_from_irq) | 
 | 37 | 	LONG_S	s0, TI_REGS($28) | 
| Franck Bui-Huu | 7da8a58 | 2007-02-13 14:50:18 +0100 | [diff] [blame] | 38 | FEXPORT(__ret_from_irq) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | 	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode? | 
 | 40 | 	andi	t0, t0, KU_USER | 
 | 41 | 	beqz	t0, resume_kernel | 
 | 42 |  | 
| Thiemo Seufer | c264852 | 2004-12-10 12:56:33 +0000 | [diff] [blame] | 43 | resume_userspace: | 
 | 44 | 	local_irq_disable		# make sure we dont miss an | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | 					# interrupt setting need_resched | 
 | 46 | 					# between sampling and return | 
 | 47 | 	LONG_L	a2, TI_FLAGS($28)	# current->work | 
| Thiemo Seufer | c264852 | 2004-12-10 12:56:33 +0000 | [diff] [blame] | 48 | 	andi	t0, a2, _TIF_WORK_MASK	# (ignoring syscall_trace) | 
 | 49 | 	bnez	t0, work_pending | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | 	j	restore_all | 
 | 51 |  | 
 | 52 | #ifdef CONFIG_PREEMPT | 
| Thiemo Seufer | c264852 | 2004-12-10 12:56:33 +0000 | [diff] [blame] | 53 | resume_kernel: | 
| Ralf Baechle | a18815a | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 54 | 	local_irq_disable | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | 	lw	t0, TI_PRE_COUNT($28) | 
 | 56 | 	bnez	t0, restore_all | 
 | 57 | need_resched: | 
 | 58 | 	LONG_L	t0, TI_FLAGS($28) | 
 | 59 | 	andi	t1, t0, _TIF_NEED_RESCHED | 
 | 60 | 	beqz	t1, restore_all | 
 | 61 | 	LONG_L	t0, PT_STATUS(sp)		# Interrupts off? | 
 | 62 | 	andi	t0, 1 | 
 | 63 | 	beqz	t0, restore_all | 
| Ralf Baechle | a18815a | 2005-02-07 02:54:29 +0000 | [diff] [blame] | 64 | 	jal	preempt_schedule_irq | 
| Ralf Baechle | cdaed73 | 2005-03-04 12:35:42 +0000 | [diff] [blame] | 65 | 	b	need_resched | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | #endif | 
 | 67 |  | 
 | 68 | FEXPORT(ret_from_fork) | 
| Ingo Molnar | 36c8b58 | 2006-07-03 00:25:41 -0700 | [diff] [blame] | 69 | 	jal	schedule_tail		# a0 = struct task_struct *prev | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 |  | 
 | 71 | FEXPORT(syscall_exit) | 
 | 72 | 	local_irq_disable		# make sure need_resched and | 
 | 73 | 					# signals dont change between | 
 | 74 | 					# sampling and return | 
 | 75 | 	LONG_L	a2, TI_FLAGS($28)	# current->work | 
 | 76 | 	li	t0, _TIF_ALLWORK_MASK | 
 | 77 | 	and	t0, a2, t0 | 
 | 78 | 	bnez	t0, syscall_exit_work | 
 | 79 |  | 
 | 80 | FEXPORT(restore_all)			# restore full frame | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 81 | #ifdef CONFIG_MIPS_MT_SMTC | 
| Kevin D. Kissell | 0db3421 | 2007-07-12 16:21:08 +0100 | [diff] [blame] | 82 | #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 83 | /* Re-arm any temporarily masked interrupts not explicitly "acked" */ | 
 | 84 | 	mfc0	v0, CP0_TCSTATUS | 
 | 85 | 	ori	v1, v0, TCSTATUS_IXMT | 
 | 86 | 	mtc0	v1, CP0_TCSTATUS | 
 | 87 | 	andi	v0, TCSTATUS_IXMT | 
| Ralf Baechle | 4277ff5 | 2006-06-03 22:40:15 +0100 | [diff] [blame] | 88 | 	_ehb | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 89 | 	mfc0	t0, CP0_TCCONTEXT | 
 | 90 | 	DMT	9				# dmt t1 | 
 | 91 | 	jal	mips_ihb | 
 | 92 | 	mfc0	t2, CP0_STATUS | 
 | 93 | 	andi	t3, t0, 0xff00 | 
 | 94 | 	or	t2, t2, t3 | 
 | 95 | 	mtc0	t2, CP0_STATUS | 
| Ralf Baechle | 4277ff5 | 2006-06-03 22:40:15 +0100 | [diff] [blame] | 96 | 	_ehb | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 97 | 	andi	t1, t1, VPECONTROL_TE | 
 | 98 | 	beqz	t1, 1f | 
 | 99 | 	EMT | 
 | 100 | 1: | 
 | 101 | 	mfc0	v1, CP0_TCSTATUS | 
| Ralf Baechle | 477654f | 2006-04-27 15:44:50 +0100 | [diff] [blame] | 102 | 	/* We set IXMT above, XOR should clear it here */ | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 103 | 	xori	v1, v1, TCSTATUS_IXMT | 
 | 104 | 	or	v1, v0, v1 | 
 | 105 | 	mtc0	v1, CP0_TCSTATUS | 
| Ralf Baechle | 4277ff5 | 2006-06-03 22:40:15 +0100 | [diff] [blame] | 106 | 	_ehb | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 107 | 	xor	t0, t0, t3 | 
 | 108 | 	mtc0	t0, CP0_TCCONTEXT | 
| Kevin D. Kissell | 0db3421 | 2007-07-12 16:21:08 +0100 | [diff] [blame] | 109 | #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */ | 
| Kevin D. Kissell | d2bb01b | 2008-09-09 21:35:01 +0200 | [diff] [blame] | 110 | /* Detect and execute deferred IPI "interrupts" */ | 
 | 111 | 	LONG_L	s0, TI_REGS($28) | 
 | 112 | 	LONG_S	sp, TI_REGS($28) | 
 | 113 | 	jal	deferred_smtc_ipi | 
 | 114 | 	LONG_S	s0, TI_REGS($28) | 
| Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 115 | #endif /* CONFIG_MIPS_MT_SMTC */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | 	.set	noat | 
 | 117 | 	RESTORE_TEMP | 
 | 118 | 	RESTORE_AT | 
 | 119 | 	RESTORE_STATIC | 
 | 120 | FEXPORT(restore_partial)		# restore partial frame | 
| Ralf Baechle | 192ef36 | 2006-07-07 14:07:18 +0100 | [diff] [blame] | 121 | #ifdef CONFIG_TRACE_IRQFLAGS | 
 | 122 | 	SAVE_STATIC | 
 | 123 | 	SAVE_AT | 
 | 124 | 	SAVE_TEMP | 
 | 125 | 	LONG_L	v0, PT_STATUS(sp) | 
| Chris Dearman | cbde5eb | 2007-03-26 14:47:06 +0100 | [diff] [blame] | 126 | #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) | 
 | 127 | 	and	v0, ST0_IEP | 
 | 128 | #else | 
 | 129 | 	and	v0, ST0_IE | 
 | 130 | #endif | 
| Ralf Baechle | 192ef36 | 2006-07-07 14:07:18 +0100 | [diff] [blame] | 131 | 	beqz	v0, 1f | 
 | 132 | 	jal	trace_hardirqs_on | 
 | 133 | 	b	2f | 
 | 134 | 1:	jal	trace_hardirqs_off | 
 | 135 | 2: | 
 | 136 | 	RESTORE_TEMP | 
 | 137 | 	RESTORE_AT | 
 | 138 | 	RESTORE_STATIC | 
 | 139 | #endif | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | 	RESTORE_SOME | 
 | 141 | 	RESTORE_SP_AND_RET | 
 | 142 | 	.set	at | 
 | 143 |  | 
| Thiemo Seufer | c264852 | 2004-12-10 12:56:33 +0000 | [diff] [blame] | 144 | work_pending: | 
 | 145 | 	andi	t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | 	beqz	t0, work_notifysig | 
 | 147 | work_resched: | 
 | 148 | 	jal	schedule | 
 | 149 |  | 
| Thiemo Seufer | c264852 | 2004-12-10 12:56:33 +0000 | [diff] [blame] | 150 | 	local_irq_disable		# make sure need_resched and | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | 					# signals dont change between | 
 | 152 | 					# sampling and return | 
 | 153 | 	LONG_L	a2, TI_FLAGS($28) | 
 | 154 | 	andi	t0, a2, _TIF_WORK_MASK	# is there any work to be done | 
 | 155 | 					# other than syscall tracing? | 
 | 156 | 	beqz	t0, restore_all | 
 | 157 | 	andi	t0, a2, _TIF_NEED_RESCHED | 
 | 158 | 	bnez	t0, work_resched | 
 | 159 |  | 
 | 160 | work_notifysig:				# deal with pending signals and | 
 | 161 | 					# notify-resume requests | 
 | 162 | 	move	a0, sp | 
 | 163 | 	li	a1, 0 | 
 | 164 | 	jal	do_notify_resume	# a2 already loaded | 
| Ralf Baechle | 0bf0e3e | 2005-09-15 16:43:50 +0000 | [diff] [blame] | 165 | 	j	resume_userspace | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 |  | 
 | 167 | FEXPORT(syscall_exit_work_partial) | 
 | 168 | 	SAVE_STATIC | 
| Thiemo Seufer | c264852 | 2004-12-10 12:56:33 +0000 | [diff] [blame] | 169 | syscall_exit_work: | 
 | 170 | 	li	t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | 
 | 171 | 	and	t0, a2			# a2 is preloaded with TI_FLAGS | 
 | 172 | 	beqz	t0, work_pending	# trace bit set? | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | 	local_irq_enable		# could let do_syscall_trace() | 
 | 174 | 					# call schedule() instead | 
 | 175 | 	move	a0, sp | 
 | 176 | 	li	a1, 1 | 
 | 177 | 	jal	do_syscall_trace | 
 | 178 | 	b	resume_userspace | 
| Ralf Baechle | bce1a28 | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 179 |  | 
 | 180 | #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT) | 
 | 181 |  | 
 | 182 | /* | 
 | 183 |  * MIPS32R2 Instruction Hazard Barrier - must be called | 
 | 184 |  * | 
 | 185 |  * For C code use the inline version named instruction_hazard(). | 
 | 186 |  */ | 
 | 187 | LEAF(mips_ihb) | 
 | 188 | 	.set	mips32r2 | 
 | 189 | 	jr.hb	ra | 
 | 190 | 	nop | 
 | 191 | 	END(mips_ihb) | 
 | 192 |  | 
 | 193 | #endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */ |