| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* $Id: hfc_2bds0.h,v 1.6.2.2 2004/01/12 22:52:26 keil Exp $ | 
|  | 2 | * | 
|  | 3 | * specific defines for CCD's HFC 2BDS0 | 
|  | 4 | * | 
|  | 5 | * Author       Karsten Keil | 
|  | 6 | * Copyright    by Karsten Keil      <keil@isdn4linux.de> | 
|  | 7 | * | 
|  | 8 | * This software may be used and distributed according to the terms | 
|  | 9 | * of the GNU General Public License, incorporated herein by reference. | 
|  | 10 | * | 
|  | 11 | */ | 
|  | 12 |  | 
|  | 13 | #define HFCD_CIRM  	0x18 | 
|  | 14 | #define HFCD_CTMT	0x19 | 
|  | 15 | #define HFCD_INT_M1  	0x1A | 
|  | 16 | #define HFCD_INT_M2  	0x1B | 
|  | 17 | #define HFCD_INT_S1  	0x1E | 
|  | 18 | #define HFCD_STAT  	0x1C | 
|  | 19 | #define HFCD_STAT_DISB  0x1D | 
|  | 20 | #define HFCD_STATES  	0x30 | 
|  | 21 | #define HFCD_SCTRL  	0x31 | 
|  | 22 | #define HFCD_TEST  	0x32 | 
|  | 23 | #define HFCD_SQ  	0x34 | 
|  | 24 | #define HFCD_CLKDEL  	0x37 | 
|  | 25 | #define HFCD_MST_MODE	0x2E | 
|  | 26 | #define HFCD_CONN  	0x2F | 
|  | 27 |  | 
|  | 28 | #define HFCD_FIFO	0x80 | 
|  | 29 | #define HFCD_Z1		0x10 | 
|  | 30 | #define HFCD_Z2		0x18 | 
|  | 31 | #define HFCD_Z_LOW	0x00 | 
|  | 32 | #define HFCD_Z_HIGH	0x04 | 
|  | 33 | #define HFCD_F1_INC	0x12 | 
|  | 34 | #define HFCD_FIFO_IN	0x16 | 
|  | 35 | #define HFCD_F1		0x1a | 
|  | 36 | #define HFCD_F2		0x1e | 
|  | 37 | #define HFCD_F2_INC	0x22 | 
|  | 38 | #define HFCD_FIFO_OUT	0x26 | 
|  | 39 | #define HFCD_REC	0x01 | 
|  | 40 | #define HFCD_SEND	0x00 | 
|  | 41 |  | 
|  | 42 | #define HFCB_FIFO	0x80 | 
|  | 43 | #define HFCB_Z1		0x00 | 
|  | 44 | #define HFCB_Z2		0x08 | 
|  | 45 | #define HFCB_Z_LOW	0x00 | 
|  | 46 | #define HFCB_Z_HIGH	0x04 | 
|  | 47 | #define HFCB_F1_INC	0x28 | 
|  | 48 | #define HFCB_FIFO_IN	0x2c | 
|  | 49 | #define HFCB_F1		0x30 | 
|  | 50 | #define HFCB_F2		0x34 | 
|  | 51 | #define HFCB_F2_INC	0x38 | 
|  | 52 | #define HFCB_FIFO_OUT	0x3c | 
|  | 53 | #define HFCB_REC	0x01 | 
|  | 54 | #define HFCB_SEND	0x00 | 
|  | 55 | #define HFCB_B1		0x00 | 
|  | 56 | #define HFCB_B2		0x02 | 
|  | 57 | #define HFCB_CHANNEL(ch) (ch ? HFCB_B2 : HFCB_B1) | 
|  | 58 |  | 
|  | 59 | #define HFCD_STATUS	0 | 
|  | 60 | #define HFCD_DATA	1 | 
|  | 61 | #define HFCD_DATA_NODEB	2 | 
|  | 62 |  | 
|  | 63 | /* Status (READ) */ | 
|  | 64 | #define HFCD_BUSY	0x01 | 
|  | 65 | #define HFCD_BUSY_NBUSY	0x04 | 
|  | 66 | #define HFCD_TIMER_ELAP	0x10 | 
|  | 67 | #define HFCD_STATINT	0x20 | 
|  | 68 | #define HFCD_FRAMEINT	0x40 | 
|  | 69 | #define HFCD_ANYINT	0x80 | 
|  | 70 |  | 
|  | 71 | /* CTMT (Write) */ | 
|  | 72 | #define HFCD_CLTIMER 0x80 | 
|  | 73 | #define HFCD_TIM25  0x00 | 
|  | 74 | #define HFCD_TIM50  0x08 | 
|  | 75 | #define HFCD_TIM400 0x10 | 
|  | 76 | #define HFCD_TIM800 0x18 | 
|  | 77 | #define HFCD_AUTO_TIMER 0x20 | 
|  | 78 | #define HFCD_TRANSB2 0x02 | 
|  | 79 | #define HFCD_TRANSB1 0x01 | 
|  | 80 |  | 
|  | 81 | /* CIRM (Write) */ | 
|  | 82 | #define HFCD_RESET  	0x08 | 
|  | 83 | #define HFCD_MEM8K	0x10 | 
|  | 84 | #define HFCD_INTA	0x01 | 
|  | 85 | #define HFCD_INTB	0x02 | 
|  | 86 | #define HFCD_INTC	0x03 | 
|  | 87 | #define HFCD_INTD	0x04 | 
|  | 88 | #define HFCD_INTE	0x05 | 
|  | 89 | #define HFCD_INTF	0x06 | 
|  | 90 |  | 
|  | 91 | /* INT_M1;INT_S1 */ | 
|  | 92 | #define HFCD_INTS_B1TRANS	0x01 | 
|  | 93 | #define HFCD_INTS_B2TRANS	0x02 | 
|  | 94 | #define HFCD_INTS_DTRANS	0x04 | 
|  | 95 | #define HFCD_INTS_B1REC		0x08 | 
|  | 96 | #define HFCD_INTS_B2REC		0x10 | 
|  | 97 | #define HFCD_INTS_DREC		0x20 | 
|  | 98 | #define HFCD_INTS_L1STATE	0x40 | 
|  | 99 | #define HFCD_INTS_TIMER		0x80 | 
|  | 100 |  | 
|  | 101 | /* INT_M2 */ | 
|  | 102 | #define HFCD_IRQ_ENABLE		0x08 | 
|  | 103 |  | 
|  | 104 | /* STATES */ | 
|  | 105 | #define HFCD_LOAD_STATE		0x10 | 
|  | 106 | #define HFCD_ACTIVATE		0x20 | 
|  | 107 | #define HFCD_DO_ACTION		0x40 | 
|  | 108 |  | 
|  | 109 | /* HFCD_MST_MODE */ | 
|  | 110 | #define HFCD_MASTER		0x01 | 
|  | 111 |  | 
|  | 112 | /* HFCD_SCTRL */ | 
|  | 113 | #define SCTRL_B1_ENA		0x01 | 
|  | 114 | #define SCTRL_B2_ENA		0x02 | 
|  | 115 | #define SCTRL_LOW_PRIO		0x08 | 
|  | 116 | #define SCTRL_SQ_ENA		0x10 | 
|  | 117 | #define SCTRL_TEST		0x20 | 
|  | 118 | #define SCTRL_NONE_CAP		0x40 | 
|  | 119 | #define SCTRL_PWR_DOWN		0x80 | 
|  | 120 |  | 
|  | 121 | /* HFCD_TEST */ | 
|  | 122 | #define HFCD_AUTO_AWAKE		0x01 | 
|  | 123 |  | 
|  | 124 | extern void main_irq_2bds0(struct BCState *bcs); | 
|  | 125 | extern void init2bds0(struct IsdnCardState *cs); | 
|  | 126 | extern void release2bds0(struct IsdnCardState *cs); | 
|  | 127 | extern void hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val); | 
|  | 128 | extern void set_cs_func(struct IsdnCardState *cs); |