)]}' { "log": [ { "commit": "c3d19d3c3fb0085fbfb81f546abb8d50fdf58d17", "tree": "1c4aa9fe9bd5e3a508ed4541b1ab9dde8358bc7e", "parents": [ "f5395ba35f2ae52eb5839f8046e4aeef6df7f357" ], "author": { "name": "Geert Uytterhoeven", "email": "geert+renesas@linux-m68k.org", "time": "Sun Jan 12 14:08:43 2014 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Wed Jan 22 09:58:24 2014 +0100" }, "message": "drm/i915: Spelling s/auxilliary/auxiliary/\n\nSigned-off-by: Geert Uytterhoeven \u003cgeert+renesas@linux-m68k.org\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "f5f1f897c892cbff6135cd743df9989ca7bc29e4", "tree": "18197d06c797c03e13d91e0e0519cf4428fedf1a", "parents": [ "d30df55b3ec069283408b6d3b013bcba52dd03dc" ], "author": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Mon Jan 20 18:20:29 2014 -0500" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Mon Jan 20 18:20:29 2014 -0500" }, "message": "drm/radeon: add query to fetch the max engine clock (v2)\n\nThis is needed for reporting the max GPU engine clock\nin OpenCL. This just reports the max possible engine\nclock, it does not take into account current conditions\nthat may limit that clock.\n\nv2: fix query number for merge with 3.13\n\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "cfd72a4c2089aa3938f37281a34d6eb3306d5fd8", "tree": "e63f6df423aeb59d1ea5f7af3597d6718e75c335", "parents": [ "9354eafd893f45320a37da360e1728104e49cc2f", "0d9d349d8788d30f3fc3bb39279c370f94d9dbec" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Mon Jan 20 10:21:54 2014 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Mon Jan 20 10:21:54 2014 +1000" }, "message": "Merge branch \u0027drm-intel-next\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-next\n\ndrm-intel-next-2014-01-10:\n- final bits for runtime D3 on Haswell from Paul (now enabled fully)\n- parse the backlight modulation freq information in the VBT from Jani\n (but not yet used)\n- more watermark improvements from Ville for ilk-ivb and bdw\n- bugfixes for fastboot from Jesse\n- watermark fix for i830M (but not yet everything)\n- vlv vga hotplug w/a (Imre)\n- piles of other small improvements, cleanups and fixes all over\n\nNote that the pull request includes a backmerge of the last drm-fixes\npulled into Linus\u0027 tree - things where getting a bit too messy. So the\nshortlog also contains a bunch of patches from Linus tree. Please yell if\nyou want me to frob it for you a bit.\n\n* \u0027drm-intel-next\u0027 of git://people.freedesktop.org/~danvet/drm-intel: (609 commits)\n drm/i915/bdw: make sure south port interrupts are enabled properly v2\n drm/i915: Include more information in disabled hotplug interrupt warning\n drm/i915: Only complain about a rogue hotplug IRQ after disabling\n drm/i915: Only WARN about a stuck hotplug irq ONCE\n drm/i915: s/hotplugt_status_gen4/hotplug_status_g4x/\n" }, { "commit": "311474dbdc6ab0ad366fbec040dbe669edd30a35", "tree": "e41a0324ac99c74bd01c18a00c94f6793f6cc3b0", "parents": [ "1d7a5cbf8f74edee0b1d9ee479367b5d876bf627" ], "author": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Wed Nov 21 12:34:47 2012 +0100" }, "committer": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Fri Jan 17 07:52:34 2014 +0100" }, "message": "drm/vmwgfx: Add a parameter to get max MOB memory size\n\nAlso bump minor to signal a GB-aware kernel module\n\nSigned-off-by: Thomas Hellstrom \u003cthellstrom@vmware.com\u003e\nReviewed-by: Zack Rusin \u003czackr@vmware.com\u003e\n" }, { "commit": "1d7a5cbf8f74edee0b1d9ee479367b5d876bf627", "tree": "28598b7931f80455a980de7356ed5ea686db14a9", "parents": [ "15c6f6562317eb18e686a89735aa8c524d88096e" ], "author": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Wed Nov 21 12:32:19 2012 +0100" }, "committer": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Fri Jan 17 07:52:33 2014 +0100" }, "message": "drm/vmwgfx: Implement a buffer object synccpu ioctl.\n\nThis ioctl enables inter-process synchronization of buffer objects,\nwhich is needed for mesa Guest-Backed objects.\n\nSigned-off-by: Thomas Hellstrom \u003cthellstrom@vmware.com\u003e\nReviewed-by: Brian Paul \u003cbrianp@vmware.com\u003e\n" }, { "commit": "15c6f6562317eb18e686a89735aa8c524d88096e", "tree": "1bfed9fb81812a1bb551e745f4752831176369a4", "parents": [ "c373d4eac4a29b04ec036a0ead75e4a796c911c2" ], "author": { "name": "Zack Rusin", "email": "zackr@vmware.com", "time": "Wed Nov 21 12:25:33 2012 +0100" }, "committer": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Fri Jan 17 07:52:32 2014 +0100" }, "message": "drm/vmwgfx: Make sure that the multisampling is off\n\nBy default SVGA device creates nonmaskable multisampling surfaces, in\nwhich case multisampleCount of 1 means: the first quality setting\nof nonmaskable multisampling surface. Lets change it to make sure\nthat the backends know that multisampling is really off.\n\nSigned-off-by: Zack Rusin \u003czackr@vmware.com\u003e\nReviewed-by: Thomas Hellstrom \u003cthellstrom@vmware.com\u003e\nReviewed-by: Brian Paul \u003cbrianp@vmware.com\u003e\n" }, { "commit": "cfe4d53eee81878ded963e76957f4aeed85f0a82", "tree": "7ca662265faaf37146914ddbbdf07631c212b524", "parents": [ "d9019498dddae69c69d0981a056f137d2893d3e0" ], "author": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Wed Nov 21 10:23:14 2012 +0100" }, "committer": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Fri Jan 17 07:47:53 2014 +0100" }, "message": "drm/vmwgfx: Update the driver user-space interface for guest-backed objects\n\nNot hooked up yet. This is only the definition.\n\nSigned-off-by: Thomas Hellstrom \u003cthellstrom@vmware.com\u003e\nReviewed-by: Brian Paul \u003cbrianp@vmware.com\u003e\nReviewed-by: Zack Rusin \u003czackr@vmware.com\u003e\n\nConflicts:\n\tinclude/uapi/drm/vmwgfx_drm.h\n" }, { "commit": "0d9d349d8788d30f3fc3bb39279c370f94d9dbec", "tree": "874f301d180bd2a80dee68ec4caf79ff64f9bed9", "parents": [ "cba1c07377132fb87b2c73b395ef386da7e03f60", "145830dfb005961cb507a578c9d2e7622f0b3716" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Jan 16 22:06:30 2014 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Jan 16 22:06:30 2014 +0100" }, "message": "Merge commit origin/master into drm-intel-next\n\nConflicts are getting out of hand, and now we have to shuffle even\nmore in -next which was also shuffled in -fixes (the call for\ndrm_mode_config_reset needs to move yet again).\n\nSo do a proper backmerge. I wanted to wait with this for the 3.13\nrelaese, but alas let\u0027s just do this now.\n\nConflicts:\n\tdrivers/gpu/drm/i915/i915_reg.h\n\tdrivers/gpu/drm/i915/intel_ddi.c\n\tdrivers/gpu/drm/i915/intel_display.c\n\tdrivers/gpu/drm/i915/intel_pm.c\n\nBesides the conflict around the forcewake get/put (where we chaged the\ncalled function in -fixes and added a new parameter in -next) code all\nthe current conflicts are of the adjacent lines changed type.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "439a1cfffe2c1a06e5a6394ccd5d18a8e89b15d3", "tree": "0c7fd49c562fffb10256ade2af353f3774fbaaa8", "parents": [ "9fadb352ed73edd7801a280b552d33a6040c8721" ], "author": { "name": "Marek Olšák", "email": "marek.olsak@amd.com", "time": "Sun Dec 22 02:18:01 2013 +0100" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Mon Dec 23 10:03:43 2013 -0500" }, "message": "drm/radeon: expose render backend mask to the userspace\n\nThis will allow userspace to correctly program the PA_SC_RASTER_CONFIG\nregister, so it can be considered a fix.\n\nSigned-off-by: Marek Olšák \u003cmarek.olsak@amd.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\nCc: stable@vger.kernel.org\n" }, { "commit": "05f51722a154e73019434bd020e50ddb941046c5", "tree": "4d649a1bf5c4c559e6bd4014a4014b93a029c52a", "parents": [ "b3f2333de8e81b089262b26d52272911523e605f" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Wed Dec 11 11:34:32 2013 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Wed Dec 18 11:08:42 2013 +1000" }, "message": "drm/bufs: remove handling of _DRM_GEM mappings\n\nGone with the new gem vma offset manager from David.\n\nWe can also ditch the uapi header definition from the enum since\nuserspace never used this. It ended up in there purely for historical\nreasons (for reusing the old drm mmap code essentially), not because\nuserspace ever needed it.\n\nCc: David Herrmann \u003cdh.herrmann@gmail.com\u003e\nReviewed-by: David Herrmann \u003cdh.herrmann@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "da32cc90cbc865c6b49bdc2e0d81b2df3972e5ec", "tree": "9ba03b105518cb5a2d66480f584c55657d9beba3", "parents": [ "319e2e3f63c348a9b66db4667efa73178e18b17d", "be46ffd48ba34189336c6fe420ff3370dcd36c60" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Wed Dec 18 10:39:56 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Wed Dec 18 10:39:56 2013 +1000" }, "message": "Merge tag \u0027drm-intel-next-2013-11-29\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-next\n\n- some more ppgtt prep patches from Ben\n- a few fbc fixes from Ville\n- power well rework from Imre\n- vlv forcewake improvements from Deepak S, Ville and Jesse\n- a few smaller things all over\n\n[airlied: fixup forwcewake conflict]\n* tag \u0027drm-intel-next-2013-11-29\u0027 of git://people.freedesktop.org/~danvet/drm-intel: (97 commits)\n drm/i915: Fix port name in vlv_wait_port_ready() timeout warning\n drm/i915: Return a drm_mode_status enum in the mode_valid vfuncs\n drm/i915: add intel_display_power_enabled_sw() for use in atomic ctx\n drm/i915: drop DRM_ERROR in intel_fbdev init\n drm/i915/vlv: use parallel context restore when coming out of RC6\n drm/i915/vlv: use a lower RC6 timeout on VLV\n drm/i915/sdvo: Fix up debug output to not split lines\n drm/i915: make sparse happy for the new vlv mmio read function\n drm/i915: drop the right force-wake engine in the vlv mmio funcs\n drm/i915: Fix GT wake FIFO free entries for VLV\n drm/i915: Report all GTFIFODBG errors\n drm/i915: Enabling DebugFS for valleyview forcewake counts\n drm/i915/vlv: Valleyview support for forcewake Individual power wells.\n drm/i915: Add power well arguments to force wake routines.\n drm/i915: Do not attempt to re-enable an unconnected primary plane\n drm/i915: add a debugfs entry for power domain info\n drm/i915: add a default always-on power well\n drm/i915: don\u0027t do BDW/HSW specific powerdomains init on other platforms\n drm/i915: protect HSW power well check with IS_HASWELL in redisable_vga\n drm/i915: use IS_HASWELL/BROADWELL instead of HAS_POWER_WELL\n ...\n\nConflicts:\n\tdrivers/gpu/drm/i915/intel_display.c\n" }, { "commit": "f7698ba75fa283435f5077b9dfb4319d28b9de9a", "tree": "4bc16a615a35baaf2b482de81cd256a69067ff72", "parents": [ "798183c54799fbe1e5a5bfabb3a8c0505ffd2149", "374b105797c3d4f29c685f3be535c35f5689b30e" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Dec 09 09:17:02 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Dec 09 09:19:14 2013 +0100" }, "message": "Merge tag \u0027v3.13-rc3\u0027 into drm-intel-next-queued\n\nLinux 3.13-rc3\n\nI need a backmerge for two reasons:\n- For merging the ppgtt patches from Ben I need to pull in the bdw\n support.\n- We now have duplicated calls to intel_uncore_forcewake_reset in the\n setup code to due 2 different patches merged into -next and 3.13.\n The conflict is silen so I need the merge to be able to apply\n Deepak\u0027s fixup patch.\n\nConflicts:\n\tdrivers/gpu/drm/i915/intel_display.c\n\nTrivial conflict, it doesn\u0027t even show up in the merge diff.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "11e6a09fba446ce799a9de51d2d99586024bbdaa", "tree": "44085cf544577b3d033801e73b02a8d527f04177", "parents": [ "9255ce80f88ba885c38c0bbd235db7c24392e22e" ], "author": { "name": "Jakob Bornecrantz", "email": "jakob@vmware.com", "time": "Sun Dec 08 23:39:04 2013 -0800" }, "committer": { "name": "Thomas Hellstrom", "email": "thellstrom@vmware.com", "time": "Sun Dec 08 23:50:23 2013 -0800" }, "message": "drm/vmwgfx: Add max surface memory param\n\nUserspace uses this to workaround overcommit issues\nby flushing the command stream early.\n\nSigned-off-by: Jakob Bornecrantz \u003cjakob@vmware.com\u003e\nReviewed-by: Thomas Hellstrom \u003cthellstrom@vmware.com\u003e\n" }, { "commit": "32f79a8a82b2ff6f1828b258da214869adc2a28c", "tree": "660ce0abbf61ca8d13a8d8d5c7c2d98199d856f3", "parents": [ "1ddce27d8f0ae3f911850e06a4937de89645dfa7" ], "author": { "name": "Michel Dänzer", "email": "michel.daenzer@amd.com", "time": "Mon Nov 18 18:26:00 2013 +0900" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Mon Nov 18 09:19:36 2013 -0500" }, "message": "drm/radeon/cik: Add macrotile mode array query\n\nThis is required to properly calculate the tiling parameters\nin userspace.\n\nSigned-off-by: Michel Dänzer \u003cmichel.daenzer@amd.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "c09cd6e9691ec6fce8cb90b65929cad389d39c84", "tree": "d76104420f72172b21b8fb5ca512baa016ac892b", "parents": [ "7eb1c496f7ac0f386552c0cd9144f6965fc61da5", "96ab4c70396e4e5a4d623bc95e86484682bef78f" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 15 10:02:39 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 15 10:02:39 2013 +0100" }, "message": "Merge branch \u0027backlight-rework\u0027 into drm-intel-next-queued\n\nPull in Jani\u0027s backlight rework branch. This was merged through a\nseparate branch to be able to sort out the Broadwell conflicts\nproperly before pulling it into the main development branch.\n\nConflicts:\n\tdrivers/gpu/drm/i915/intel_display.c\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "b6359918b885da7c7b58c050674278dbd06020ab", "tree": "cc53fb03185fe5cea25274079844228b25f790c5", "parents": [ "2ac0f45099d2d3b8918d63e1bac698b5cb272aa1" ], "author": { "name": "Mika Kuoppala", "email": "mika.kuoppala@linux.intel.com", "time": "Wed Oct 30 15:44:16 2013 +0200" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Nov 12 14:15:48 2013 +0100" }, "message": "drm/i915: add i915_get_reset_stats_ioctl\n\nThis ioctl returns reset stats for specified context.\n\nThe struct returned contains context loss counters.\n\nreset_count: all resets across all contexts\nbatch_active: active batches lost on resets\nbatch_pending: pending batches lost on resets\n\nv2: get rid of state tracking completely and deliver only counts. Idea\n from Chris Wilson.\n\nv3: fix commit message\n\nv4: default context handled inside i915_gem_context_get_hang_stats\n\nv5: reset_count only for priviledged process\n\nv6: ctx\u003d0 needs CAP_SYS_ADMIN for batch_* counters (Chris Wilson)\n\nv7: context hang stats never returns NULL\n\nv8: rebased on top of reworked context hang stats\n DRM_RENDER_ALLOW for ioctl\n\nv9: use DEFAULT_CONTEXT_ID. Improve comments for ioctl struct members\n\nSigned-off-by: Mika Kuoppala \u003cmika.kuoppala@intel.com\u003e\nCc: Ian Romanick \u003cidr@freedesktop.org\u003e\nCc: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nReviewed-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nReviewed-by: Ian Romanick \u003cian.d.romanick@intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "91915260ea5ed9d9b19bfb75d53c989c8ada2ab0", "tree": "f7eb16ced65f39ebd0bb32e3b4e5e0f365755536", "parents": [ "21136946c495b0e1e0f7e25a8de6f170efbdeadf", "07bf139b906013ecef0c5e0441564d1ae10e974a" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Nov 08 16:34:39 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Nov 08 16:34:39 2013 +1000" }, "message": "Merge tag \u0027drm-intel-fixes-2013-11-07\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-next\n\nBit a bit -fixes pull request in the merge window than usual dua to two\nfeauture-y things:\n- Display CRCs are now enabled on all platforms, including the odd DP case\n on gm45/vlv. Since this is a testing-only feature it should ever hurt,\n but I figured it\u0027ll help with regression-testing -fixes. So I left it\n in and didn\u0027t postpone it to 3.14.\n- Display power well refactoring from Imre. Would have caused major pain\n conflict with the bdw stage 1 patches if I\u0027d postpone this to -next.\n It\u0027s only an relatively small interface rework, so shouldn\u0027t cause pain.\n It\u0027s also been in my tree since almost 3 weeks already.\n\nThat accounts for about two thirds of the pull, otherwise just bugfixes:\n- vlv backlight fix from Jesse/Jani\n- vlv vblank timestamp fix from Jesse\n- improved edp detection through vbt from Ville (fixes a vlv issue)\n- eDP vdd fix from Paulo\n- fixes for dvo lvds on i830M\n- a few smaller things all over\n\nNote: This contains a backmerge of v3.12. Since the -internal branch\nalways applied on top of -nightly I need that unified base to merge bdw\npatches. So you\u0027ll get a conflict with radeon connector props when pulling\nthis (and nouveau/master will also conflict a bit when Ben doesn\u0027t\nrebase). The backmerge itself only had conflicts in drm/i915.\n\nThere\u0027s also a tiny conflict between Jani\u0027s backlight fix and your sysfs\nlifetime fix in drm-next.\n\n* tag \u0027drm-intel-fixes-2013-11-07\u0027 of git://people.freedesktop.org/~danvet/drm-intel: (940 commits)\n drm/i915/vlv: use per-pipe backlight controls v2\n drm/i915: make backlight functions take a connector\n drm/i915: move opregion asle request handling to a work queue\n drm/i915/vlv: use PIPE_START_VBLANK interrupts on VLV\n drm/i915: Make intel_dp_is_edp() less specific\n drm/i915: Give names to the VBT child device type bits\n drm/i915/vlv: enable HDA display audio for Valleyview2\n drm/i915/dvo: call -\u003emode_set callback only when the port is running\n drm/i915: avoid unclaimed registers when capturing the error state\n drm/i915: Enable DP port CRC for the \"auto\" source on g4x/vlv\n drm/i915: scramble reset support for DP port CRC on vlv\n drm/i915: scramble reset support for DP port CRC on g4x\n drm/i916: add \"auto\" pipe CRC source\n ...\n\nConflicts:\n\tMAINTAINERS\n\tdrivers/gpu/drm/i915/intel_panel.c\n\tdrivers/gpu/drm/nouveau/core/subdev/mc/base.c\n\tdrivers/gpu/drm/radeon/atombios_encoders.c\n\tdrivers/gpu/drm/radeon/radeon_connectors.c\n" }, { "commit": "90c37067b70d6090a316227698a0cba40f8003bd", "tree": "b556c667fb57da57c8323e069df27f1d5297c214", "parents": [ "cc87509d87696d7cd393882f5dedea01e03e41a9", "977386a04bae2a5a5092c965c92c7c4d36eed23f" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Nov 05 16:21:00 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Nov 05 16:21:00 2013 +1000" }, "message": "Merge tag \u0027drm/for-3.13-rc1\u0027 of git://anongit.freedesktop.org/tegra/linux into drm-next\n\ndrm/tegra: Changes for v3.13-rc1\n\nThe biggest part of the changes is the decoupling of the host1x and DRM\ndrivers followed by the move of Tegra DRM back to drivers/gpu/drm/tegra\nfrom whence it came. There is a lot of cleanup as well, and the drivers\ncan now be properly unloaded and reloaded.\n\nHDMI support for the Tegra114 SoC was contributed by Mikko Perttunen.\n\ngr2d support was extended to Tegra114 and the gr3d driver that has been\nin the works for quite some time finally made it in. All pieces to run\nan OpenGL driver on top of an upstream kernel are now available.\n\nSupport for syncpoint bases was added by Arto Merilainen. This is useful\nfor synchronizing between command streams from different engines such as\ngr2d and gr3d.\n\nErik Faye-Lund and Wei Yongjun contributed various small fixes. Thanks!\n\n* tag \u0027drm/for-3.13-rc1\u0027 of git://anongit.freedesktop.org/tegra/linux: (45 commits)\n drm/tegra: Reserve syncpoint base for gr3d\n drm/tegra: Reserve base for gr2d\n drm/tegra: Deliver syncpoint base to user space\n gpu: host1x: Add syncpoint base support\n gpu: host1x: Add \u0027flags\u0027 field to syncpt request\n drm/tegra: Disable clock on probe failure\n gpu: host1x: Disable clock on probe failure\n drm/tegra: Support bottom-up buffer objects\n drm/tegra: Add support for tiled buffer objects\n drm/tegra: Add 3D support\n drm/tegra: Introduce tegra_drm_submit()\n drm/tegra: Use symbolic names for gr2d registers\n drm/tegra: Start connectors with correct DPMS mode\n drm/tegra: hdmi: Enable VDD earlier for hotplug/DDC\n drm/tegra: hdmi: Fix build warnings\n drm/tegra: hdmi: Detect DVI-only displays\n drm/tegra: Add Tegra114 HDMI support\n drm/tegra: hdmi: Parameterize based on compatible property\n drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30}\n gpu: host1x: Add support for Tegra114\n ...\n" }, { "commit": "7f16e5c1416070dc590dd333a2d677700046a4ab", "tree": "55718bbef64431e70d5ed282be516cd45b3f75e6", "parents": [ "9d1cb9147dbe45f6e94dc796518ecf67cb64b359", "5e01dc7b26d9f24f39abace5da98ccbd6a5ceb52" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Nov 04 16:28:47 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Nov 04 16:28:52 2013 +0100" }, "message": "Merge tag \u0027v3.12\u0027 into drm-intel-next\n\nI want to merge in the new Broadwell support as a late hw enabling\npull request. But since the internal branch was based upon our\ndrm-intel-nightly integration branch I need to resolve all the\noustanding conflicts in drm/i915 with a backmerge to make the 60+\npatches apply properly.\n\nWe\u0027ll propably have some fun because Linus will come up with a\nslightly different merge solution.\n\nConflicts:\n\tdrivers/gpu/drm/i915/i915_dma.c\n\tdrivers/gpu/drm/i915/i915_drv.c\n\tdrivers/gpu/drm/i915/intel_crt.c\n\tdrivers/gpu/drm/i915/intel_ddi.c\n\tdrivers/gpu/drm/i915/intel_display.c\n\tdrivers/gpu/drm/i915/intel_dp.c\n\tdrivers/gpu/drm/i915/intel_drv.h\n\nAll rather simple adjacent lines changed or partial backports from\n-next to -fixes, with the exception of the thaw code in i915_dma.c.\nThat one needed a bit of shuffling to restore the intent.\n\nOh and the massive header file reordering in intel_drv.h is a bit\ntrouble. But not much.\n\nv2: Also don\u0027t forget the fixup for the silent conflict that results\nin compile fail ...\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "c54a169b528d0ac2a5d3a7bf91f8534323bda83d", "tree": "bc2b2f9adef47c6ab2937ed05e55a752a0e2efb1", "parents": [ "f5a954fed9b3eb04973ede72c50c66157fa9e15b" ], "author": { "name": "Arto Merilainen", "email": "amerilainen@nvidia.com", "time": "Mon Oct 14 15:21:54 2013 +0300" }, "committer": { "name": "Thierry Reding", "email": "treding@nvidia.com", "time": "Thu Oct 31 09:55:48 2013 +0100" }, "message": "drm/tegra: Deliver syncpoint base to user space\n\nThis patch adds a separate ioctl for delivering syncpoint base number\nto user space. If the syncpoint does not have an associated base, the\nfunction returns -ENXIO.\n\nSigned-off-by: Arto Merilainen \u003camerilainen@nvidia.com\u003e\nReviewed-by: Terje Bergstrom \u003ctbergstrom@nvidia.com\u003e\nSigned-off-by: Thierry Reding \u003ctreding@nvidia.com\u003e\n" }, { "commit": "db7fbdfd25ee009165b6c3b80a9d1c6d8534ad94", "tree": "1ba0c25b63b227a7f139b03ae217daf0b7ec1f81", "parents": [ "773af77fc479fd454c3f6836f86bf63996545cf4" ], "author": { "name": "Thierry Reding", "email": "thierry.reding@avionic-design.de", "time": "Mon Oct 07 09:47:58 2013 +0200" }, "committer": { "name": "Thierry Reding", "email": "treding@nvidia.com", "time": "Thu Oct 31 09:55:46 2013 +0100" }, "message": "drm/tegra: Support bottom-up buffer objects\n\nThe gr3d engine renders images bottom-up. Allow buffers that are used\nfor 3D content to be marked as such and implement support in the display\ncontroller to present them properly.\n\nSigned-off-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\nSigned-off-by: Thierry Reding \u003ctreding@nvidia.com\u003e\n" }, { "commit": "773af77fc479fd454c3f6836f86bf63996545cf4", "tree": "a3610dd713a97cf934810079da61b1196e85d95b", "parents": [ "5f60ed0d840d53e9d65aa54e1a5365af8ce2769e" ], "author": { "name": "Thierry Reding", "email": "thierry.reding@avionic-design.de", "time": "Fri Oct 04 22:34:01 2013 +0200" }, "committer": { "name": "Thierry Reding", "email": "treding@nvidia.com", "time": "Thu Oct 31 09:55:46 2013 +0100" }, "message": "drm/tegra: Add support for tiled buffer objects\n\nThe gr2d and gr3d engines work more efficiently on buffers with a tiled\nmemory layout. Allow created buffers to be marked as tiled so that the\ndisplay controller can scan them out properly.\n\nSigned-off-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\nSigned-off-by: Thierry Reding \u003ctreding@nvidia.com\u003e\n" }, { "commit": "5e4e3ba997af8c756c23ffaa86652d3a4df5bdfa", "tree": "a6860666ccf18c9add51d2b0f468cecf3fd7b3da", "parents": [ "5bdebb183c9702a8c57a01dff09337be3de337a6", "585b691e2180e1501637050290292f77f5c30c7b" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Oct 22 09:38:18 2013 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Oct 22 09:50:08 2013 +0100" }, "message": "Merge branch \u0027drm-tda998x-3.12\u0027 of git://ftp.arm.linux.org.uk/~rmk/linux-cubox into drm-next\n\nThis adds support for the Armada 510 display subsystem found on the\nMarvell Dove devices. This IP is re-used across several different Marvell\nSoCs with various tweaks, and this driver has been structured to allow\nthe other IPs to re-use the bulk of this code; further work in this area\nis expected from interested parties.\n\nThis has been extensively tested on the SolidRun Cubox platform and\nappears to work well there.\n\n[airlied: update for api changes merged previous to this]\n" }, { "commit": "bc5bd37ce48c66e9192ad2e7231e9678880f6f8e", "tree": "8f8c19df8f6da08bdcf5c9c36db25ebc7c8969a1", "parents": [ "b062672e305ce071f21eb9e18b102c2a430e0999" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Oct 16 09:49:02 2013 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Oct 18 07:42:23 2013 +0100" }, "message": "drm: Pad drm_mode_get_connector to 64-bit boundary\n\nPavel Roskin reported that DRM_IOCTL_MODE_GETCONNECTOR was overwritting\nthe 4 bytes beyond the end of its structure with a 32-bit userspace\nrunning on a 64-bit kernel. This is due to the padding gcc inserts as\nthe drm_mode_get_connector struct includes a u64 and its size is not a\nnatural multiple of u64s.\n\n64-bit kernel:\n\nsizeof(drm_mode_get_connector)\u003d80, alignof\u003d8\nsizeof(drm_mode_get_encoder)\u003d20, alignof\u003d4\nsizeof(drm_mode_modeinfo)\u003d68, alignof\u003d4\n\n32-bit userspace:\n\nsizeof(drm_mode_get_connector)\u003d76, alignof\u003d4\nsizeof(drm_mode_get_encoder)\u003d20, alignof\u003d4\nsizeof(drm_mode_modeinfo)\u003d68, alignof\u003d4\n\nFortuituously we can insert explicit padding to the tail of our\nstructures without breaking ABI.\n\nReported-by: Pavel Roskin \u003cproski@gnu.org\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Dave Airlie \u003cairlied@redhat.com\u003e\nCc: dri-devel@lists.freedesktop.org\nCc: stable@vger.kernel.org\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "96f60e37dc66091bde8d5de136ff6fda09f2d799", "tree": "2c2cc30a5ac7339730430369e27d33d4a8dd21ef", "parents": [ "15c03dd4859ab16f9212238f29dd315654aa94f6" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Aug 15 13:59:49 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 12 10:13:40 2013 +0100" }, "message": "DRM: Armada: Add Armada DRM driver\n\nThis patch adds support for the pair of LCD controllers on the Marvell\nArmada 510 SoCs. This driver supports:\n- multiple contiguous scanout buffers for video and graphics\n- shm backed cacheable buffer objects for X pixmaps for Vivante GPU\n acceleration\n- dual lcd0 and lcd1 crt operation\n- video overlay on each LCD crt via DRM planes\n- page flipping of the main scanout buffers\n- DRM prime for buffer export/import\n\nThis driver is trivial to extend to other Armada SoCs.\n\nIncluded in this commit is the core driver with no output support; output\nsupport is platform and encoder driver dependent.\n\nTested-by: Sebastian Hesselbarth \u003csebastian.hesselbarth@gmail.com\u003e\nReviewed-by: Rob Clark \u003crobdclark@gmail.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5848ad409c1817f5b70507e6b4440fcbd002f6c5", "tree": "9d1244efe4cbf2d2fa37789acc1007ac1eeffa35", "parents": [ "fc4833c17cd58ad5de733e9e6649873cf0b34f2c" ], "author": { "name": "Damien Lespiau", "email": "damien.lespiau@intel.com", "time": "Fri Sep 27 12:11:50 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Oct 01 07:45:45 2013 +0200" }, "message": "drm: Reject stereo modes with an unknown layout\n\nThe kernel shouldn\u0027t accept invalid modes, just say No.\n\nSigned-off-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "f7e121b76469624459152542c1b809a1ebc835fe", "tree": "295475386ab301b48c0010d1f3d3eb84baeffb7b", "parents": [ "e454a05da623c26544721b159caaacdb6dfe448c" ], "author": { "name": "Damien Lespiau", "email": "damien.lespiau@intel.com", "time": "Fri Sep 27 12:11:48 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Oct 01 07:45:44 2013 +0200" }, "message": "drm: Code stereo layouts as an enum rather than a bit field\n\nThis allows us to use fewer bits in the mode structure, leaving room for\nfuture work while allowing more stereo layouts types than we could have\never dreamt of.\n\nI also exposed the previously private DRM_MODE_FLAG_3D_MASK to set in\nstone that we are using 5 bits for the stereo layout enum, reserving 32\nvalues.\n\nEven with that reservation, we gain 3 bits from the previous encoding.\n\nThe code adding the mandatory stereo modes needeed to be adapted as it was\nrelying or being able to or stereo layouts together.\n\nSuggested-by: Daniel Vetter \u003cdaniel@ffwll.ch\u003e\nSigned-off-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "61d8e3282541139cf5bb31e4c42f952a6cc168f8", "tree": "ff765d5d44879ddc36f6430632fdb5211553e296", "parents": [ "4aa17cf0d889cfc984b68a78ae02070cef21bb6b" ], "author": { "name": "Damien Lespiau", "email": "damien.lespiau@intel.com", "time": "Wed Sep 25 16:45:22 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Oct 01 07:45:27 2013 +0200" }, "message": "drm: Add a STEREO_3D capability to the SET_CLIENT_CAP ioctl\n\nThis capability allows user space to control the delivery of modes with\nthe 3D flags set. This is to not play games with current user space\nusers not knowing anything about stereo 3D flags and that could try\nto set a mode with one or several of those bits set.\n\nSo, the plan is to remove the stereo modes from the list of modes we\ngive to DRM clients by default, and let them through if we are being\ntold otherwise.\n\nstereo_allowed is bound to the drm_file structure to make it a\nper-client setting, not a global one.\n\nv2: Replace clearing 3D flags by discarding the stereo modes now that\n they are regular modes.\nv3: SET_CAP -\u003e SET_CLIENT_CAP rename (Chris Wilson)\n\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nAcked-by: Dave Airlie \u003cairlied@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "4aa17cf0d889cfc984b68a78ae02070cef21bb6b", "tree": "7e9fd3b02c478a4899ee80a87317450787259bdd", "parents": [ "1c0814fed3a558146402713028cb7114734ec172" ], "author": { "name": "Damien Lespiau", "email": "damien.lespiau@intel.com", "time": "Wed Sep 25 16:45:21 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Oct 01 07:45:27 2013 +0200" }, "message": "drm: Add HDMI stereo 3D flags to struct drm_mode_modeinfo\n\nHDMI 1.4a defines a few layouts that we\u0027d like to expose. This commits\nadd new modeinfo flags that can be used to list the supported stereo\nlayouts (when querying the list of modes) and to set a given stereo 3D\nmode (when setting a mode).\n\nv2: Add a drm_mode_is_stereo() helper\n\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nAcked-by: Dave Airlie \u003cairlied@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "1c0814fed3a558146402713028cb7114734ec172", "tree": "4c74029367bb8908bb7efe9bd23b7731f27244ee", "parents": [ "a99b57dbc09bfff57acd8a7c20f25dfa6cb892a5" ], "author": { "name": "Damien Lespiau", "email": "damien.lespiau@intel.com", "time": "Wed Sep 25 16:45:20 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Oct 01 07:45:26 2013 +0200" }, "message": "drm: Add a SET_CLIENT_CAP ioctl\n\nThis ioctl can be used to turn some knobs in a DRM driver. The client\ncan ask the DRM core for an alternate view of the reality: it can be\nuseful to be able to instruct the core that the DRM client can handle\nnew functionnality that would otherwise break current ABI.\n\nv2: Rename to ioctl from SET_CAP to SET_CLIENT_CAP (Chris Wilson)\n\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nAcked-by: Dave Airlie \u003cairlied@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "a99b57dbc09bfff57acd8a7c20f25dfa6cb892a5", "tree": "7353bc16bda90f3acd062bcf0dbe3f90510dc56e", "parents": [ "662c6ecbcdca1fe8a5402f6c83d98d242917a043" ], "author": { "name": "Damien Lespiau", "email": "damien.lespiau@intel.com", "time": "Wed Sep 25 16:45:19 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Oct 01 07:45:25 2013 +0200" }, "message": "drm: Move the GET_CAP macros next to the corresponding ioctl structure\n\nIt\u0027s a tiny bit more logical to find the different capabilities you can\nuse with the GET_CAP ioctl next to the structure rather than putting\nthem at the end of the file.\n\nv2: Tab align the litterals (David Herrmann)\nv3: Make it clearer that DRM_PRIME_CAP_EXPORT/IMPORT are flags of\n DRM_CAP_PRIME.\nv4: Rebase on top of latest bits (DRM_CAP_ASYNC_PAGE_FLIP was\n introduced)\n\nReviewed-by: David Herrmann \u003cdh.herrmann@gmail.com\u003e (for v2)\nSigned-off-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nAcked-by: Dave Airlie \u003cairlied@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "4821ff14a32886ee95c8b2850746ec020ca65189", "tree": "dad7b2c822e55669b687ae754cf1b958316ef538", "parents": [ "15c03dd4859ab16f9212238f29dd315654aa94f6", "b599c89e8c5cf0c37352e0871be240291f8ce922" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Oct 01 10:00:50 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Oct 01 10:00:50 2013 +1000" }, "message": "Merge tag \u0027drm-intel-next-2013-09-21-merged\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-next\n\ndrm-intel-next-2013-09-21:\n- clock state handling rework from Ville\n- l3 parity handling fixes for hsw from Ben\n- some more watermark improvements from Ville\n- ban badly behaved context from Mika\n- a few vlv improvements from Jesse\n- VGA power domain handling from Ville\ndrm-intel-next-2013-09-06:\n- Basic mipi dsi support from Jani. Not yet converted over to drm_bridge\n since that was too fresh, but the porting is in progress already.\n- More vma patches from Ben, this time the code to convert the execbuffer\n code. Now that the shrinker recursion bug is tracked down we can move\n ahead here again. Yay!\n- Optimize hw context switching to not generate needless interrupts (Chris\n Wilson). Also some shuffling for the oustanding request allocation.\n- Opregion support for SWSCI, although not yet fully wired up (we need a\n bit of runtime D3 support for that apparently, due to Windows design\n deficiencies), from Jani Nikula.\n- A few smaller changes all over.\n\n[airlied: merge conflict fix in i9xx_set_pipeconf]\n\n* tag \u0027drm-intel-next-2013-09-21-merged\u0027 of git://people.freedesktop.org/~danvet/drm-intel: (119 commits)\n drm/i915: assume all GM45 Acer laptops use inverted backlight PWM\n drm/i915: cleanup a min_t() cast\n drm/i915: Pull intel_init_power_well() out of intel_modeset_init_hw()\n drm/i915: Add POWER_DOMAIN_VGA\n drm/i915: Refactor power well refcount inc/dec operations\n drm/i915: Add intel_display_power_{get, put} to request power for specific domains\n drm/i915: Change i915_request power well handling\n drm/i915: POSTING_READ IPS_CTL before waiting for the vblank\n drm/i915: don\u0027t disable ERR_INT on the IRQ handler\n drm/i915/vlv: disable rc6p and rc6pp residency reporting on BYT\n drm/i915/vlv: honor i915_enable_rc6 boot param on VLV\n drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPF\n drm/i915: Do remaps for all contexts\n drm/i915: Keep a list of all contexts\n drm/i915: Make l3 remapping use the ring\n drm/i915: Add second slice l3 remapping\n drm/i915: Fix HSW parity test\n drm/i915: dump crtc timings from the pipe config\n drm/i915: register backlight device also when backlight class is a module\n drm/i915: write D_COMP using the mailbox\n ...\n\nConflicts:\n\tdrivers/gpu/drm/i915/intel_display.c\n" }, { "commit": "42baf21d91d4f52f5b9a4d11dc8e7b1e3b93de7c", "tree": "78f1c6e6a17ddf080afe7a6c30ab0415a959c83c", "parents": [ "a537314e0b539e22934d3cffeb0b1f476e56491c" ], "author": { "name": "Michel Dänzer", "email": "michel.daenzer@amd.com", "time": "Wed Sep 18 18:23:51 2013 +0200" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Fri Sep 20 17:33:40 2013 -0400" }, "message": "drm/radeon/cik: Add tiling mode index for 1D tiled depth/stencil surfaces\n\nCIK uses a different index for 1D DST surfaces compared to SI. Expose\nthe new index so libdrm_radeon can use it properly for userspace\ndrivers.\n\nSigned-off-by: Michel Dänzer \u003cmichel.daenzer@amd.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "35a85ac60618521d41cfdb14f3fbfc8ad7329e9e", "tree": "b9e3edb84f5c5a65cfc59179bdaf903b013f2a73", "parents": [ "1c966dd26b2e46a9d089fcb7e36f649000670e64" ], "author": { "name": "Ben Widawsky", "email": "benjamin.widawsky@intel.com", "time": "Thu Sep 19 11:13:41 2013 -0700" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Sep 19 20:37:04 2013 +0200" }, "message": "drm/i915: Add second slice l3 remapping\n\nCertain HSW SKUs have a second bank of L3. This L3 remapping has a\nseparate register set, and interrupt from the first \"slice\". A slice is\nsimply a term to define some subset of the GPU\u0027s l3 cache. This patch\nimplements both the interrupt handler, and ability to communicate with\nuserspace about this second slice.\n\nv2: Remove redundant check about non-existent slice.\nChange warning about interrupts of unknown slices to WARN_ON_ONCE\nHandle the case where we get 2 slice interrupts concurrently, and switch\nthe tracking of interrupts to be non-destructive (all Ville)\nDon\u0027t enable/mask the second slice parity interrupt for ivb/vlv (even\nthough all docs I can find claim it\u0027s rsvd) (Ville + Bryan)\nKeep BYT excluded from L3 parity\n\nv3: Fix the slice \u003d ffs to be decremented by one (found by Ville). When\nI initially did my testing on the series, I was using 1-based slice\ncounting, so this code was correct. Not sure why my simpler tests that\nI\u0027ve been running since then didn\u0027t pick it up sooner.\n\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "b89232732f642bfa24f9e252dd241ddfb40d3817", "tree": "4546bb9851cdb6c2928830bd367e97e4192b61d9", "parents": [ "2cc86b826070cf312d7b0571e383c56d31a1fe5c" ], "author": { "name": "Shobhit Kumar", "email": "shobhit.kumar@intel.com", "time": "Tue Aug 27 15:12:13 2013 +0300" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Wed Sep 04 17:34:43 2013 +0200" }, "message": "drm: add MIPI DSI encoder and connector types\n\nSigned-off-by: Shobhit Kumar \u003cshobhit.kumar@intel.com\u003e\nSigned-off-by: Jani Nikula \u003cjani.nikula@intel.com\u003e\nAcked-by: Dave Airlie \u003cairlied@gmail.com\u003e\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "9c725e5bcdae59d5383d4aec33a34c822582dda5", "tree": "3d55827f5f44f16cb0aada2713029f7490f557d4", "parents": [ "efa27f9cec09518c9b574e3ab4a0a41717237429", "679fe80fbe964ea7f9f71781c2ca65b630949da3" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Mon Sep 02 09:31:40 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Mon Sep 02 09:31:40 2013 +1000" }, "message": "Merge branch \u0027drm-next-3.12\u0027 of git://people.freedesktop.org/~agd5f/linux into drm-next\n\nAlex writes:\nThis is the radeon drm-next request. Big changes include:\n- support for dpm on CIK parts\n- support for ASPM on CIK parts\n- support for berlin GPUs\n- major ring handling cleanup\n- remove the old 3D blit code for bo moves in favor of CP DMA or sDMA\n- lots of bug fixes\n\n[airlied: fix up a bunch of conflicts from drm_order removal]\n\n* \u0027drm-next-3.12\u0027 of git://people.freedesktop.org/~agd5f/linux: (898 commits)\n drm/radeon/dpm: make sure dc performance level limits are valid (CI)\n drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2)\n drm/radeon: gcc fixes for extended dpm tables\n drm/radeon: gcc fixes for kb/kv dpm\n drm/radeon: gcc fixes for ci dpm\n drm/radeon: gcc fixes for si dpm\n drm/radeon: gcc fixes for ni dpm\n drm/radeon: gcc fixes for trinity dpm\n drm/radeon: gcc fixes for sumo dpm\n drm/radeonn: gcc fixes for rv7xx/eg/btc dpm\n drm/radeon: gcc fixes for rv6xx dpm\n drm/radeon: gcc fixes for radeon_atombios.c\n drm/radeon: enable UVD interrupts on CIK\n drm/radeon: fix init ordering for r600+\n drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled\n drm/radeon: check the return value of uvd_v1_0_start in uvd_v1_0_init\n drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume\n radeon kms: fix uninitialised hotplug work usage in r100_irq_process()\n drm/radeon/audio: set up the sads on DCE3.2 asics\n drm/radeon: fix handling of variable sized arrays for router objects\n ...\n\nConflicts:\n\tdrivers/gpu/drm/i915/i915_dma.c\n\tdrivers/gpu/drm/i915/i915_gem_dmabuf.c\n\tdrivers/gpu/drm/i915/intel_pm.c\n\tdrivers/gpu/drm/radeon/cik.c\n\tdrivers/gpu/drm/radeon/ni.c\n\tdrivers/gpu/drm/radeon/r600.c\n" }, { "commit": "e5b9e7503eb1f4884efa3b321d3cc47806779202", "tree": "a488153441f490cd14f24c575eb17503708c8235", "parents": [ "773dc10a8acd28c19947b557094d4c1ec0043998" ], "author": { "name": "Tom Stellard", "email": "thomas.stellard@amd.com", "time": "Fri Aug 16 17:47:39 2013 -0400" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Fri Aug 30 16:30:59 2013 -0400" }, "message": "drm/radeon/si: Add support for CP DMA to CS checker for compute v2\n\nAlso add a new RADEON_INFO query to check that CP DMA packets are\nsupported on the compute ring.\n\nCP DMA has been supported since the 3.8 kernel, but due to an oversight\nwe forgot to teach the CS checker that the CP DMA packet was legal for\nthe compute ring on Southern Islands GPUs.\n\nThis patch fixes a bug where the radeon driver will incorrectly reject a legal\nCP DMA packet from user space. I would like to have the patch\nbackported to stable so that we don\u0027t have to require Mesa users to use a\nbleeding edge kernel in order to take advantage of this feature which\nis already present in the stable kernels (3.8 and newer).\n\nv2:\n - Don\u0027t bump kms version, so this patch can be backported to stable\n kernels.\n\nCc: stable@vger.kernel.org\nSigned-off-by: Tom Stellard \u003cthomas.stellard@amd.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "efa27f9cec09518c9b574e3ab4a0a41717237429", "tree": "28d04d8a8fecb67ba81c8fecd488e584ed121929", "parents": [ "62f2104f3fc11c4cfd1307429cb955bfa48dcb37", "fb1ae911f4e58c2cf28fcd48b59f54d17283da07" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Aug 30 09:47:41 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Aug 30 09:47:41 2013 +1000" }, "message": "Merge tag \u0027drm-intel-next-2013-08-23\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-next\n\nNeed to get my stuff out the door ;-) Highlights:\n- pc8+ support from Paulo\n- more vma patches from Ben.\n- Kconfig option to enable preliminary support by default (Josh\n Triplett)\n- Optimized cpu cache flush handling and support for write-through caching\n of display planes on Iris (Chris)\n- rc6 tuning from Stéphane Marchesin for more stability\n- VECS seqno wrap/semaphores fix (Ben)\n- a pile of smaller cleanups and improvements all over\n\nNote that I\u0027ve ditched Ben\u0027s execbuf vma conversion for 3.12 since not yet\nready. But there\u0027s still other vma conversion stuff in here.\n\n* tag \u0027drm-intel-next-2013-08-23\u0027 of git://people.freedesktop.org/~danvet/drm-intel: (62 commits)\n drm/i915: Print seqnos as unsigned in debugfs\n drm/i915: Fix context size calculation on SNB/IVB/VLV\n drm/i915: Use POSTING_READ in lcpll code\n drm/i915: enable Package C8+ by default\n drm/i915: add i915.pc8_timeout function\n drm/i915: add i915_pc8_status debugfs file\n drm/i915: allow package C8+ states on Haswell (disabled)\n drm/i915: fix SDEIMR assertion when disabling LCPLL\n drm/i915: grab force_wake when restoring LCPLL\n drm/i915: drop WaMbcDriverBootEnable workaround\n drm/i915: Cleaning up the relocate entry function\n drm/i915: merge HSW and SNB PM irq handlers\n drm/i915: fix how we mask PMIMR when adding work to the queue\n drm/i915: don\u0027t queue PM events we won\u0027t process\n drm/i915: don\u0027t disable/reenable IVB error interrupts when not needed\n drm/i915: add dev_priv-\u003epm_irq_mask\n drm/i915: don\u0027t update GEN6_PMIMR when it\u0027s not needed\n drm/i915: wrap GEN6_PMIMR changes\n drm/i915: wrap GTIMR changes\n drm/i915: add the FCLK case to intel_ddi_get_cdclk_freq\n ...\n" }, { "commit": "62f2104f3fc11c4cfd1307429cb955bfa48dcb37", "tree": "f5a4e80d68e100cc6818a6810d07f28135ddd8c5", "parents": [ "9bba0c42ec81748462e58b18095c0eef8707cc9a" ], "author": { "name": "Keith Packard", "email": "keithp@keithp.com", "time": "Mon Jul 22 18:50:00 2013 -0700" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Aug 30 09:25:13 2013 +1000" }, "message": "drm: Advertise async page flip ability through GETCAP ioctl\n\nLet applications know whether the kernel supports asynchronous page\nflipping.\n\nSigned-off-by: Keith Packard \u003ckeithp@keithp.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@gmail.com\u003e\n" }, { "commit": "9bba0c42ec81748462e58b18095c0eef8707cc9a", "tree": "807d392049250ccbb1c95426eb75a4b060389590", "parents": [ "ed8d19756e80ec63003a93aa4d70406e6ba61522" ], "author": { "name": "Keith Packard", "email": "keithp@keithp.com", "time": "Mon Jul 22 18:49:59 2013 -0700" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Aug 30 09:25:13 2013 +1000" }, "message": "drm: Add DRM_MODE_PAGE_FLIP_ASYNC flag definition\n\nThis requests that the driver perform the page flip as soon as\npossible, not necessarily waiting for vblank.\n\nSigned-off-by: Keith Packard \u003ckeithp@keithp.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@gmail.com\u003e\n" }, { "commit": "7198e6b03155f6dadecadba004eb83b81a6ffe4c", "tree": "ed4ae3e859fd9a722524242a145008d13606a95a", "parents": [ "902e6eb851a78ad9e3db006c1e1df71841f633e2" ], "author": { "name": "Rob Clark", "email": "robdclark@gmail.com", "time": "Fri Jul 19 12:59:32 2013 -0400" }, "committer": { "name": "Rob Clark", "email": "robdclark@gmail.com", "time": "Sat Aug 24 14:57:18 2013 -0400" }, "message": "drm/msm: add a3xx gpu support\n\nAdd initial support for a3xx 3d core.\n\nSo far, with hardware that I\u0027ve seen to date, we can have:\n + zero, one, or two z180 2d cores\n + a3xx or a2xx 3d core, which share a common CP (the firmware\n for the CP seems to implement some different PM4 packet types\n but the basics of cmdstream submission are the same)\n\nWhich means that the eventual complete \"class\" hierarchy, once\nsupport for all past and present hw is in place, becomes:\n + msm_gpu\n + adreno_gpu\n + a3xx_gpu\n + a2xx_gpu\n + z180_gpu\n\nThis commit splits out the parts that will eventually be common\nbetween a2xx/a3xx into adreno_gpu, and the parts that are even\ncommon to z180 into msm_gpu.\n\nNote that there is no cmdstream validation required. All memory access\nfrom the GPU is via IOMMU/MMU. So as long as you don\u0027t map silly things\nto the GPU, there isn\u0027t much damage that the GPU can do.\n\nSigned-off-by: Rob Clark \u003crobdclark@gmail.com\u003e\n" }, { "commit": "651d794fae9b79237aae1c97f8a9d9f3817bd31d", "tree": "a95018d3d8c8575f88ebc99af604564f90817927", "parents": [ "ea04cb31d506ac3f4fc3cefb1c50eb4f35ab37fd" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 08 14:41:10 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Aug 22 13:31:38 2013 +0200" }, "message": "drm/i915: Use Write-Through cacheing for the display plane on Iris\n\nHaswell GT3e has the unique feature of supporting Write-Through cacheing\nof objects within the eLLC/LLC. The purpose of this is to enable the display\nplane to remain coherent whilst objects lie resident in the eLLC/LLC - so\nthat we, in theory, get the best of both worlds, perfect display and fast\naccess.\n\nHowever, we still need to be careful as the CPU does not see the WT when\naccessing the cache. In particular, this means that we need to flush the\ncache lines after writing to an object through the CPU, and on\ntransitioning from a cached state to WT.\n\nv2: Actually do the clflush on transition to WT, nagging by Ville.\nv3: Flush the CPU cache after writes into WT objects.\nv4: Rease onto LLC updates and report WT as \"uncached\" for\nget_cache_level_ioctl to remain symmetric with set_cache_level_ioctl.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nCc: Kenneth Graunke \u003ckenneth@whitecape.org\u003e\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "35c7ab421a13f8327e3fd627c6ebafb1c13b2e55", "tree": "18cb8bab96e8158ca71f0b311250fa0eb475a8f6", "parents": [ "000433b67e46771a7c08f78574943855a98c53ec" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat Aug 10 14:51:11 2013 +0200" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Aug 22 13:31:34 2013 +0200" }, "message": "drm/i915: reserve I915_CACHING_DISPLAY and document cache modes\n\nResolve the catch-22 of igt needing a stable number and patches first\nneeding testcases by reserving the interface number up-front.\n\nv2: Improve the spelling a bit.\n\nv3: More spelling fail spotted by Chris.\n\nRequested-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nReviewed-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "32c913e4369ce7bd1d16a9b6983f7b8975c13f5a", "tree": "da5868a2b7e7c068d4b733420330a15001786365", "parents": [ "abf190351b49937335130970a99a0b4275402b5e", "cd234b0bfd5ab012e42274b24aae420fa1823d58" ], "author": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Wed Aug 07 18:09:03 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Wed Aug 07 18:11:35 2013 +1000" }, "message": "Merge tag \u0027drm-intel-next-2013-07-26-fixed\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-next\n\nNeat that QA (and Ben) keeps on humming along while I\u0027m on vacation, so\nyou already get the next feature pull request:\n- proper eLLC support for HSW from Ben\n- more interrupt refactoring\n- add w/a tags where we implement them already (Damien)\n- hangcheck fixes (Chris) + hangcheck stats (Mika)\n- flesh out the new vm structs for ppgtt and ggtt (Ben)\n- PSR for Haswell, still disabled by default (Rodrigo et al.)\n- pc8+ refclock sequence code from Paulo\n- more interrupt refactoring from Paulo, unifying ilk/snb with the ivb/hsw\n interrupt code\n- full solution for the Haswell concurrent reg access issues (Chris)\n- fix racy object accounting, used by some new leak tests\n- fix sync polarity settings on ch7xxx dvo encoder\n- random bits\u0026pieces, little fixes and better debug output all over\n\n[airlied: fix conflict with drm_mm cleanups]\n\n* tag \u0027drm-intel-next-2013-07-26-fixed\u0027 of git://people.freedesktop.org/~danvet/drm-intel: (289 commits)\n drm/i915: Do not dereference NULL crtc or fb until after checking\n drm/i915: fix pnv display core clock readout out\n drm/i915: Replace open-coded offset_in_page()\n drm/i915: Retry DP aux_ch communications with a different clock after failure\n drm/i915: Add messages useful for HPD storm detection debugging (v2)\n drm/i915: dvo_ch7xxx: fix vsync polarity setting\n drm/i915: fix the racy object accounting\n drm/i915: Convert the register access tracepoint to be conditional\n drm/i915: Squash gen lookup through multiple indirections inside GT access\n drm/i915: Use the common register access functions for NOTRACE variants\n drm/i915: Use a private interface for register access within GT\n drm/i915: Colocate all GT access routines in the same file\n drm/i915: fix reference counting in i915_gem_create\n drm/i915: Use Graphics Base of Stolen Memory on all gen3+\n drm/i915: disable stolen mem for OVERLAY_NEEDS_PHYSICAL\n drm/i915: add functions to disable and restore LCPLL\n drm/i915: disable CLKOUT_DP when it\u0027s not needed\n drm/i915: extend lpt_enable_clkout_dp\n drm/i915: fix up error cleanup in i915_gem_object_bind_to_gtt\n drm/i915: Add some debug breadcrumbs to connector detection\n ...\n" }, { "commit": "0de23977cfeb5b357ec884ba15417ae118ff9e9b", "tree": "bad8f04fc993b778020f6a2f7e9e7d2be8deb293", "parents": [ "fe3078fa5c367186c94a6652581ffbe9ccea4640" ], "author": { "name": "David Herrmann", "email": "dh.herrmann@gmail.com", "time": "Wed Jul 24 21:07:52 2013 +0200" }, "committer": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Thu Jul 25 20:47:06 2013 +1000" }, "message": "drm/gem: convert to new unified vma manager\n\nUse the new vma manager instead of the old hashtable. Also convert all\ndrivers to use the new convenience helpers. This drops all the\n(map_list.hash.key \u003c\u003c PAGE_SHIFT) non-sense.\n\nLocking and access-management is exactly the same as before with an\nadditional lock inside of the vma-manager, which strictly wouldn\u0027t be\nneeded for gem.\n\nv2:\n - rebase on drm-next\n - init nodes via drm_vma_node_reset() in drm_gem.c\nv3:\n - fix tegra\nv4:\n - remove duplicate if (drm_vma_node_has_offset()) checks\n - inline now trivial drm_vma_node_offset_addr() calls\nv5:\n - skip node-reset on gem-init due to kzalloc()\n - do not allow mapping gem-objects with offsets (backwards compat)\n - remove unneccessary casts\n\nCc: Inki Dae \u003cinki.dae@samsung.com\u003e\nCc: Rob Clark \u003crobdclark@gmail.com\u003e\nCc: Dave Airlie \u003cairlied@redhat.com\u003e\nCc: Thierry Reding \u003cthierry.reding@gmail.com\u003e\nSigned-off-by: David Herrmann \u003cdh.herrmann@gmail.com\u003e\nAcked-by: Patrik Jakobsson \u003cpatrik.r.jakobsson@gmail.com\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Dave Airlie \u003cairlied@gmail.com\u003e\n" }, { "commit": "cce723ed091ac304d48386bcc3524994c345123e", "tree": "2d2db05b37cad6ae79950aa0f9767215171bc518", "parents": [ "8e76f8dc49f180b0e9d750426c99e37a7d6162ae" ], "author": { "name": "Ben Widawsky", "email": "ben@bwidawsk.net", "time": "Fri Jul 19 09:16:42 2013 -0700" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Jul 19 18:26:57 2013 +0200" }, "message": "drm/i915: Make i915 events part of uapi\n\nMake the uevent strings part of the user API for people who wish to\nwrite their own listeners.\n\nv2: Make a space in the string concatenation. (Chad)\nUse the \"UEVENT\" suffix intead of \"EVENT\" (Chad)\nMake kernel-doc parseable Docbook comments (Daniel)\n\nv3: Undid reset change introduced in last submission (Daniel)\nFixed up comments to address removal changes.\n\nThanks to Daniel Vetter for a majority of the parity error comments.\n\nCC: Chad Versace \u003cchad.versace@linux.intel.com\u003e\nSigned-off-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "4a009085978de90db40f9f38bcfad501f86ca959", "tree": "f81e52842cb1b8d51be7ca5b6276f5c6cedb7aef", "parents": [ "c0a608023006c5bc3512a374bb84a224a399786b", "ebae30b1fbcc2cc991ce705cc82e16d1e5ddbf51" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Jun 28 09:29:04 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Jun 28 09:29:04 2013 +1000" }, "message": "Merge branch \u0027drm/for-next\u0027 of git://anongit.freedesktop.org/tegra/linux into drm-next\n\nThese changes are mostly minor fixes to things introduced in 3.10. The\nbiggest chunk is updates to the host1x firewall which checks job\nsubmissions from userspace and wasn\u0027t working properly. All other\npatches are mostly one-liners. Nothing new or too exciting this time\naround.\n\n* \u0027drm/for-next\u0027 of git://anongit.freedesktop.org/tegra/linux:\n gpu: host1x: Rework CPU syncpoint increment\n gpu: host1x: Fix client_managed type\n gpu: host1x: Fix memory access in syncpt request\n gpu: host1x: Copy gathers before verification\n gpu: host1x: Don\u0027t reset firewall between gathers\n gpu: host1x: Check reloc table before usage\n gpu: host1x: Check INCR opcode correctly\n drm/tegra: Remove DRIVER_BUS_PLATFORM from driver_features\n drm/tegra: Fix return value\n drm/tegra: Include header drm/drm.h\n MAINTAINERS: Update Tegra DRM entry\n drm/tegra: fix error return code in gr2d_submit()\n drm/tegra: fix missing unlock on error\n drm/tegra: Honor pixel-format changes\n drm/tegra: Explicitly set irq_enabled\n drm/tegra: Don\u0027t disable unused planes\n" }, { "commit": "4c813d4d759c0e6b83bfd73795e9526493556dc2", "tree": "5cab2327d0db876f86fc72cb4acac23d58107cba", "parents": [ "c19b3e238d7573cbe0bb60f4578b7d1de4a13746" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Jun 20 11:48:52 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Jun 28 09:13:39 2013 +1000" }, "message": "drm: add hotspot support for cursors.\n\nSo it looks like for virtual hw cursors on QXL we need to inform\nthe \"hw\" device what the cursor hotspot parameters are. This\nmakes sense if you think the host has to draw the cursor and interpret\nclicks from it. However the current modesetting interface doesn\u0027t support\npassing the hotspot information from userspace.\n\nThis implements a new cursor ioctl, that takes the hotspot info as well,\nuserspace can try calling the new interface and if it gets -ENOSYS it means\nits on an older kernel and can just fallback.\n\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "a191e48d442f2d996e2a7292802a2ad22ecb503a", "tree": "e578f48fdd1265c04b8a113c5c56b08a02edc4e3", "parents": [ "a5ad7a636b2b5925aaad6430a258ed523cef8d96" ], "author": { "name": "Emil Goode", "email": "emilgoode@gmail.com", "time": "Fri Apr 26 19:49:51 2013 +0200" }, "committer": { "name": "Thierry Reding", "email": "thierry.reding@gmail.com", "time": "Sat Jun 22 12:43:50 2013 +0200" }, "message": "drm/tegra: Include header drm/drm.h\n\nInclude definitions of used types by including drm/drm.h\n\nSparse output:\n/usr/include/drm/tegra_drm.h:21:\n\tfound __[us]{8,16,32,64} type without\n\t#include \u003clinux/types.h\u003e\n\nSigned-off-by: Emil Goode \u003cemilgoode@gmail.com\u003e\nSigned-off-by: Thierry Reding \u003cthierry.reding@gmail.com\u003e\n" }, { "commit": "a1f2cc73c762868435ae6ec9126bb2240337c61c", "tree": "dca5389d55038886c016df20643d0ce0fa796c4c", "parents": [ "82f91b6e93e2138c7e02b5a866f63d04cf040c86" ], "author": { "name": "Xiang, Haihao", "email": "haihao.xiang@intel.com", "time": "Tue May 28 19:22:34 2013 -0700" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri May 31 20:54:22 2013 +0200" }, "message": "drm/i915: add I915_PARAM_HAS_VEBOX to i915_getparam\n\nThis will let userland only try to use the new ring\nwhen the appropriate kernel is present\n\nSigned-off-by: Xiang, Haihao \u003chaihao.xiang@intel.com\u003e\nReviewed-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nSigned-off-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "82f91b6e93e2138c7e02b5a866f63d04cf040c86", "tree": "bb4fb58ac9ba70fe5dc5f0e191257bf32a1c8b03", "parents": [ "9010ebfd2b803ebab6c2fc70b9004b2a59e7937a" ], "author": { "name": "Xiang, Haihao", "email": "haihao.xiang@intel.com", "time": "Tue May 28 19:22:33 2013 -0700" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri May 31 20:54:21 2013 +0200" }, "message": "drm/i915: add I915_EXEC_VEBOX to i915_gem_do_execbuffer()\n\nA user can run batchbuffer via VEBOX ring.\n\nSigned-off-by: Xiang, Haihao \u003chaihao.xiang@intel.com\u003e\nReviewed-by: Damien Lespiau \u003cdamien.lespiau@intel.com\u003e\nSigned-off-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "c55b6b3da25aa3af36ec51a13a4ed15fef0d7a73", "tree": "240e093507676748e5cd1b52433d7e10523b5636", "parents": [ "ea9cbb063ce7509d98febdc756e77d6b69a10b56" ], "author": { "name": "Ville Syrjälä", "email": "ville.syrjala@linux.intel.com", "time": "Fri Apr 26 17:40:28 2013 +0300" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Apr 30 10:03:07 2013 +1000" }, "message": "drm: Kill user_modes list and the associated ioctls\n\nThere is no way to use modes added to the user_modes list. We never\nlook at the contents of said list in the kernel, and the only operations\nuserspace can do are attach and detach. So the only \"benefit\" of this\ninterface is wasting kernel memory.\n\nFortunately it seems no real user space application ever used these\nioctls. So just kill them.\n\nAlso remove the prototypes for the non-existing drm_mode_addmode_ioctl()\nand drm_mode_rmmode_ioctl() functions.\n\nv2: Use drm_noop instead of completely removing the ioctls\n\nSigned-off-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "d43f81cbaf43531a977e8b4c4427f19acf8a5061", "tree": "76fbf323c5df37de5a29f52817ddc4953328d213", "parents": [ "de2ba664c30fcdb0f678ab6cbb57e01a0b206085" ], "author": { "name": "Terje Bergstrom", "email": "tbergstrom@nvidia.com", "time": "Fri Mar 22 16:34:09 2013 +0200" }, "committer": { "name": "Thierry Reding", "email": "thierry.reding@avionic-design.de", "time": "Mon Apr 22 12:40:04 2013 +0200" }, "message": "drm/tegra: Add gr2d device\n\nAdd client driver for 2D device, and IOCTLs to pass work to host1x\nchannel for 2D.\n\nAlso adds functions that can be called to access sync points from\nDRM.\n\nSigned-off-by: Arto Merilainen \u003camerilainen@nvidia.com\u003e\nSigned-off-by: Terje Bergstrom \u003ctbergstrom@nvidia.com\u003e\nReviewed-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\nTested-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\nTested-by: Erik Faye-Lund \u003ckusmabite@gmail.com\u003e\nSigned-off-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\n" }, { "commit": "f18353eee7570412adca210b4968ecf2783754ba", "tree": "f42a655004a9ed7047bfca6bce694ea7a395f0e6", "parents": [ "62c8ba7c58e4163f975c5f8b5a3dd5f306a2deda", "466476dfdcafbb4286ffa232a3a792731b9dc852" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Wed Apr 17 08:48:23 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Wed Apr 17 08:48:23 2013 +1000" }, "message": "Merge branch \u0027drm-next-3.10\u0027 of git://people.freedesktop.org/~agd5f/linux into drm-next\n\nAlex writes:\nThis is the initial 3.10 pull request for radeon. The big changes here\nare UVD support and proper tiling support for SI. The rest is\nbug fixes. I hope to have another pull request later in the week with\nsome new things we\u0027ve been working on internally.\n\n* \u0027drm-next-3.10\u0027 of git://people.freedesktop.org/~agd5f/linux: (28 commits)\n drm/radeon: Always flush the VM\n drm/radeon: re-enable PTE/PDE packet for set_page on cayman/TN\n drm/radeon: cleanup properly if mmio mapping fails\n drm/radeon/evergreen+: don\u0027t enable HPD interrupts on eDP/LVDS\n drm/radeon: add si tile mode array query v3\n drm/radeon: add ring working query\n drm/radeon: handle broken disabled rb mask gracefully\n drm/radeon: add pcie set/get lanes callbacks for newer asics\n drm/radeon: update r600 set/get pcie lane config\n drm/radeon/kms: replace *REG32_PCIE_P with *REG32_PCIE_PORT\n drm/radeon: remove unused blit remnants from si.c\n drm/radeon: add UVD tiling addr config v2\n drm/radeon: init UVD clocks to sane defaults\n drm/radeon: add set_uvd_clocks callback for r7xx v3\n drm/radeon: add set_uvd_clocks callback for SI\n drm/radeon: add set_uvd_clocks callback for evergreen\n drm/radeon: add set_uvd_clocks callback for ON/LN/TN (v4)\n drm/radeon: add radeon_atom_get_clock_dividers helper\n drm/radeon: add pm callback for setting uvd clocks\n drm/radeon: UVD bringup v8\n ...\n" }, { "commit": "b6330548383cf18d608faf1c2dc0c81c60476233", "tree": "e0c9e9871642c763ee03c7f712deb0926917b4f9", "parents": [ "025df7755472dc5ee9ebc5aa7023eba4b4ef3e3b" ], "author": { "name": "Paul Sokolovsky", "email": "paul.sokolovsky@linaro.org", "time": "Fri Apr 12 18:28:26 2013 -0500" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Apr 16 13:15:26 2013 +1000" }, "message": "drm.h: Fix DRM compilation with bare-metal toolchain.\n\nAn ifdef in drm.h expects to be compiled with full-fledged Linux\ntoolchain, but it\u0027s common to compile kernel with just bare-metal\ntoolchain which doesn\u0027t define __linux__. So, also add __KERNEL__\ncheck.\n\n[nm@ti.com: port forward to 3.9-rc6 and post to dri devel for feedback as RFC]\nSigned-off-by: Paul Sokolovsky \u003cpaul.sokolovsky@linaro.org\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "715f59cc2391cb4e28a4d464a0564a60a00ecca4", "tree": "958f4cd1dbb9600a80bf5c5e1b00c7911f80e5ad", "parents": [ "8091ee5c092a1e7dab2cb49d02d5f3925ece3995" ], "author": { "name": "Christopher Harvey", "email": "charvey@matrox.com", "time": "Fri Apr 05 15:28:32 2013 +0000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Apr 12 14:07:20 2013 +1000" }, "message": "drm: Misc comment cleanup\n\nSigned-off-by: Christopher Harvey \u003ccharvey@matrox.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "f64122c1f6ade301585569863b4b3b18f6e4e332", "tree": "1eb6629931604584f6fff28c0b9a1c9a3d9024f3", "parents": [ "afe6804c045fbd69a1b75c681107b5d6df9190de" ], "author": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Mon Feb 25 14:47:55 2013 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Apr 12 13:51:07 2013 +1000" }, "message": "drm: add new QXL driver. (v1.4)\n\nQXL is a paravirtual graphics device used by the Spice virtual desktop\ninterface.\n\nThe drivers uses GEM and TTM to manage memory, the qxl hw fencing however\nis quite different than normal TTM expects, we have to keep track of a number\nof non-linear fence ids per bo that we need to have released by the hardware.\n\nThe releases are freed from a workqueue that wakes up and processes the\nrelease ring.\n\nreleases are suballocated from a BO, there are 3 release categories, drawables,\nsurfaces and cursor cmds. The hw also has 3 rings for commands, cursor and release handling.\n\nThe hardware also have a surface id tracking mechnaism and the driver encapsulates it completely inside the kernel, userspace never sees the actual hw surface\nids.\n\nThis requires a newer version of the QXL userspace driver, so shouldn\u0027t be\nenabled until that has been placed into your distro of choice.\n\nAuthors: Dave Airlie, Alon Levy\n\nv1.1: fixup some issues in the ioctl interface with padding\nv1.2: add module device table\nv1.3: fix nomodeset, fbcon leak, dumb bo create, release ring irq,\n don\u0027t try flush release ring (broken hw), fix -modesetting.\nv1.4: fbcon cpu usage reduction + suitable accel flags.\n\nSigned-off-by: Alon Levy \u003calevy@redhat.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "64d7b8bed851f55a17d15ec6cc60233c85f84357", "tree": "82cd8c562091e6fda2419fc49002398a0d094b1c", "parents": [ "902aaef6c698ce0f04a6acab2d5396519d5de330" ], "author": { "name": "Jerome Glisse", "email": "jglisse@redhat.com", "time": "Tue Apr 09 11:17:08 2013 -0400" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Thu Apr 11 09:22:06 2013 -0400" }, "message": "drm/radeon: add si tile mode array query v3\n\nAllow userspace to query for the tile mode array so userspace can properly\ncompute surface pitch and alignment requirement depending on tiling.\n\nv2: Make strict aliasing safer by casting to char when copying\nv3: merge fix from Christian\n\nSigned-off-by: Jerome Glisse \u003cjglisse@redhat.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "902aaef6c698ce0f04a6acab2d5396519d5de330", "tree": "1ba894574742ade2579aeebfd18a7bf414795887", "parents": [ "cedb655a3a7764c3fd946077944383c9e0e68dd4" ], "author": { "name": "Christian König", "email": "christian.koenig@amd.com", "time": "Tue Apr 09 10:35:42 2013 -0400" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Thu Apr 11 09:22:05 2013 -0400" }, "message": "drm/radeon: add ring working query\n\nAdd new ioctl option and bumb minor version number.\n\nSigned-off-by: Christian König \u003cchristian.koenig@amd.com\u003e\nReviewed-by: Jerome Glisse \u003cjglisse@redhat.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "f2ba57b5eab8817d86d0f108fdf1878e51dc0a37", "tree": "e784f0573069f6341768968fe3d49df6d2c9a534", "parents": [ "4474f3a91f95e3fcc62d97e36f1e8e3392c96ee0" ], "author": { "name": "Christian König", "email": "deathsimple@vodafone.de", "time": "Mon Apr 08 12:41:29 2013 +0200" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Tue Apr 09 10:31:33 2013 -0400" }, "message": "drm/radeon: UVD bringup v8\n\nJust everything needed to decode videos using UVD.\n\nv6: just all the bugfixes and support for R7xx-SI merged in one patch\nv7: UVD_CGC_GATE is a write only register, lockup detection fix\nv8: split out VRAM fallback changes, remove support for RV770,\n add support for HEMLOCK, add buffer sizes checks\n\nSigned-off-by: Christian König \u003cchristian.koenig@amd.com\u003e\nReviewed-by: Jerome Glisse \u003cjglisse@redhat.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "a0a53aa8c7b491a43e2ef66786f9511bae8cbc35", "tree": "ba99c19682038634fece39989fef348baaebab1b", "parents": [ "7c1c7c18fc752b2a1d07597286467ef186312463" ], "author": { "name": "Samuel Li", "email": "samuel.li@amd.com", "time": "Mon Apr 08 17:25:47 2013 -0400" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Tue Apr 09 10:31:31 2013 -0400" }, "message": "drm/radeon: Use direct mapping for fast fb access on RS690\n\nThis patch allows the CPU to map the stolen vram segment\ndirectly rather than going through the PCI BAR. This\nsignificantly improves performance for certain workloads with\na properly patched ddx.\n\nUse radeon.fastfb\u003d1 to enable it (disabled by default).\nCurrently only supported on RS690, but support for RS780/880\nand newer APUs may be added eventually.\n\nSigned-off-by: Samuel Li \u003csamuel.li@amd.com\u003e\nReviewed-by: Christian König \u003cchristian.koenig@amd.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "8bb0daffb0b8e45188066255b4203446eae181f1", "tree": "c1a324b863df57becdfab54c9325231bbb853b56", "parents": [ "a4462f246c8821f625f45bce52c7ca7e0207dffe" ], "author": { "name": "Rob Clark", "email": "robdclark@gmail.com", "time": "Mon Feb 11 12:43:09 2013 -0500" }, "committer": { "name": "Rob Clark", "email": "robdclark@gmail.com", "time": "Sat Feb 16 17:38:06 2013 -0500" }, "message": "drm/omap: move out of staging\n\nNow that the omapdss interface has been reworked so that omapdrm can use\ndispc directly, we have been able to fix the remaining functional kms\nissues with omapdrm. And in the mean time the PM sequencing and many\nother of that open issues have been solved. So I think it makes sense\nto finally move omapdrm out of staging.\n\nSigned-off-by: Rob Clark \u003crobdclark@gmail.com\u003e\n" }, { "commit": "eef90ccb8a4d50b219a95cc53878ebb007315b32", "tree": "e10ef8121e9b6f0c061df75967c7af77a942feb3", "parents": [ "ed5982e6ce5f106abcbf071f80730db344a6da42" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Jan 08 10:53:17 2013 +0000" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Jan 17 22:23:47 2013 +0100" }, "message": "drm/i915: Use the reloc.handle as an index into the execbuffer array\n\nUsing copywinwin10 as an example that is dependent upon emitting a lot\nof relocations (2 per operation), we see improvements of:\n\nc2d/gm45: 618000.0/sec to 623000.0/sec.\ni3-330m: 748000.0/sec to 789000.0/sec.\n\n(measured relative to a baseline with neither optimisations applied).\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Imre Deak \u003cimre.deak@intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "ed5982e6ce5f106abcbf071f80730db344a6da42", "tree": "3669b5e3640209cdf6ebfb3200dfd4947777dff3", "parents": [ "bcffc3faa692d6b2ef734e4f0c8f097175284db6" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Jan 17 22:23:36 2013 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Jan 17 22:23:36 2013 +0100" }, "message": "drm/i915: Allow userspace to hint that the relocations were known\n\nUserspace is able to hint to the kernel that its command stream and\nauxiliary state buffers already hold the correct presumed addresses and\nso the relocation process may be skipped if the kernel does not need to\nmove any buffers in preparation for the execbuffer. Thus for the common\ncase where the allotment of buffers is static between batches, we can\navoid the overhead of individually checking the relocation entries.\n\nNote that this requires userspace to supply the domain tracking and\nrequests for workarounds itself that would otherwise be computed based\nupon the relocation entries.\n\nUsing copywinwin10 as an example that is dependent upon emitting a lot\nof relocations (2 per operation), we see improvements of:\n\nc2d/gm45: 618000.0/sec to 632000.0/sec.\ni3-330m: 748000.0/sec to 830000.0/sec.\n\n(measured relative to a baseline with neither optimisations applied).\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Imre Deak \u003cimre.deak@intel.com\u003e\n[danvet: Fixup merge conflict in userspace header due to different\nbaseline trees.]\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "4f21877cb8b9e9f85a541af43b9ee66d9006bb69", "tree": "f7c47d383b124474fbf97861f4c778546faff513", "parents": [ "0ca824c7df2f2d79933ea66adb2b3dfabb85f283" ], "author": { "name": "Eunchul Kim", "email": "chulspro.kim@samsung.com", "time": "Sat Dec 22 17:49:24 2012 +0900" }, "committer": { "name": "Inki Dae", "email": "inki.dae@samsung.com", "time": "Fri Jan 04 15:54:33 2013 +0900" }, "message": "drm/exynos: consider both case of vflip and hflip.\n\nThis patch considers both case of vflip and hflip.\nIf we want that the contents in buffer to be rotated to 180 degree,\nthen we can use h,vflip or 180 degree.\n\nChangelog v2:\n- added EXYNOS_DRM_FLIP_BOTH enum value to avoid build warnning.\n\nSigned-off-by: Eunchul Kim \u003cchulspro.kim@samsung.com\u003e\nSigned-off-by: Inki Dae \u003cinki.dae@samsung.com\u003e\n" }, { "commit": "d81aecb5e680311e1f3fd71e49e6a4072d2374d2", "tree": "06e5e0ce2d531d775695aac739bc5a29475cf188", "parents": [ "c704f1b47d6cb4b61b2e120030088c2a7cefcc13" ], "author": { "name": "Inki Dae", "email": "daeinki@gmail.com", "time": "Tue Dec 18 02:30:17 2012 +0900" }, "committer": { "name": "Inki Dae", "email": "inki.dae@samsung.com", "time": "Fri Jan 04 15:54:32 2013 +0900" }, "message": "drm/exynos: change file license to GPL\n\nThis patch changes file license to GPL\n\nMost of exynos files had been copied from some random\nfile and not updated correctly. So this patch corrects\nthe file license.\n\nSigned-off-by: Inki Dae \u003cinki.dae@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\n" }, { "commit": "8be0e5c427c18a59ce261c496ae2193cbcbafffd", "tree": "26dac80685ba46246642b901460a5042ac4e187c", "parents": [ "b1d778b970ce52e02ca6a7f34ba167fe95bc1cc4", "da494d7ca5e0a1afca3480826b5060e15c951e80" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Sun Dec 30 13:54:12 2012 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Sun Dec 30 13:54:12 2012 +1000" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-next\n\nSome fixes for 3.8:\n- Watermark fixups from Chris Wilson (4 pieces).\n- 2 snb workarounds, seem to be recently added to our internal DB.\n- workaround for the infamous i830/i845 hang, seems now finally solid!\n Based on Chris\u0027 fix for SNA, now also for UXA/mesa\u0026old SNA.\n- Some more fixlets for shrinker-pulls-the-rug issues (Chris\u0026me).\n- Fix dma-buf flags when exporting (you).\n- Disable the VGA plane if it\u0027s enabled on lid open - similar fix in\n spirit to the one I\u0027ve sent you last weeek, BIOS\u0027 really like to mess\n with the display when closing the lid (awesome debug work from Krzysztof\n Mazur).\n\n* \u0027drm-intel-fixes\u0027 of git://people.freedesktop.org/~danvet/drm-intel:\n drm/i915: disable shrinker lock stealing for create_mmap_offset\n drm/i915: optionally disable shrinker lock stealing\n drm/i915: fix flags in dma buf exporting\n i915: ensure that VGA plane is disabled\n drm/i915: Preallocate the drm_mm_node prior to manipulating the GTT drm_mm manager\n drm: Export routines for inserting preallocated nodes into the mm manager\n drm/i915: don\u0027t disable disconnected outputs\n drm/i915: Implement workaround for broken CS tlb on i830/845\n drm/i915: Implement WaSetupGtModeTdRowDispatch\n drm/i915: Implement WaDisableHiZPlanesWhenMSAAEnabled\n drm/i915: Prefer CRTC \u0027active\u0027 rather than \u0027enabled\u0027 during WM computations\n drm/i915: Clear self-refresh watermarks when disabled\n drm/i915: Double the cursor self-refresh latency on Valleyview\n drm/i915: Fixup cursor latency used for IVB lp3 watermarks\n" }, { "commit": "b45305fce5bb1abec263fcff9d81ebecd6306ede", "tree": "5f8c074f2ceeb153bed7a0f28d631aec31b5eefc", "parents": [ "6547fbdbfff62c99e4f7b4f985ff8b3454f33b0f" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Dec 17 16:21:27 2012 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Dec 17 17:27:02 2012 +0100" }, "message": "drm/i915: Implement workaround for broken CS tlb on i830/845\n\nNow that Chris Wilson demonstrated that the key for stability on early\ngen 2 is to simple _never_ exchange the physical backing storage of\nbatch buffers I\u0027ve tried a stab at a kernel solution. Doesn\u0027t look too\nnefarious imho, now that I don\u0027t try to be too clever for my own good\nany more.\n\nv2: After discussing the various techniques, we\u0027ve decided to always blit\nbatches on the suspect devices, but allow userspace to opt out of the\nkernel workaround assume full responsibility for providing coherent\nbatches. The principal reason is that avoiding the blit does improve\nperformance in a few key microbenchmarks and also in cairo-trace\nreplays.\n\nSigned-Off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n[danvet:\n- Drop the hunk which uses HAS_BROKEN_CS_TLB to implement the ring\n wrap w/a. Suggested by Chris Wilson.\n- Also add the ACTHD check from Chris Wilson for the error state\n dumping, so that we still catch batches when userspace opts out of\n the w/a.]\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "2f3f24061c5c489074ad492bf694a5a76ebd8fc5", "tree": "a02e00a7e98a4fa543b1e7fc4eda2fbd62d16b6d", "parents": [ "652a187664902399d34f5b3a084fdbb51b2ca12f", "f2646380655b32481b5e76c666e1793dfef184bd" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Sun Dec 16 05:49:46 2012 +0000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Sun Dec 16 05:49:46 2012 +0000" }, "message": "Merge branch \u0027exynos-drm-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next\n\nInki writes:\n\"- add dmabuf attach/detach feature\n . This patch would resolve performance deterioration issue\n when v4l2-based driver is using the buffer imported from gem.\n- drm/exynos: use DMA_ATTR_NO_KERNEL_MAPPING attribute\n . With gem allocation, kernel space mapping isn\u0027t allocated and\n also physical pages aren\u0027t mapped with the kernel space.\n The physical pages are mapped with kernel space though vmap\n function only for console framebuffer.\n- add the below two patches I missed.\n drm: exynos: moved exynos drm device registration to drm driver\n drm: exynos: moved exynos drm hdmi device registration to drm driver\n- add IPP subsystem framework and its-based device drivers.\n . This patch set includes fimc, rotator and gsc drivers to perform\n image scaling, rotation and color space conversion.\n- add runtime pm support to hdmi driver.\n- And fixups and cleanups.\"\n\n* \u0027exynos-drm-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (30 commits)\n drm/exynos: add gsc ipp driver\n drm/exynos: add rotator ipp driver\n drm/exynos: add fimc ipp driver\n drm/exynos: add iommu support for ipp\n drm/exynos: add ipp subsystem\n drm/exynos: support device tree for fimd\n drm/exynos: support extended screen coordinate of fimd\n drm/exynos: fix x, y coordinates for right bottom pixel\n drm/exynos: fix fb offset calculation for plane\n drm/exynos: hdmi: Fix potential NULL pointer dereference error\n drm/exynos: hdmi: Add CONFIG_OF and use of_match_ptr() macro\n drm/exynos: add support for hdmiphy power control for exynos5\n drm/exynos: add runtime pm support for mixer\n drm/exynos: added runtime pm support for hdmi\n drm/exynos: fix allocation and cache mapping type\n drm/exynos: reorder framebuffer init sequence\n drm/exynos/iommu: fix return value check in drm_create_iommu_mapping()\n drm/exynos: remove unused vaddr member\n drm/exynos: use DMA_ATTR_NO_KERNEL_MAPPING attribute\n drm/exynos: add exception codes to exynos_drm_fbdev_create()\n ...\n" }, { "commit": "cb471f14b5eebfed22bb9f2d0f06601f171c574a", "tree": "955334335ef7d041553dc6d6b1351b9a8f3fa593", "parents": [ "d636ead86fb806085de4ce98693e8d91c419d8f3" ], "author": { "name": "Eunchul Kim", "email": "chulspro.kim@samsung.com", "time": "Fri Dec 14 18:10:31 2012 +0900" }, "committer": { "name": "Inki Dae", "email": "daeinki@gmail.com", "time": "Sat Dec 15 02:29:08 2012 +0900" }, "message": "drm/exynos: add ipp subsystem\n\nThis patch adds Image Post Processing(IPP) support for exynos drm driver.\n\nIPP supports image scaler/rotator and input/output DMA operations\nusing IPP subsystem framework to control FIMC, Rotator and GSC hardware\nand supports some user interfaces for user side.\n\nAnd each IPP-based drivers support Memory to Memory operations\nwith various converting. And in case of FIMC hardware, it also supports\nWriteback and Display output operations through local path.\n\nFeatures:\n- Memory to Memory operation support.\n- Various pixel formats support.\n- Image scaling support.\n- Color Space Conversion support.\n- Image crop operation support.\n- Rotate operation support to 90, 180 or 270 degree.\n- Flip operation support to vertical, horizontal or both.\n- Writeback operation support to display blended image of FIMD fifo on screen\n\nA summary to IPP Subsystem operations:\nFirst of all, user should get property capabilities from IPP subsystem\nand set these properties to hardware registers for desired operations.\nThe properties could be pixel format, position, rotation degree and\nflip operation.\n\nAnd next, user should set source and destination buffer data using\nDRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and\ndestinition buffers.\n\nAnd next, user can control user-desired hardware with desired operations\nsuch as play, stop, pause and resume controls.\n\nAnd finally, user can aware of dma operation completion and also get\ndestination buffer that it contains user-desried result through dequeue\ncommand.\n\nIOCTL commands:\n- DRM_EXYNOS_IPP_GET_PROPERTY\n . get ipp driver capabilitis and id.\n- DRM_EXYNOS_IPP_SET_PROPERTY\n . set format, position, rotation, flip to source and destination buffers\n- DRM_EXYNOS_IPP_QUEUE_BUF\n . enqueue/dequeue buffer and make event list.\n- DRM_EXYNOS_IPP_CMD_CTRL\n . play/stop/pause/resume control.\n\nEvent:\n- DRM_EXYNOS_IPP_EVENT\n . a event to notify dma operation completion to user side.\n\nBasic control flow:\nOpen -\u003e Get properties -\u003e User choose desired IPP sub driver(FIMC, Rotator\nor GSCALER) -\u003e Set Property -\u003e Create gem handle -\u003e Enqueue to source and\ndestination buffers -\u003e Command control(Play) -\u003e Event is notified to User\n-\u003e User gets destinition buffer complated -\u003e (Enqueue to source and\ndestination buffers -\u003e Event is notified to User) * N -\u003e Queue/Dequeue to\nsource and destination buffers -\u003e Command control(Stop) -\u003e Free gem handle\n-\u003e Close\n\nChangelog v1 ~ v5:\n- added comments, code fixups and cleanups.\n\nSigned-off-by: Eunchul Kim \u003cchulspro.kim@samsung.com\u003e\nSigned-off-by: Jinyoung Jeon \u003cjy0.jeon@samsung.com\u003e\nSigned-off-by: Inki Dae \u003cinki.dae@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\n" }, { "commit": "278a334cbc96d3da66d56235b8ce84081e9a1892", "tree": "b5359119856453cdd69277003861e0a9a9e2b408", "parents": [ "cd459e525f4faeefa0bf78e1bcba3e04496b2cb5" ], "author": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Thu Dec 13 12:27:28 2012 -0500" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Fri Dec 14 10:45:26 2012 -0500" }, "message": "drm/radeon: enable the async DMA rings in the CS ioctl\n\nThis enables the functionality added in the previous\npatches. Userspace acceleration drivers can use the\nCS ioctl to submit command buffers to the async DMA\nrings.\n\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "1a1494def7eacbd25db05185aa2e81ef90892460", "tree": "40911f075b1fe527c6d20bf8c3070d4cdca11e97", "parents": [ "8de9e417757fb9f130f55a38f4ee7027b60de1c7", "71bfe916ebe6d026cd3d0e41c398574fc1228e03" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Sat Dec 08 13:17:07 2012 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Mon Dec 10 20:03:58 2012 +1000" }, "message": "Merge branch \u0027drm-next-3.8\u0027 of git://people.freedesktop.org/~agd5f/linux into drm-next\n\nAlex writes:\nPretty minor -next pull request. We some additional new bits waiting\ninternally for release. Hopefully Monday we can get at least some of\nthem out. The others will probably take a few more weeks.\n\nHighlights of the current request:\n- ELD registers for passing audio information to the sound hardware\n- Handle GPUVM page faults more gracefully\n- Misc fixes\n\nMerge radeon test\n* \u0027drm-next-3.8\u0027 of git://people.freedesktop.org/~agd5f/linux: (483 commits)\n drm/radeon: bump driver version for new info ioctl requests\n drm/radeon: fix eDP clk and lane setup for scaled modes\n drm/radeon: add new INFO ioctl requests\n drm/radeon/dce32+: use fractional fb dividers for high clocks\n drm/radeon: use cached memory when evicting for vram on non agp\n drm/radeon: add a CS flag END_OF_FRAME\n drm/radeon: stop page faults from hanging the system (v2)\n drm/radeon/dce4/5: add registers for ELD handling\n drm/radeon/dce3.2: add registers for ELD handling\n radeon: fix pll/ctrc mapping on dce2 and dce3 hardware\n Linux 3.7-rc7\n powerpc/eeh: Do not invalidate PE properly\n Revert \"drm/i915: enable rc6 on ilk again\"\n ALSA: hda - Fix build without CONFIG_PM\n of/address: sparc: Declare of_iomap as an extern function for sparc again\n PM / QoS: fix wrong error-checking condition\n bnx2x: remove redundant warning log\n vxlan: fix command usage in its doc\n 8139cp: revert \"set ring address before enabling receiver\"\n MPI: Fix compilation on MIPS with GCC 4.4 and newer\n ...\n\nConflicts:\n\tdrivers/gpu/drm/exynos/exynos_drm_encoder.c\n\tdrivers/gpu/drm/exynos/exynos_drm_fbdev.c\n\tdrivers/gpu/drm/nouveau/core/engine/disp/nv50.c\n" }, { "commit": "2e1a7674f65eb2c9118ab59d9c8aa9c731da6b85", "tree": "6a4a881d05fe1cdb5a4d2781f7c91e8a8111c3dd", "parents": [ "a02dc74b317d78298cb0587b9b1f6f741fd5c139" ], "author": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Tue Dec 04 12:55:37 2012 -0500" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Fri Dec 07 19:48:22 2012 -0500" }, "message": "drm/radeon: add new INFO ioctl requests\n\nAdd requests to get the number of shader engines (SE) and\nthe number of SH per SE. These are needed for geometry\nand tesselation shaders in the 3D driver as well as setting\nup PA_SC_RASTER_CONFIG on SI asics.\n\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n" }, { "commit": "57f570838341507682b7705f1d950608ef2182bd", "tree": "678bdcf5f76dfa3fc3143681b6cd5e70a38586f7", "parents": [ "ae133a1129790ec288b429b5f08ab4701633844a" ], "author": { "name": "Marek Olšák", "email": "maraeo@gmail.com", "time": "Sun Dec 02 21:03:33 2012 +0100" }, "committer": { "name": "Alex Deucher", "email": "alexander.deucher@amd.com", "time": "Fri Dec 07 19:48:20 2012 -0500" }, "message": "drm/radeon: add a CS flag END_OF_FRAME\n\nNo version bump is required because setting the flag on older DRM has\nno effect.\n\nThis only reserves the bit and doesn\u0027t use it. I assume we will use it\nfor buffer eviction heuristics.\n\nSigned-off-by: Marek Olšák \u003cmaraeo@gmail.com\u003e\n" }, { "commit": "2a3098ff6c2109557868f9f230f4725312dcb882", "tree": "cb8ae0355a46c48602bb4df2c7b56ed25eb77f65", "parents": [ "1119707e225c1627ed3f413a569e297883946fb2" ], "author": { "name": "Inki Dae", "email": "inki.dae@samsung.com", "time": "Sun Nov 04 05:48:52 2012 -0800" }, "committer": { "name": "Inki Dae", "email": "inki.dae@samsung.com", "time": "Tue Dec 04 14:46:01 2012 +0900" }, "message": "drm/exynos: add userptr feature for g2d module\n\nThis patch adds userptr feautre for G2D module.\n\nThe userptr means user space address allocated by malloc().\nAnd the purpose of this feature is to make G2D\u0027s dma able\nto access the user space region.\n\nTo user this feature, user should flag G2D_BUF_USRPTR to\noffset variable of struct drm_exynos_g2d_cmd and fill\nstruct drm_exynos_g2d_userptr with user space address\nand size for it and then should set a pointer to\ndrm_exynos_g2d_userptr object to data variable of struct\ndrm_exynos_g2d_cmd. The last bit of offset variable is used\nto check if the cmdlist\u0027s buffer type is userptr or not.\nIf userptr, the g2d driver gets user space address and size\nand then gets pages through get_user_pages().\n(another case is counted as gem handle)\n\nBelow is sample codes:\n\nstatic void set_cmd(struct drm_exynos_g2d_cmd *cmd,\n\t\tunsigned long offset, unsigned long data)\n{\n\tcmd-\u003eoffset \u003d offset;\n\tcmd-\u003edata \u003d data;\n}\n\nstatic int solid_fill_test(int x, int y, unsigned long userptr)\n{\n\tstruct drm_exynos_g2d_cmd cmd_gem[5];\n\tstruct drm_exynos_g2d_userptr g2d_userptr;\n\tunsigned int gem_nr \u003d 0;\n\t...\n\n\tg2d_userptr.userptr \u003d userptr;\n\tg2d_userptr.size \u003d x * y * 4;\n\n\tset_cmd(\u0026cmd_gem[gem_nr++], DST_BASE_ADDR_REG |\n\t\t\t\t\tG2D_BUF_USERPTR,\n\t\t\t(unsigned long)\u0026g2d_userptr);\n\t...\n}\n\nint main(int argc, char **argv)\n{\n\tunsigned long addr;\n\t...\n\n\taddr \u003d malloc(x * y * 4);\n\t...\n\n\tsolid_fill_test(x, y, addr);\n\t...\n}\n\nAnd next, the pages are mapped with iommu table and the device\naddress is set to cmdlist so that G2D\u0027s dma can access it.\nAs you may know, the pages from get_user_pages() are pinned.\nIn other words, they CAN NOT be migrated and also swapped out.\nSo the dma access would be safe.\n\nBut the use of userptr feature has performance overhead so\nthis patch also has memory pool to the userptr feature.\nPlease, assume that user sends cmdlist filled with userptr\nand size every time to g2d driver, and the get_user_pages\nfuncion will be called every time.\n\nThe memory pool has maximum 64MB size and the userptr that\nuser had ever sent, is holded in the memory pool.\nThis meaning is that if the userptr from user is same as one\nin the memory pool, device address to the userptr in the memory\npool is set to cmdlist.\n\nAnd last, the pages from get_user_pages() will be freed once\nuser calls free() and the dma access is completed. Actually,\nget_user_pages() takes 2 reference counts if the user process\nhas never accessed user region allocated by malloc(). Then, if\nthe user calls free(), the page reference count becomes 1 and\nbecomes 0 with put_page() call. And the reverse holds as well.\nThis means how the pages backed are used by dma and freed.\n\nThis patch is based on \"drm/exynos: add iommu support for g2d\",\n\thttps://patchwork.kernel.org/patch/1629481/\n\nSigned-off-by: Inki Dae \u003cinki.dae@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\n" }, { "commit": "c61eef726a78ae77b6ce223d01ea2130f465fe5c", "tree": "7bd310556195005b5c4c1cbadadc9da1fbf5163c", "parents": [ "e62f2f5acba1d466da047983ae16f6b96b68b310" ], "author": { "name": "Imre Deak", "email": "imre.deak@intel.com", "time": "Tue Oct 23 18:53:26 2012 +0000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Nov 20 16:06:16 2012 +1000" }, "message": "drm: add support for monotonic vblank timestamps\n\nJumps in the vblank and page flip event timestamps cause trouble for\nclients, so we should avoid them. The timestamp we get currently with\ngettimeofday can jump, so use instead monotonic timestamps.\n\nFor backward compatibility use a module flag to revert back to using\ngettimeofday timestamps. Add also a DRM_CAP_TIMESTAMP_MONOTONIC flag\nthat is simply a read only version of the module flag, so that clients\ncan query this without depending on sysfs.\n\nSigned-off-by: Imre Deak \u003cimre.deak@intel.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "c2fb7916927e989ea424e61ce5fe617e54878827", "tree": "02f9d5482075f8931637d82bb697a6470270136a", "parents": [ "29de6ce574870a0d3fd157afdbf51c0282e2bf63", "6f0c0580b70c89094b3422ba81118c7b959c7556" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Oct 22 14:34:51 2012 +0200" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Oct 22 14:34:51 2012 +0200" }, "message": "Merge tag \u0027v3.7-rc2\u0027 into drm-intel-next-queued\n\nLinux 3.7-rc2\n\nBackmerge to solve two ugly conflicts:\n- uapi. We\u0027ve already added new ioctl definitions for -next. Do I need to say more?\n- wc support gtt ptes. We\u0027ve had to revert this for snb+ for 3.7 and\n also fix a few other things in the code. Now we know how to make it\n work on snb+, but to avoid losing the other fixes do the backmerge\n first before re-enabling wc gtt ptes on snb+.\n\nAnd a few other minor things, among them git getting confused in\nintel_dp.c and seemingly causing a conflict out of nothing ...\n\nConflicts:\n\tdrivers/gpu/drm/i915/i915_reg.h\n\tdrivers/gpu/drm/i915/intel_display.c\n\tdrivers/gpu/drm/i915/intel_dp.c\n\tdrivers/gpu/drm/i915/intel_modes.c\n\tinclude/drm/i915_drm.h\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "718dcedd7e87f448a1eeeda4d1a986284c243110", "tree": "48bd3730e4eea9c359d94ae4e990c2d9c574931b", "parents": [ "f3dfd599af993385b40fc7a1c947afc12729bc4d" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Oct 04 18:21:50 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Oct 04 18:21:50 2012 +0100" }, "message": "UAPI: (Scripted) Disintegrate include/drm\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Michael Kerrisk \u003cmtk.manpages@gmail.com\u003e\nAcked-by: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\nAcked-by: Dave Jones \u003cdavej@redhat.com\u003e\n" }, { "commit": "4413e16d9d21673bb5048a2e542f1aaa00015c2e", "tree": "603b591283d5d5025840832a2987cfa3167cb794", "parents": [ "abbf1590de22a6d2240a59383477da50d1402f6a" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Tue Oct 02 18:01:35 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Tue Oct 02 18:01:35 2012 +0100" }, "message": "UAPI: (Scripted) Set up UAPI Kbuild files\n\nSet up empty UAPI Kbuild files to be populated by the header splitter.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\nAcked-by: Dave Jones \u003cdavej@redhat.com\u003e\n" } ] }