)]}' { "log": [ { "commit": "10db9e009af5c3647b9ee742dcb14f6ff447a2a5", "tree": "f386b8fff498c4594700d73af79c7b60d486b530", "parents": [ "f8f5701bdaf9134b1f90e5044a82c66324d2073f" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Jun 06 11:21:44 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Jun 06 11:29:31 2012 -0400" }, "message": "tile: remove cpu_idle_on_new_stack\n\nThis routine isn\u0027t used unless CONFIG_HOMECACHE is enabled, which\nisn\u0027t even available as a public configuration option yet.\nSince it no longer links correctly in 3.4, just remove it for now.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "86c47b70f62a7072d441ba212aab33c2f82627c2", "tree": "d03988bd2226966352bb7f3c2e82ff545353d2c4", "parents": [ "1193755ac6328ad240ba987e6ec41d5e8baf0680", "44fbbb3dc687c9709a6f2236197316e5c79ab1eb" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jun 01 11:53:44 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jun 01 11:53:44 2012 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal\n\nPull third pile of signal handling patches from Al Viro:\n \"This time it\u0027s mostly helpers and conversions to them; there\u0027s a lot\n of stuff remaining in the tree, but that\u0027ll either go in -rc2\n (isolated bug fixes, ideally via arch maintainers\u0027 trees) or will sit\n there until the next cycle.\"\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal:\n x86: get rid of calling do_notify_resume() when returning to kernel mode\n blackfin: check __get_user() return value\n whack-a-mole with TIF_FREEZE\n FRV: Optimise the system call exit path in entry.S [ver #2]\n FRV: Shrink TIF_WORK_MASK [ver #2]\n FRV: Prevent syscall exit tracing and notify_resume at end of kernel exceptions\n new helper: signal_delivered()\n powerpc: get rid of restore_sigmask()\n most of set_current_blocked() callers want SIGKILL/SIGSTOP removed from set\n set_restore_sigmask() is never called without SIGPENDING (and never should be)\n TIF_RESTORE_SIGMASK can be set only when TIF_SIGPENDING is set\n don\u0027t call try_to_freeze() from do_signal()\n pull clearing RESTORE_SIGMASK into block_sigmask()\n sh64: failure to build sigframe !\u003d signal without handler\n openrisc: tracehook_signal_handler() is supposed to be called on success\n new helper: sigmask_to_save()\n new helper: restore_saved_sigmask()\n new helpers: {clear,test,test_and_clear}_restore_sigmask()\n HAVE_RESTORE_SIGMASK is defined on all architectures now\n" }, { "commit": "edd63a2763bdae0daa4f0a4d4c5d61d1154352a5", "tree": "a36c599628574280999af2d1e7bfe2a4a6969164", "parents": [ "6fd84c0831ec78d98736b76dc5e9b849f1dbfc9e" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Fri Apr 27 13:42:45 2012 -0400" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Fri Jun 01 12:58:50 2012 -0400" }, "message": "set_restore_sigmask() is never called without SIGPENDING (and never should be)\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "4ebefe3ec729003443daf153ed6fad1739271283", "tree": "cea05e7086314d200886fd3b76867e8fb5e6574b", "parents": [ "754421c8cab1a568be844a7069fe04c1cf6391b8" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Thu Apr 26 22:29:20 2012 -0400" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Fri Jun 01 12:58:47 2012 -0400" }, "message": "new helpers: {clear,test,test_and_clear}_restore_sigmask()\n\nhelpers parallel to set_restore_sigmask(), used in the next commits\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "bb8ac181a5cf50458a0d83b4460790badc9fdc16", "tree": "d55493f9ca94516a0aa83dd8ee1d87c2a88d637b", "parents": [ "1dfb5751a4de7c6a57a5602e8e2b87267cfc8c81" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Sat May 19 10:25:23 2012 -0400" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Wed May 30 21:04:50 2012 -0400" }, "message": "bury __kernel_nlink_t, make internal nlink_t consistent\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "fa2af6e4fe0c4d2f8875d42625b25675e8584010", "tree": "ef9a92949858ab763aa1bfda7cb11a5f7b84d123", "parents": [ "109b9b0408e5f1dd327a44f446841a9fbe0bcd83", "1fcb78e9da714d96f65edd37b29dae3b1f7df508" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 25 15:59:38 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 25 15:59:38 2012 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\nPull tile updates from Chris Metcalf:\n \"These changes cover a range of new arch/tile features and\n optimizations. They\u0027ve been through LKML review and on linux-next for\n a month or so. There\u0027s also one bug-fix that just missed 3.4, which\n I\u0027ve marked for stable.\"\n\nFixed up trivial conflict in arch/tile/Kconfig (new added tile Kconfig\nentries clashing with the generic timer/clockevents changes).\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n tile: default to tilegx_defconfig for ARCH\u003dtile\n tile: fix bug where fls(0) was not returning 0\n arch/tile: mark TILEGX as not EXPERIMENTAL\n tile/mm/fault.c: Port OOM changes to handle_page_fault\n arch/tile: add descriptive text if the kernel reports a bad trap\n arch/tile: allow querying cpu module information from the hypervisor\n arch/tile: fix hardwall for tilegx and generalize for idn and ipi\n arch/tile: support multiple huge page sizes dynamically\n mm: add new arch_make_huge_pte() method for tile support\n arch/tile: support kexec() for tilegx\n arch/tile: support \u003casm/cachectl.h\u003e header for cacheflush() syscall\n arch/tile: Allow tilegx to build with either 16K or 64K page size\n arch/tile: optimize get_user/put_user and friends\n arch/tile: support building big-endian kernel\n arch/tile: allow building Linux with transparent huge pages enabled\n arch/tile: use interrupt critical sections less\n" }, { "commit": "9f1d62bed7f015d11b9164078b7fea433b474114", "tree": "951254ba2d3ed4fef376351c4ed68b06be3b928d", "parents": [ "acd1a19e002790dd127b3ff86f95a4d269e7f1d0" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:32:09 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 15:00:43 2012 -0400" }, "message": "tile: fix bug where fls(0) was not returning 0\n\nThis is because __builtin_clz(0) returns 64 for the \"undefined\" case\nof 0, since the builtin just does a right-shift 32 and \"clz\" instruction.\nSo, use the alpha approach of casting to u32 and using __builtin_clzll().\n\nCc: stable@vger.kernel.org\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "8703d6e0fcfdcc9323d5316a443882e790efc1a6", "tree": "922eba4110aa5a0ce5f4d571a8fd29ac8c7e54ae", "parents": [ "b8ace0833feb308b1cb69d8b33ab08e0602dd2d2" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Mar 30 16:21:17 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:28 2012 -0400" }, "message": "arch/tile: allow querying cpu module information from the hypervisor\n\nThis just adds a few more attributes to the information Linux\ncan query from the hypervisor for the /sys/hypervisor/board/ directory,\nproviding part, serial#, revision#, and description for cpu modules\n(as opposed to the board itself, or any mezzanine boards).\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "b8ace0833feb308b1cb69d8b33ab08e0602dd2d2", "tree": "f65f6914dd2c5d7dcdb233178ca5bc101003982d", "parents": [ "621b19551507c8fd9d721f4038509c5bb155a983" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Mar 30 16:01:48 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:27 2012 -0400" }, "message": "arch/tile: fix hardwall for tilegx and generalize for idn and ipi\n\nThe hardwall drain code was not properly implemented for tilegx,\njust tilepro, so you couldn\u0027t reliably restart an application that\nmade use of the udn.\n\nIn addition, the code was only applicable to the udn (user dynamic\nnetwork). On tilegx there is a second user network that is available\n(the \"idn\"), and there is support for having I/O shims deliver\nuser-level interrupts to applications (\"ipi\") which functions in a\nvery similar way to the inter-core permissions used for udn/idn.\nSo this change also generalizes the code from supporting just the udn\nto supports udn/idn/ipi on tilegx.\n\nBy default we now use /dev/hardwall/{udn,idn,ipi} with separate\nminor numbers for the three devices.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "621b19551507c8fd9d721f4038509c5bb155a983", "tree": "62d8d5e7a783364940153b4523fcfba821cee241", "parents": [ "d9ed9faac283a3be73f0e11a2ef49ee55aece4db" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Sun Apr 01 14:04:21 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:27 2012 -0400" }, "message": "arch/tile: support multiple huge page sizes dynamically\n\nThis change adds support for a new \"super\" bit in the PTE, using the new\narch_make_huge_pte() method. The Tilera hypervisor sees the bit set at a\ngiven level of the page table and gangs together 4, 16, or 64 consecutive\npages from that level of the hierarchy to create a larger TLB entry.\n\nOne extra \"super\" page size can be specified at each of the three levels\nof the page table hierarchy on tilegx, using the \"hugepagesz\" argument\non the boot command line. A new hypervisor API is added to allow Linux\nto tell the hypervisor how many PTEs to gang together at each level of\nthe page table.\n\nTo allow pre-allocating huge pages larger than the buddy allocator can\nhandle, this change modifies the Tilera bootmem support to put all of\nmemory on tilegx platforms into bootmem.\n\nAs part of this change I eliminate the vestigial CONFIG_HIGHPTE support,\nwhich never worked anyway, and eliminate the hv_page_size() API in favor\nof the standard vma_kernel_pagesize() API.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "fc0c49f5db640b9dfc7bb801892b5cbb7508a76a", "tree": "fc2ba1a5353385bf0f4e628ec107588b9e517e61", "parents": [ "cd6f32aa088f4d328e676c35f51b440f2fe5b98c" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 29 15:48:23 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:25 2012 -0400" }, "message": "arch/tile: support kexec() for tilegx\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "cd6f32aa088f4d328e676c35f51b440f2fe5b98c", "tree": "5668ff37a8690e5f5d919992756edb4466c37de2", "parents": [ "d5d14ed6f2db7287a5088e1350cf422bf72140b3" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 29 15:25:59 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:24 2012 -0400" }, "message": "arch/tile: support \u003casm/cachectl.h\u003e header for cacheflush() syscall\n\nWe already had a syscall that did some dcache flushing, but it was\nnot used in practice. Make it MIPS compatible instead so it can\ndo both the DCACHE and ICACHE actions. We have code that wants to\nbe able to use the ICACHE flush mode from userspace so this change\nenables that.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d5d14ed6f2db7287a5088e1350cf422bf72140b3", "tree": "19f0bc20bb6f1995a1e4f75dc58e388c047f7d23", "parents": [ "47d632f9f8f3ed62b21f725e98b726d65769b6d7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 29 13:58:43 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:24 2012 -0400" }, "message": "arch/tile: Allow tilegx to build with either 16K or 64K page size\n\nThis change introduces new flags for the hv_install_context()\nAPI that passes a page table pointer to the hypervisor. Clients\ncan explicitly request 4K, 16K, or 64K small pages when they\ninstall a new context. In practice, the page size is fixed at\nkernel compile time and the same size is always requested every\ntime a new page table is installed.\n\nThe \u003chv/hypervisor.h\u003e header changes so that it provides more abstract\nmacros for managing \"page\" things like PFNs and page tables. For\nexample there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old\nHV_PAGE_SIZE_SMALL. The various PFN routines have been eliminated and\nonly PA- or PTFN-based ones remain (since PTFNs are always expressed\nin fixed 2KB \"page\" size). The page-table management macros are\nrenamed with a leading underscore and take page-size arguments with\nthe presumption that clients will use those macros in some single\nplace to provide the \"real\" macros they will use themselves.\n\nI happened to notice the old hv_set_caching() API was totally broken\n(it assumed 4KB pages) so I changed it so it would nominally work\ncorrectly with other page sizes.\n\nTag modules with the page size so you can\u0027t load a module built with\na conflicting page size. (And add a test for SMP while we\u0027re at it.)\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "47d632f9f8f3ed62b21f725e98b726d65769b6d7", "tree": "9599e3a0106ee320b293be1dbc2d4dbb93b6e1ff", "parents": [ "1efea40d4172a2a475ccb29b59d6221e9d0c174b" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 29 13:39:51 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:23 2012 -0400" }, "message": "arch/tile: optimize get_user/put_user and friends\n\nUse direct load/store for the get_user/put_user.\n\nPreviously, we would call out to a helper routine that would do the\nappropriate thing and then return, handling the possible exception\ninternally. Now we inline the load or store, along with a \"we succeeded\"\nindication in a register; if the load or store faults, we write a\n\"we failed\" indication into the same register and then return to the\nfollowing instruction. This is more efficient and gives us more compact\ncode, as well as being more in line with what other architectures do.\n\nThe special futex assembly source file for TILE-Gx also disappears in\nthis change; we just use the same inlining idiom there as well, putting\nthe appropriate atomic operations directly into futex_atomic_op_inuser()\n(and thus into the FUTEX_WAIT function).\n\nThe underlying atomic copy_from_user, copy_to_user functions were\nrenamed using the (cryptic) x86 convention as copy_from_user_ll and\ncopy_to_user_ll.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "1efea40d4172a2a475ccb29b59d6221e9d0c174b", "tree": "8152b61bb3fa83eb3403bca5cb05731c1063e999", "parents": [ "73636b1aacb1a07e6fbe0d25e560e69b024a8e25" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 29 13:30:31 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:22 2012 -0400" }, "message": "arch/tile: support building big-endian kernel\n\nThe toolchain supports big-endian mode now, so add support for building\nthe kernel to run big-endian as well.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "73636b1aacb1a07e6fbe0d25e560e69b024a8e25", "tree": "9531c202c6b3f67fba1cd7ac2b83fa32c31fe197", "parents": [ "51007004f44c9588d70ffb77e1f52479bd5b0e37" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Mar 28 13:59:18 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:21 2012 -0400" }, "message": "arch/tile: allow building Linux with transparent huge pages enabled\n\nThe change adds some infrastructure for managing tile pmd\u0027s more generally,\nusing pte_pmd() and pmd_pte() methods to translate pmd values to and\nfrom ptes, since on TILEPro a pmd is really just a nested structure\nholding a pgd (aka pte). Several existing pmd methods are moved into\nthis framework, and a whole raft of additional pmd accessors are defined\nthat are used by the transparent hugepage framework.\n\nThe tile PTE now has a \"client2\" bit. The bit is used to indicate a\ntransparent huge page is in the process of being split into subpages.\n\nThis change also fixes a generic bug where the return value of the\ngeneric pmdp_splitting_flush() was incorrect.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "51007004f44c9588d70ffb77e1f52479bd5b0e37", "tree": "ddf8dd2f83554ecbe9de0c690cfab3889308397b", "parents": [ "76e10d158efb6d4516018846f60c2ab5501900bc" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 27 15:40:20 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 25 12:48:20 2012 -0400" }, "message": "arch/tile: use interrupt critical sections less\n\nIn general we want to avoid ever touching memory while within an\ninterrupt critical section, since the page fault path goes through\na different path from the hypervisor when in an interrupt critical\nsection, and we carefully decided with tilegx that we didn\u0027t need\nto support this path in the kernel. (On tilepro we did implement\nthat path as part of supporting atomic instructions in software.)\n\nIn practice we always need to touch the kernel stack, since that\u0027s\nwhere we store the interrupt state before releasing the critical\nsection, but this change cleans up a few things. The IRQ_ENABLE\nmacro is split up so that when we want to enable interrupts in a\ndeferred way (e.g. for cpu_idle or for interrupt return) we can\nread the per-cpu enable mask before entering the critical section.\nThe cache-migration code is changed to use interrupt masking instead\nof interrupt critical sections. And, the interrupt-entry code is\nchanged so that we defer loading \"tp\" from per-cpu data until after\nwe have released the interrupt critical section.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "07acfc2a9349a8ce45b236c2624dad452001966b", "tree": "c40f3eaac18a8320e65af220979223b5cd632b1b", "parents": [ "b5f4035adfffbcc6b478de5b8c44b618b3124aff", "322728e55aa7834e2fab2786b76df183c4843a12" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu May 24 16:17:30 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu May 24 16:17:30 2012 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm\n\nPull KVM changes from Avi Kivity:\n \"Changes include additional instruction emulation, page-crossing MMIO,\n faster dirty logging, preventing the watchdog from killing a stopped\n guest, module autoload, a new MSI ABI, and some minor optimizations\n and fixes. Outside x86 we have a small s390 and a very large ppc\n update.\n\n Regarding the new (for kvm) rebaseless workflow, some of the patches\n that were merged before we switch trees had to be rebased, while\n others are true pulls. In either case the signoffs should be correct\n now.\"\n\nFix up trivial conflicts in Documentation/feature-removal-schedule.txt\narch/powerpc/kvm/book3s_segment.S and arch/x86/include/asm/kvm_para.h.\n\nI suspect the kvm_para.h resolution ends up doing the \"do I have cpuid\"\ncheck effectively twice (it was done differently in two different\ncommits), but better safe than sorry ;)\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm: (125 commits)\n KVM: make asm-generic/kvm_para.h have an ifdef __KERNEL__ block\n KVM: s390: onereg for timer related registers\n KVM: s390: epoch difference and TOD programmable field\n KVM: s390: KVM_GET/SET_ONEREG for s390\n KVM: s390: add capability indicating COW support\n KVM: Fix mmu_reload() clash with nested vmx event injection\n KVM: MMU: Don\u0027t use RCU for lockless shadow walking\n KVM: VMX: Optimize %ds, %es reload\n KVM: VMX: Fix %ds/%es clobber\n KVM: x86 emulator: convert bsf/bsr instructions to emulate_2op_SrcV_nobyte()\n KVM: VMX: unlike vmcs on fail path\n KVM: PPC: Emulator: clean up SPR reads and writes\n KVM: PPC: Emulator: clean up instruction parsing\n kvm/powerpc: Add new ioctl to retreive server MMU infos\n kvm/book3s: Make kernel emulated H_PUT_TCE available for \"PR\" KVM\n KVM: PPC: bookehv: Fix r8/r13 storing in level exception handler\n KVM: PPC: Book3S: Enable IRQs during exit handling\n KVM: PPC: Fix PR KVM on POWER7 bare metal\n KVM: PPC: Fix stbux emulation\n KVM: PPC: bookehv: Use lwz/stw instead of PPC_LL/PPC_STL for 32-bit fields\n ...\n" }, { "commit": "ec0d7f18ab7b5097d7c0c8f3d909ca1031b9d5cd", "tree": "7d62c924592145f819ecaa5d60460a05a10dfdbd", "parents": [ "269af9a1a08d368b46d72e74126564d04c354f7e", "1dcc8d7ba235a316a056f993e88f0d18b92c60d9" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 23 10:59:07 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 23 10:59:07 2012 -0700" }, "message": "Merge branch \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\nPull fpu state cleanups from Ingo Molnar:\n \"This tree streamlines further aspects of FPU handling by eliminating\n the prepare_to_copy() complication and moving that logic to\n arch_dup_task_struct().\n\n It also fixes the FPU dumps in threaded core dumps, removes and old\n (and now invalid) assumption plus micro-optimizes the exit path by\n avoiding an FPU save for dead tasks.\"\n\nFixed up trivial add-add conflict in arch/sh/kernel/process.c that came\nin because we now do the FPU handling in arch_dup_task_struct() rather\nthan the legacy (and now gone) prepare_to_copy().\n\n* \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:\n x86, fpu: drop the fpu state during thread exit\n x86, xsave: remove thread_has_fpu() bug check in __sanitize_i387_state()\n coredump: ensure the fpu state is flushed for proper multi-threaded core dump\n fork: move the real prepare_to_copy() users to arch_dup_task_struct()\n" }, { "commit": "d79ee93de909dfb252279b9a95978bbda9a814a9", "tree": "bfccca60fd36259ff4bcc5e78a2c272fbd680065", "parents": [ "2ff2b289a695807e291e1ed9f639d8a3ba5f4254", "1c2927f18576d65631d8e0ddd19e1d023183222e" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 22 18:27:32 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 22 18:27:32 2012 -0700" }, "message": "Merge branch \u0027sched-core-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\nPull scheduler changes from Ingo Molnar:\n \"The biggest change is the cleanup/simplification of the load-balancer:\n instead of the current practice of architectures twiddling scheduler\n internal data structures and providing the scheduler domains in\n colorfully inconsistent ways, we now have generic scheduler code in\n kernel/sched/core.c:sched_init_numa() that looks at the architecture\u0027s\n node_distance() parameters and (while not fully trusting it) deducts a\n NUMA topology from it.\n\n This inevitably changes balancing behavior - hopefully for the better.\n\n There are various smaller optimizations, cleanups and fixlets as well\"\n\n* \u0027sched-core-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:\n sched: Taint kernel with TAINT_WARN after sleep-in-atomic bug\n sched: Remove stale power aware scheduling remnants and dysfunctional knobs\n sched/debug: Fix printing large integers on 32-bit platforms\n sched/fair: Improve the -\u003egroup_imb logic\n sched/nohz: Fix rq-\u003ecpu_load[] calculations\n sched/numa: Don\u0027t scale the imbalance\n sched/fair: Revert sched-domain iteration breakage\n sched/x86: Rewrite set_cpu_sibling_map()\n sched/numa: Fix the new NUMA topology bits\n sched/numa: Rewrite the CONFIG_NUMA sched domain support\n sched/fair: Propagate \u0027struct lb_env\u0027 usage into find_busiest_group\n sched/fair: Add some serialization to the sched_domain load-balance walk\n sched/fair: Let minimally loaded cpu balance the group\n sched: Change rq-\u003enr_running to unsigned int\n x86/numa: Check for nonsensical topologies on real hw as well\n x86/numa: Hard partition cpu topology masks on node boundaries\n x86/numa: Allow specifying node_distance() for numa\u003dfake\n x86/sched: Make mwait_usable() heed to \"idle\u003d\" kernel parameters properly\n sched: Update documentation and comments\n sched_rt: Avoid unnecessary dequeue and enqueue of pushable tasks in set_cpus_allowed_rt()\n" }, { "commit": "bf67f3a5c456a18f2e8d062f7e88506ef2cd9837", "tree": "2a2324b2572162059307db82f9238eeb25673a77", "parents": [ "226da0dbc84ed97f448523e2a4cb91c27fa68ed9", "203dacbdca977bedaba61ad2fca75d934060a5d5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 21 19:43:57 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 21 19:43:57 2012 -0700" }, "message": "Merge branch \u0027smp-hotplug-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\nPull smp hotplug cleanups from Thomas Gleixner:\n \"This series is merily a cleanup of code copied around in arch/* and\n not changing any of the real cpu hotplug horrors yet. I wish I\u0027d had\n something more substantial for 3.5, but I underestimated the lurking\n horror...\"\n\nFix up trivial conflicts in arch/{arm,sparc,x86}/Kconfig and\narch/sparc/include/asm/thread_info_32.h\n\n* \u0027smp-hotplug-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (79 commits)\n um: Remove leftover declaration of alloc_task_struct_node()\n task_allocator: Use config switches instead of magic defines\n sparc: Use common threadinfo allocator\n score: Use common threadinfo allocator\n sh-use-common-threadinfo-allocator\n mn10300: Use common threadinfo allocator\n powerpc: Use common threadinfo allocator\n mips: Use common threadinfo allocator\n hexagon: Use common threadinfo allocator\n m32r: Use common threadinfo allocator\n frv: Use common threadinfo allocator\n cris: Use common threadinfo allocator\n x86: Use common threadinfo allocator\n c6x: Use common threadinfo allocator\n fork: Provide kmemcache based thread_info allocator\n tile: Use common threadinfo allocator\n fork: Provide weak arch_release_[task_struct|thread_info] functions\n fork: Move thread info gfp flags to header\n fork: Remove the weak insanity\n sh: Remove cpu_idle_wait()\n ...\n" }, { "commit": "55ccf3fe3f9a3441731aa79cf42a628fc4ecace9", "tree": "fc1baa880f32e9da083998bda8aefc335846fd52", "parents": [ "36be50515fe2aef61533b516fa2576a2c7fe7664" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Wed May 16 15:03:51 2012 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Wed May 16 15:16:26 2012 -0700" }, "message": "fork: move the real prepare_to_copy() users to arch_dup_task_struct()\n\nHistorical prepare_to_copy() is mostly a no-op, duplicated for majority of\nthe architectures and the rest following the x86 model of flushing the extended\nregister state like fpu there.\n\nRemove it and use the arch_dup_task_struct() instead.\n\nSuggested-by: Oleg Nesterov \u003coleg@redhat.com\u003e\nSuggested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLink: http://lkml.kernel.org/r/1336692811-30576-1-git-send-email-suresh.b.siddha@intel.com\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Koichi Yasutake \u003cyasutake.koichi@jp.panasonic.com\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Haavard Skinnemoen \u003chskinnemoen@gmail.com\u003e\nCc: Mike Frysinger \u003cvapier@gentoo.org\u003e\nCc: Mark Salter \u003cmsalter@redhat.com\u003e\nCc: Aurelien Jacquiot \u003ca-jacquiot@ti.com\u003e\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: Yoshinori Sato \u003cysato@users.sourceforge.jp\u003e\nCc: Richard Kuo \u003crkuo@codeaurora.org\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Jonas Bonn \u003cjonas@southpole.se\u003e\nCc: James E.J. Bottomley \u003cjejb@parisc-linux.org\u003e\nCc: Helge Deller \u003cdeller@gmx.de\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Lennox Wu \u003clennox.wu@gmail.com\u003e\nCc: David S. Miller \u003cdavem@davemloft.net\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Richard Weinberger \u003crichard@nod.at\u003e\nCc: Guan Xuetao \u003cgxt@mprc.pku.edu.cn\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "fc327e268fbef08e129ad51aa3a7113ee9bc6ba5", "tree": "ba75f2ac9509090c6896a4fbc6be7c3aaba1aaf6", "parents": [ "36be50515fe2aef61533b516fa2576a2c7fe7664" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Sat Apr 28 18:51:43 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 16 16:01:16 2012 -0400" }, "message": "arch/tile: fix up some issues in calling do_work_pending()\n\nFirst, we were at risk of handling thread-info flags, in particular\ndo_signal(), when returning from kernel space. This could happen\nafter a failed kernel_execve(), or when forking a kernel thread.\nThe fix is to test in do_work_pending() for user_mode() and return\nimmediately if so; we already had this test for one of the flags,\nso I just hoisted it to the top of the function.\n\nSecond, if a ptraced process updated the callee-saved registers\nin the ptregs struct and then processed another thread-info flag, we\nwould overwrite the modifications with the original callee-saved\nregisters. To fix this, we add a register to note if we\u0027ve already\nsaved the registers once, and skip doing it on additional passes\nthrough the loop. To avoid a performance hit from the couple of\nextra instructions involved, I modified the GET_THREAD_INFO() macro\nto be guaranteed to be one instruction, then bundled it with adjacent\ninstructions, yielding an overall net savings.\n\nReported-By: Al Viro \u003cviro@ZenIV.linux.org.uk\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "cb83b629bae0327cf9f44f096adc38d150ceb913", "tree": "13f7da07ee150a97c21aace57eaa817a30df9539", "parents": [ "bd939f45da24e25e08a8f5c993c50b1afada0fef" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Tue Apr 17 15:49:36 2012 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@kernel.org", "time": "Wed May 09 15:00:55 2012 +0200" }, "message": "sched/numa: Rewrite the CONFIG_NUMA sched domain support\n\nThe current code groups up to 16 nodes in a level and then puts an\nALLNODES domain spanning the entire tree on top of that. This doesn\u0027t\nreflect the numa topology and esp for the smaller not-fully-connected\nmachines out there today this might make a difference.\n\nTherefore, build a proper numa topology based on node_distance().\n\nSince there\u0027s no fixed numa layers anymore, the static SD_NODE_INIT\nand SD_ALLNODES_INIT aren\u0027t usable anymore, the new code tries to\nconstruct something similar and scales some values either on the\nnumber of cpus in the domain and/or the node_distance() ratio.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Anton Blanchard \u003canton@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: linux-alpha@vger.kernel.org\nCc: linux-ia64@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nCc: linux-mips@linux-mips.org\nCc: linuxppc-dev@lists.ozlabs.org\nCc: linux-sh@vger.kernel.org\nCc: Matt Turner \u003cmattst88@gmail.com\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: sparclinux@vger.kernel.org\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: x86@kernel.org\nCc: Dimitri Sivanich \u003csivanich@sgi.com\u003e\nCc: Greg Pearson \u003cgreg.pearson@hp.com\u003e\nCc: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: bob.picco@oracle.com\nCc: chris.mason@oracle.com\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nLink: http://lkml.kernel.org/n/tip-r74n3n8hhuc2ynbrnp3vt954@git.kernel.org\nSigned-off-by: Ingo Molnar \u003cmingo@kernel.org\u003e\n" }, { "commit": "d909a81b198a397593495508c4a5755fe95552fb", "tree": "a768be25c94b68d157d76d537a6bf763ea5fc076", "parents": [ "41101809a865dd0be1b56eff46c83fad321870b2" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Sat May 05 15:05:47 2012 +0000" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue May 08 13:55:20 2012 +0200" }, "message": "tile: Use common threadinfo allocator\n\nUse the core allocator and deal with the extra cleanup in\narch_release_thread_info().\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nLink: http://lkml.kernel.org/r/20120505150142.311126440@linutronix.de\n" }, { "commit": "05ef1b79d46347f94d9a78214cc745046c03e45a", "tree": "4e073d0958c86a1d1292c0563f706d5ee6091863", "parents": [ "a99cd1125189aaf31a7ee505d6208143482119eb" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Apr 25 12:45:26 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Apr 25 12:45:26 2012 -0400" }, "message": "arch/tile: fix a couple of functions that should be __init\n\nThey were marked __devinit by mistake, causing some warnings at link time.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "3b5d56b9317fa7b5407dff1aa7b115bf6cdbd494", "tree": "d733bab15dcf193c3364d14fc2d973aa20a28fe3", "parents": [ "eae3ee7d8a7c59cf63441dedf28674889f5fc477" ], "author": { "name": "Eric B Munson", "email": "emunson@mgebm.net", "time": "Sat Mar 10 14:37:26 2012 -0500" }, "committer": { "name": "Avi Kivity", "email": "avi@redhat.com", "time": "Sun Apr 08 12:48:59 2012 +0300" }, "message": "kvmclock: Add functions to check if the host has stopped the vm\n\nWhen a host stops or suspends a VM it will set a flag to show this. The\nwatchdog will use these functions to determine if a softlockup is real, or the\nresult of a suspended VM.\n\nSigned-off-by: Eric B Munson \u003cemunson@mgebm.net\u003e\nasm-generic changes Acked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n\n" }, { "commit": "ab306cae660e524edbeb8889e4e23d3c97717b9c", "tree": "c588cb46c9497e9271e8bc5b5b4f5e53244c6cf9", "parents": [ "b14f21906774be181627412fed5b6b5fae2b53a2" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Mar 30 15:46:29 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 12:13:49 2012 -0400" }, "message": "arch/tile: use atomic exchange in arch_write_unlock()\n\nThis idiom is used elsewhere when we do an unlock by writing a zero,\nbut I missed it here. Using an atomic operation avoids waiting\non the write buffer for the unlocking write to be sent to the home cache.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "e17235382dbb05f70146e141e4b780fd069050dc", "tree": "d4da45df23c48ac7e0e4f61821125174a39e436a", "parents": [ "5f639fdcd8c186c8128c616e94a7e7b159c968ae" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 29 14:52:00 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 12:12:48 2012 -0400" }, "message": "arch/tile: work around a hardware issue with the return-address stack\n\nIn certain circumstances we need to do a bunch of jump-and-link\ninstructions to fill the hardware return-address stack with nonzero values.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "5f639fdcd8c186c8128c616e94a7e7b159c968ae", "tree": "92b6f3658eeb428569baf3e8c4b0aee83d4ba077", "parents": [ "efb734d8ed040b053f53fd53589ed5d9c9b5cd04" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 29 14:06:14 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 12:12:45 2012 -0400" }, "message": "arch/tile: various bugs in stack backtracer\n\nFix a long-standing bug in the stack backtracer where we would print\ngarbage to the console instead of kernel function names, if the kernel\nwasn\u0027t built with symbol support (e.g. mboot).\n\nMake sure to tag every line of userspace backtrace output if we actually\nhave the mmap_sem, since that way if there\u0027s no tag, we know that it\u0027s\nbecause we couldn\u0027t trylock the semaphore.\n\nStop doing a TLB flush and examining page tables during backtrace.\nInstead, just trust that __copy_from_user_inatomic() will properly fault\nand return a failure, which it should do in all cases.\n\nFix a latent bug where the backtracer would directly examine a signal\ncontext in user space, rather than copying it safely to kernel memory\nfirst. This meant that a race with another thread could potentially\nhave caused a kernel panic.\n\nGuard against unaligned sp when trying to restart backtrace at an\ninterrupt or signal handler point in the kernel backtracer.\n\nReport kernel symbolic information for the call instruction rather\nthan for the following instruction. We still report the actual numeric\naddress corresponding to the instruction after the call, for the sake\nof consistency with the normal expectations for stack backtracers.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "cbe224705e573cead57c4d4bed0c91efb564a344", "tree": "a00eb56ac501668383793d5722e9e838c3baee4f", "parents": [ "664c100bce0070148131f8d49518015476c03cae" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 27 15:21:00 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 12:00:16 2012 -0400" }, "message": "arch/tile: use 0 for IRQ_RESCHEDULE instead of 1\n\nThis avoids assigning IRQ 0 to PCI devices, because we\u0027ve seen that\ndoesn\u0027t always work well.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "664c100bce0070148131f8d49518015476c03cae", "tree": "3c22063f673e5ec48788bb5ab6b736468dee63bc", "parents": [ "07feea877d18453bbe4ad47fe2a365eebf56a7af" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 27 14:17:05 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 12:00:15 2012 -0400" }, "message": "arch/tile: fix gcc 4.6 warnings in \u003casm/bitops_64.h\u003e\n\nFix some signedness and variable usage warnings in change_bit()\nand test_and_change_bit().\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "07feea877d18453bbe4ad47fe2a365eebf56a7af", "tree": "2e95bc9ccfd1754201266ae0e7e19b080191d642", "parents": [ "327e8b6b25588ab906856a4e506b28c59422f11b" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 27 14:10:03 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 12:00:15 2012 -0400" }, "message": "arch/tile: revert comment for atomic64_add_unless().\n\nIt still returns whether @v was not @u, not the old value,\nunlike __atomic_add_unless().\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arun Sharma \u003casharma@fb.com\u003e\n" }, { "commit": "327e8b6b25588ab906856a4e506b28c59422f11b", "tree": "f22c623e193a885bfa3fc2b278792167d9efbd09", "parents": [ "884197f7ea93dc2faf399060dc29cb0dbbda6937" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 27 14:04:57 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 12:00:14 2012 -0400" }, "message": "arch/tile: fix typo in \u003carch/spr_def.h\u003e\n\nWe aren\u0027t yet using this definition in the kernel, but fix it up\nbefore someone goes looking for it.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "34f2c0ac111aaf090c7d2432dab532640870733a", "tree": "3744df1dd437ecf3b0e4edf4bee2a9b4ed6e258b", "parents": [ "dd775ae2549217d3ae09363e3edb305d0fa19928" ], "author": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Sun Apr 01 16:38:46 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Apr 02 11:57:37 2012 -0400" }, "message": "tile: fix multiple build failures from system.h dismantle\n\nCommit bd119c69239322caafdb64517a806037d0d0c70a\n\n \"Disintegrate asm/system.h for Tile\"\n\ncreated the asm/switch_to.h file, but did not add an include\nof it to all its users.\n\nAlso, commit b4816afa3986704d1404fc48e931da5135820472\n\n \"Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h\"\n\nintroduced the concept of asm/cmpxchg.h but the tile arch\nnever got one. Fork the cmpxchg content out of the asm/atomic.h\nfile to create one.\n\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "50483c3268918ee51a56d1baa39b9149d2d0d521", "tree": "2fb9c927c319628ebddfd118c10df3e626bdd1c4", "parents": [ "7fda0412c5f7afdd1a5ff518f98dee5157266d8a", "1631fcea8399da5e80a80084b3b8c5bfd99d21e7" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 29 14:49:45 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 29 14:49:45 2012 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\nPull arch/tile (really asm-generic) update from Chris Metcalf:\n \"These are a couple of asm-generic changes that apply to tile.\"\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n compat: use sys_sendfile64() implementation for sendfile syscall\n [PATCH v3] ipc: provide generic compat versions of IPC syscalls\n" }, { "commit": "532bfc851a7475fb6a36c1e953aa395798a7cca7", "tree": "a7892e5a31330dd59f31959efbe9fda1803784fd", "parents": [ "0195c00244dc2e9f522475868fa278c473ba7339", "8da00edc1069f01c34510fa405dc15d96c090a3f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 28 17:19:27 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 28 17:19:28 2012 -0700" }, "message": "Merge branch \u0027akpm\u0027 (Andrew\u0027s patch-bomb)\n\nMerge third batch of patches from Andrew Morton:\n - Some MM stragglers\n - core SMP library cleanups (on_each_cpu_mask)\n - Some IPI optimisations\n - kexec\n - kdump\n - IPMI\n - the radix-tree iterator work\n - various other misc bits.\n\n \"That\u0027ll do for -rc1. I still have ~10 patches for 3.4, will send\n those along when they\u0027ve baked a little more.\"\n\n* emailed from Andrew Morton \u003cakpm@linux-foundation.org\u003e: (35 commits)\n backlight: fix typo in tosa_lcd.c\n crc32: add help text for the algorithm select option\n mm: move hugepage test examples to tools/testing/selftests/vm\n mm: move slabinfo.c to tools/vm\n mm: move page-types.c from Documentation to tools/vm\n selftests/Makefile: make `run_tests\u0027 depend on `all\u0027\n selftests: launch individual selftests from the main Makefile\n radix-tree: use iterators in find_get_pages* functions\n radix-tree: rewrite gang lookup using iterator\n radix-tree: introduce bit-optimized iterator\n fs/proc/namespaces.c: prevent crash when ns_entries[] is empty\n nbd: rename the nbd_device variable from lo to nbd\n pidns: add reboot_pid_ns() to handle the reboot syscall\n sysctl: use bitmap library functions\n ipmi: use locks on watchdog timeout set on reboot\n ipmi: simplify locking\n ipmi: fix message handling during panics\n ipmi: use a tasklet for handling received messages\n ipmi: increase KCS timeouts\n ipmi: decrease the IPMI message transaction time in interrupt mode\n ...\n" }, { "commit": "3fc498f165304dc913f1d13b5ac9ab4c758ee7ab", "tree": "c8c23d2255151d593383e3e3e62900073c6afd78", "parents": [ "d15cab975459fb6092eeba1be72c13621337784f" ], "author": { "name": "Gilad Ben-Yossef", "email": "gilad@benyossef.com", "time": "Wed Mar 28 14:42:43 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 28 17:14:35 2012 -0700" }, "message": "smp: introduce a generic on_each_cpu_mask() function\n\nWe have lots of infrastructure in place to partition multi-core systems\nsuch that we have a group of CPUs that are dedicated to specific task:\ncgroups, scheduler and interrupt affinity, and cpuisol\u003d boot parameter.\nStill, kernel code will at times interrupt all CPUs in the system via IPIs\nfor various needs. These IPIs are useful and cannot be avoided\naltogether, but in certain cases it is possible to interrupt only specific\nCPUs that have useful work to do and not the entire system.\n\nThis patch set, inspired by discussions with Peter Zijlstra and Frederic\nWeisbecker when testing the nohz task patch set, is a first stab at trying\nto explore doing this by locating the places where such global IPI calls\nare being made and turning the global IPI into an IPI for a specific group\nof CPUs. The purpose of the patch set is to get feedback if this is the\nright way to go for dealing with this issue and indeed, if the issue is\neven worth dealing with at all. Based on the feedback from this patch set\nI plan to offer further patches that address similar issue in other code\npaths.\n\nThis patch creates an on_each_cpu_mask() and on_each_cpu_cond()\ninfrastructure API (the former derived from existing arch specific\nversions in Tile and Arm) and uses them to turn several global IPI\ninvocation to per CPU group invocations.\n\nCore kernel:\n\non_each_cpu_mask() calls a function on processors specified by cpumask,\nwhich may or may not include the local processor.\n\nYou must not call this function with disabled interrupts or from a\nhardware interrupt handler or from a bottom half handler.\n\narch/arm:\n\nNote that the generic version is a little different then the Arm one:\n\n1. It has the mask as first parameter\n2. It calls the function on the calling CPU with interrupts disabled,\n but this should be OK since the function is called on the other CPUs\n with interrupts disabled anyway.\n\narch/tile:\n\nThe API is the same as the tile private one, but the generic version\nalso calls the function on the with interrupts disabled in UP case\n\nThis is OK since the function is called on the other CPUs\nwith interrupts disabled.\n\nSigned-off-by: Gilad Ben-Yossef \u003cgilad@benyossef.com\u003e\nReviewed-by: Christoph Lameter \u003ccl@linux.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Pekka Enberg \u003cpenberg@kernel.org\u003e\nCc: Matt Mackall \u003cmpm@selenic.com\u003e\nCc: Rik van Riel \u003criel@redhat.com\u003e\nCc: Andi Kleen \u003candi@firstfloor.org\u003e\nCc: Sasha Levin \u003clevinsasha928@gmail.com\u003e\nCc: Mel Gorman \u003cmel@csn.ul.ie\u003e\nCc: Alexander Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nAcked-by: Michal Nazarewicz \u003cmina86@mina86.org\u003e\nCc: Kosaki Motohiro \u003ckosaki.motohiro@gmail.com\u003e\nCc: Milton Miller \u003cmiltonm@bga.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nAcked-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "141124c02059eee9dbc5c86ea797b1ca888e77f7", "tree": "ee5feb86df07f0f0de1350dd569767ec31537869", "parents": [ "9ffc93f203c18a70623f21950f1dd473c9ec48cd" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:03 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:03 2012 +0100" }, "message": "Delete all instances of asm/system.h\n\nDelete all instances of asm/system.h as they should be redundant by this\npoint.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\n" }, { "commit": "bd119c69239322caafdb64517a806037d0d0c70a", "tree": "b0f03cfa94bd35597302f42644b9220eb71baf5a", "parents": [ "d550bbd40c0e10aefa05103dadbe0ae42e683707" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:03 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:03 2012 +0100" }, "message": "Disintegrate asm/system.h for Tile\n\nDisintegrate asm/system.h for Tile.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "a24401bcf4a67c8fe17e649e74eeb09b08b79ef5", "tree": "c4b1be87e0a63057e85ae82076d54c437313b1f8", "parents": [ "589973a7042f5a91a5b8bf78a32c97ae073e2c72" ], "author": { "name": "Cong Wang", "email": "amwang@redhat.com", "time": "Sat Nov 26 10:53:39 2011 +0800" }, "committer": { "name": "Cong Wang", "email": "xiyou.wangcong@gmail.com", "time": "Tue Mar 20 21:48:30 2012 +0800" }, "message": "highmem: kill all __kmap_atomic()\n[swarren@nvidia.com: highmem: Fix ARM build break due to __kmap_atomic rename]\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Cong Wang \u003camwang@redhat.com\u003e\n" }, { "commit": "48b25c43e6eebb6c0edf72935e8720385beca76b", "tree": "d1c774a79ef5a8373b093479c3dabe9bf16aec07", "parents": [ "fde7d9049e55ab85a390be7f415d74c9f62dd0f9" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 15 13:13:38 2012 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 15 13:13:38 2012 -0400" }, "message": "[PATCH v3] ipc: provide generic compat versions of IPC syscalls\n\nWhen using the \"compat\" APIs, architectures will generally want to\nbe able to make direct syscalls to msgsnd(), shmctl(), etc., and\nin the kernel we would want them to be handled directly by\ncompat_sys_xxx() functions, as is true for other compat syscalls.\n\nHowever, for historical reasons, several of the existing compat IPC\nsyscalls do not do this. semctl() expects a pointer to the fourth\nargument, instead of the fourth argument itself. msgsnd(), msgrcv()\nand shmat() expect arguments in different order.\n\nThis change adds an ARCH_WANT_OLD_COMPAT_IPC config option that can be\nset to preserve this behavior for ports that use it (x86, sparc, powerpc,\ns390, and mips). No actual semantics are changed for those architectures,\nand there is only a minimal amount of code refactoring in ipc/compat.c.\n\nNewer architectures like tile (and perhaps future architectures such\nas arm64 and unicore64) should not select this option, and thus can\navoid having any IPC-specific code at all in their architecture-specific\ncompat layer. In the same vein, if this option is not selected, IPC_64\nmode is assumed, since that\u0027s what the \u003casm-generic\u003e headers expect.\n\nThe workaround code in \"tile\" for msgsnd() and msgrcv() is removed\nwith this change; it also fixes the bug that shmat() and semctl() were\nnot being properly handled.\n\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "dca88ad6915b65f6e037f8c3e632fcd92a70bd88", "tree": "a3dcbe53310997dcc37c7d49129c48febef53992", "parents": [ "fed474857efbed79cd390d0aee224231ca718f63", "1632b9e2a14ce9f4e08faf6c4380431d63319bd3" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 14 18:03:30 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 14 18:03:30 2012 -0800" }, "message": "Merge branch \u0027for-next\u0027 of git://git.infradead.org/users/dhowells/linux-headers\n\n* \u0027for-next\u0027 of git://git.infradead.org/users/dhowells/linux-headers:\n UAPI: Split trivial #if defined(__KERNEL__) \u0026\u0026 X conditionals\n UAPI: Don\u0027t have a #elif clause in a __KERNEL__ guard in linux/soundcard.h\n UAPI: Fix AHZ multiple inclusion when __KERNEL__ is removed\n UAPI: Make linux/patchkey.h easier to parse\n UAPI: Fix nested __KERNEL__ guards in video/edid.h\n UAPI: Alter the S390 asm include guards to be recognisable by the UAPI splitter\n UAPI: Guard linux/cuda.h\n UAPI: Guard linux/pmu.h\n UAPI: Guard linux/isdn_divertif.h\n UAPI: Guard linux/sound.h\n UAPI: Rearrange definition of HZ in asm-generic/param.h\n UAPI: Make FRV use asm-generic/param.h\n UAPI: Make M32R use asm-generic/param.h\n UAPI: Make MN10300 use asm-generic/param.h\n UAPI: elf_read_implies_exec() is a kernel-only feature - so hide from userspace\n UAPI: Don\u0027t include linux/compat.h in sparc\u0027s asm/siginfo.h\n UAPI: Fix arch/mips/include/asm/Kbuild to have separate header-y lines\n" }, { "commit": "7b67e751479d50b7f84d1a3cc5216eed5e534b66", "tree": "a1a6746857cf65f04dde739fe271bf4143d55eaf", "parents": [ "9f13a1fd452f11c18004ba2422a6384b424ec8a9", "76ccc297018d25d55b789bbd508861ef1e2cdb0c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jan 11 18:50:26 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jan 11 18:50:26 2012 -0800" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)\n x86/PCI: Expand the x86_msi_ops to have a restore MSIs.\n PCI: Increase resource array mask bit size in pcim_iomap_regions()\n PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES\n PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)\n PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB\n x86/PCI: amd: factor out MMCONFIG discovery\n PCI: Enable ATS at the device state restore\n PCI: msi: fix imbalanced refcount of msi irq sysfs objects\n PCI: kconfig: English typo in pci/pcie/Kconfig\n PCI/PM/Runtime: make PCI traces quieter\n PCI: remove pci_create_bus()\n xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources\n x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()\n x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()\n x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan\n sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources\n sparc/PCI: convert to pci_create_root_bus()\n sh/PCI: convert to pci_scan_root_bus() for correct root bus resources\n powerpc/PCI: convert to pci_create_root_bus()\n powerpc/PCI: split PHB part out of pcibios_map_io_space()\n ...\n\nFix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due\nto the same patches being applied in other branches.\n" }, { "commit": "e343a895a9f342f239c5e3c5ffc6c0b1707e6244", "tree": "46c81c6ae375b1f14e209b13c8ac020842807ece", "parents": [ "06792c4dde2ad143928cc95c1ba218c6269c494b", "193a667fba76b3df482cbf865228e26ee246e889" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 18:04:27 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 18:04:27 2012 -0800" }, "message": "Merge tag \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost\n\nlib: use generic pci_iomap on all architectures\n\nMany architectures don\u0027t want to pull in iomap.c,\nso they ended up duplicating pci_iomap from that file.\nThat function isn\u0027t trivial, and we are going to modify it\nhttps://lkml.org/lkml/2011/11/14/183\nso the duplication hurts.\n\nThis reduces the scope of the problem significantly,\nby moving pci_iomap to a separate file and\nreferencing that from all architectures.\n\n* tag \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:\n alpha: drop pci_iomap/pci_iounmap from pci-noop.c\n mn10300: switch to GENERIC_PCI_IOMAP\n mn10300: add missing __iomap markers\n frv: switch to GENERIC_PCI_IOMAP\n tile: switch to GENERIC_PCI_IOMAP\n tile: don\u0027t panic on iomap\n sparc: switch to GENERIC_PCI_IOMAP\n sh: switch to GENERIC_PCI_IOMAP\n powerpc: switch to GENERIC_PCI_IOMAP\n parisc: switch to GENERIC_PCI_IOMAP\n mips: switch to GENERIC_PCI_IOMAP\n microblaze: switch to GENERIC_PCI_IOMAP\n arm: switch to GENERIC_PCI_IOMAP\n alpha: switch to GENERIC_PCI_IOMAP\n lib: add GENERIC_PCI_IOMAP\n lib: move GENERIC_IOMAP to lib/Kconfig\n\nFix up trivial conflicts due to changes nearby in arch/{m68k,score}/Kconfig\n" }, { "commit": "cf1c5230cee13a29afb1183796ed2fe124e7b6c0", "tree": "945194e2f81e73ef921959bb1fd50bb6f07ad312", "parents": [ "ba232a1fe4d4bca18efc8966e08dbf85abf11519" ], "author": { "name": "Myron Stowe", "email": "mstowe@redhat.com", "time": "Fri Oct 28 15:48:17 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:40 2012 -0800" }, "message": "PCI: TILE: convert pcibios_set_master() to a non-inlined function\n\nThis patch converts TILE\u0027s architecture-specific \u0027pcibios_set_master()\u0027\nroutine to a non-inlined function. This will allow follow on patches\nto create a generic \u0027pcibios_set_master()\u0027 function using the \u0027__weak\u0027\nattribute which can be used by all architectures as a default which,\nif necessary, can then be over-ridden by architecture-specific code.\n\nConverting \u0027pci_bios_set_master()\u0027 to a non-inlined function will\nallow TILE\u0027s \u0027pcibios_set_master()\u0027 implementation to remain\narchitecture-specific after the generic version is introduced and\nthus, not change current behavior.\n\nNo functional change.\n\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1632b9e2a14ce9f4e08faf6c4380431d63319bd3", "tree": "572e45a2de74d233af5d98242bafbd193e074f43", "parents": [ "fdc29805bd7cae133303045fc0249d76f3827613" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Tue Dec 13 15:07:49 2011 +0000" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Tue Dec 13 15:07:49 2011 +0000" }, "message": "UAPI: Split trivial #if defined(__KERNEL__) \u0026\u0026 X conditionals\n\nSplit trivial #if defined(__KERNEL__) \u0026\u0026 X conditionals to make automated\ndisintegration easier.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\n" }, { "commit": "845501213033d0058945776349f15502823359d8", "tree": "549adde58442e159de0d782c48608a98a21bef3a", "parents": [ "8593dd375ad10045e69b7b43fc1d885929aebbd5" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@redhat.com", "time": "Tue Nov 29 20:42:56 2011 +0200" }, "committer": { "name": "Michael S. Tsirkin", "email": "mst@redhat.com", "time": "Sun Dec 04 16:00:10 2011 +0200" }, "message": "tile: switch to GENERIC_PCI_IOMAP\n\ntile now has working stubs for ioport_map and ioremap\nsuch that the generic pci_iomap will DTRT: cast to\npointer on memory and return NULL and log message on IO map.\n\nSwitch it over to GENERIC_PCI_IOMAP.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\n" }, { "commit": "8593dd375ad10045e69b7b43fc1d885929aebbd5", "tree": "25ccfe27ef7eb4532b0e58e8c1c036b75c5ffd25", "parents": [ "a21a2fd4036f9a572415a7543896a1163c211ee5" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@redhat.com", "time": "Tue Nov 29 20:40:42 2011 +0200" }, "committer": { "name": "Michael S. Tsirkin", "email": "mst@redhat.com", "time": "Sun Dec 04 16:00:07 2011 +0200" }, "message": "tile: don\u0027t panic on iomap\n\nI think panic on iomap is there just for debugging.\nIf we return NULL instead, the generic pci_iomap will\nDTRT so we don\u0027t need to roll our own.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\n" }, { "commit": "0c90547b4a3fcee184db4d54ffc1a4fb17fd54d6", "tree": "bbd952d786eecfaf5dd563fa185e0789dcedff44", "parents": [ "781a5e92bc3b666bc5752e3ce7e977978c2f64e9" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Dec 01 12:58:19 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Sat Dec 03 15:31:49 2011 -0500" }, "message": "arch/tile: use new generic {enable,disable}_percpu_irq() routines\n\nWe provided very similar routines internally, but now we can hook\ninto the generic framework by supplying our routines as function\npointers in the irq_chip structure instead.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "eb7c792da5afa3b9ec3e802c30952f82d2e9722b", "tree": "db796193297d4cc14bdb4d2b8001750a1f515f17", "parents": [ "aeddea5d37d86d38c7a347110d8a052e9f45d955" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Nov 02 23:02:17 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Nov 03 16:58:54 2011 -0400" }, "message": "arch/tile: factor out \u003carch/opcode.h\u003e header\n\nThe kernel code was using some \u003casm\u003e headers that included a mix\nof hardware-specific information (typically found in Tilera \u003carch\u003e\nheaders) and structures, enums, and function declarations supporting\nthe disassembly function of the tile-desc.c sources.\n\nThis change refactors that code so that a hardware-specific, but\nOS- and application-agnostic header, is created: \u003carch/opcode.h\u003e.\nThis header is then exported to userspace along with the other\n\u003carch\u003e headers and can be used to build userspace code; in particular,\nit is used by glibc as part of implementing the backtrace() function.\n\nThe new header, together with a header that specifically describes\nthe disassembly code (\u003casm/tile-desc.h\u003e with _32 and _64 variants),\nreplaces the old \u003casm/opcode-tile*.h\u003e and \u003casm/opcode_constants*.h\u003e\nheaders.\n\nAs part of this change, we are also renaming the 32-bit constants\nfrom TILE_xxx to TILEPRO_xxx to better reflect the fact that they\nare specific to the TILEPro architecture, and not to TILE-Gx\nand any successor \"tile\" architecture chips.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "aeddea5d37d86d38c7a347110d8a052e9f45d955", "tree": "61ae9fde092747dc5525262fac2a3b35fbe02203", "parents": [ "f319d6e238a25d84af530a6a2526525c7041463f" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Nov 02 22:33:07 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Nov 03 16:58:48 2011 -0400" }, "message": "arch/tile: add the \u003carch\u003e headers to the set of installed kernel headers\n\nThese headers are similar to the \u003casm\u003e headers that describe kernel\nAPIs, but instead describe aspects of the actual hardware in an\nOS- and application-independent manner. We need to include them in\nthe set of installed headers so that userspace tools (including glibc)\ncan build purely from the provided kernel headers.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "e0b1f39d55864547242b4e4edb86d737bca3a249", "tree": "b8cae9e5dc2e97c50a136d2345789ddd31ffdbfa", "parents": [ "c3b92c8787367a8bb53d57d9789b558f1295cc96" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Nov 02 22:19:25 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Nov 03 16:58:36 2011 -0400" }, "message": "arch/tile: avoid ISO namespace pollution with \u003casm/sigcontext.h\u003e\n\n\u003casm/sigcontext.h\u003e is used by glibc\u0027s \u003cbits/sigcontext.h\u003e from \u003csignal.h\u003e,\nwhich means that it can\u0027t clutter the namespace with random symbols\nor #defines. However, we use \u003carch/abi.h\u003e to get a suitable type to\nhold a machine register.\n\nThis change makes \u003carch/abi.h\u003e safe to use in this kind of context\nif __need_int_reg_t is defined prior to including the file; in that\ncase, it only defines a few symbols that are safe in the ISO namespace\n(prefixed with double underscores). \u003casm/sigcontext.h\u003e then uses\nthe __uint_reg_t type instead of the normal uint_reg_t.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "1850536b93888e6cc3ee42e63e20e61f35f8b3e2", "tree": "7b78bf5196ca79f52f0fd7c932ea8062c91ff154", "parents": [ "ed8f37370d83e695c0a4fa5d5fc7a83ecb947526", "d1afa65ca59d4e6a5f1a8c1ab9bfa73f2fa8b777" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 02 21:16:11 2011 -1000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 02 21:16:11 2011 -1000" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n arch/tile/mm/init.c: trivial: use BUG_ON\n arch/tile: remove useless set_fixmap_nocache() macro\n arch/tile: add hypervisor-based character driver for SPI flash ROM\n ioctl-number.txt: add the tile hardwall ioctl range\n tile: use generic-y format for one-line asm-generic headers\n clocksource: tile: convert to use clocksource_register_hz\n" }, { "commit": "3d071cd313643cf82b1ce1ce4fdf08d63ad53964", "tree": "874c1683f32f07614aa123f6ca5cf6c2bd443704", "parents": [ "cf8e98d15361f8c594da00a3f7a500787fc1a426", "02f8c6aee8df3cdc935e9bdd4f2d020306035dbe" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Aug 02 16:14:02 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Aug 02 16:14:02 2011 -0400" }, "message": "Merge tag \u0027v3.0\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-linus\n" }, { "commit": "7847777a45f9f8bfc8617dbf107bde1ecb59caee", "tree": "f9e31828db79e607a763f1eaea2119b2f270dcdb", "parents": [ "f24219b4e90cf70ec4a211b17fbabc725a0ddf3c" ], "author": { "name": "Arun Sharma", "email": "asharma@fb.com", "time": "Tue Jul 26 16:09:08 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 16:49:47 2011 -0700" }, "message": "atomic: cleanup asm-generic atomic*.h inclusion\n\nAfter changing all consumers of atomics to include \u003clinux/atomic.h\u003e, we\nran into some compile time errors due to this dependency chain:\n\nlinux/atomic.h\n -\u003e asm/atomic.h\n -\u003e asm-generic/atomic-long.h\n\nwhere atomic-long.h could use funcs defined later in linux/atomic.h\nwithout a prototype. This patches moves the code that includes\nasm-generic/atomic*.h to linux/atomic.h.\n\nArchs that need \u003casm-generic/atomic64.h\u003e need to select\nCONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it\nunconditionally).\n\nCompile tested on i386 and x86_64 with allnoconfig.\n\nSigned-off-by: Arun Sharma \u003casharma@fb.com\u003e\nCc: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Mike Frysinger \u003cvapier@gentoo.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "f24219b4e90cf70ec4a211b17fbabc725a0ddf3c", "tree": "c1c753bd425d61a5094995d9835b23b46383d9b2", "parents": [ "60063497a95e716c9a689af3be2687d261f115b4" ], "author": { "name": "Arun Sharma", "email": "asharma@fb.com", "time": "Tue Jul 26 16:09:07 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 16:49:47 2011 -0700" }, "message": "atomic: move atomic_add_unless to generic code\n\nThis is in preparation for more generic atomic primitives based on\n__atomic_add_unless.\n\nSigned-off-by: Arun Sharma \u003casharma@fb.com\u003e\nSigned-off-by: Hans-Christian Egtvedt \u003chans-christian.egtvedt@atmel.com\u003e\nReviewed-by: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Mike Frysinger \u003cvapier@gentoo.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "60063497a95e716c9a689af3be2687d261f115b4", "tree": "6ce0d68db76982c53df46aee5f29f944ebf2c320", "parents": [ "148817ba092f9f6edd35bad3c6c6b8e8f90fe2ed" ], "author": { "name": "Arun Sharma", "email": "asharma@fb.com", "time": "Tue Jul 26 16:09:06 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 16:49:47 2011 -0700" }, "message": "atomic: use \u003clinux/atomic.h\u003e\n\nThis allows us to move duplicated code in \u003casm/atomic.h\u003e\n(atomic_inc_not_zero() for now) to \u003clinux/atomic.h\u003e\n\nSigned-off-by: Arun Sharma \u003casharma@fb.com\u003e\nReviewed-by: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nAcked-by: Mike Frysinger \u003cvapier@gentoo.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "148817ba092f9f6edd35bad3c6c6b8e8f90fe2ed", "tree": "75cc7df62c9713bc1a44738026878a79653faa38", "parents": [ "b2c9cd3793e5878e301ec2219785a7b8ca402ef1" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Tue Jul 26 16:09:04 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 16:49:46 2011 -0700" }, "message": "asm-generic: add another generic ext2 atomic bitops\n\nThe majority of architectures implement ext2 atomic bitops as\ntest_and_{set,clear}_bit() without spinlock.\n\nThis adds this type of generic implementation in ext2-atomic-setbit.h and\nuse it wherever possible.\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nSuggested-by: Andreas Dilger \u003cadilger@dilger.ca\u003e\nSuggested-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "0e9a6cb5e66f4b23e2a8f6b3f00949b7b3125dda", "tree": "f5ae8bd305b7df5f9dcb75ea86b05174c3dc5b90", "parents": [ "778d3b0ff0654ad7092bf823fd32010066b12365" ], "author": { "name": "Mike Frysinger", "email": "vapier@gentoo.org", "time": "Tue Jul 26 16:08:31 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 16:49:43 2011 -0700" }, "message": "ptrace: unify show_regs() prototype\n\n[ poleg@redhat.com: no need to declare show_regs() in ptrace.h, sched.h does this ]\nSigned-off-by: Mike Frysinger \u003cvapier@gentoo.org\u003e\nCc: Tejun Heo \u003ctj@kernel.org\u003e\nSigned-off-by: Oleg Nesterov \u003coleg@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "c6830c22603aaecf65405af23f6da2d55892f9cb", "tree": "19458ebc7c32bef8a4ed59630cabb5785b1bdc11", "parents": [ "af4087e0e682df12bdffec5cfafc2fec9208716e" ], "author": { "name": "KAMEZAWA Hiroyuki", "email": "kamezawa.hiroyu@jp.fujitsu.com", "time": "Thu Jun 16 17:28:07 2011 +0900" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jun 27 14:13:09 2011 -0700" }, "message": "Fix node_start/end_pfn() definition for mm/page_cgroup.c\n\ncommit 21a3c96 uses node_start/end_pfn(nid) for detection start/end\nof nodes. But, it\u0027s not defined in linux/mmzone.h but defined in\n/arch/???/include/mmzone.h which is included only under\nCONFIG_NEED_MULTIPLE_NODES\u003dy.\n\nThen, we see\n mm/page_cgroup.c: In function \u0027page_cgroup_init\u0027:\n mm/page_cgroup.c:308: error: implicit declaration of function \u0027node_start_pfn\u0027\n mm/page_cgroup.c:309: error: implicit declaration of function \u0027node_end_pfn\u0027\n\nSo, fixiing page_cgroup.c is an idea...\n\nBut node_start_pfn()/node_end_pfn() is a very generic macro and\nshould be implemented in the same manner for all archs.\n(m32r has different implementation...)\n\nThis patch removes definitions of node_start/end_pfn() in each archs\nand defines a unified one in linux/mmzone.h. It\u0027s not under\nCONFIG_NEED_MULTIPLE_NODES, now.\n\nA result of macro expansion is here (mm/page_cgroup.c)\n\nfor !NUMA\n start_pfn \u003d ((\u0026contig_page_data)-\u003enode_start_pfn);\n end_pfn \u003d ({ pg_data_t *__pgdat \u003d (\u0026contig_page_data); __pgdat-\u003enode_start_pfn + __pgdat-\u003enode_spanned_pages;});\n\nfor NUMA (x86-64)\n start_pfn \u003d ((node_data[nid])-\u003enode_start_pfn);\n end_pfn \u003d ({ pg_data_t *__pgdat \u003d (node_data[nid]); __pgdat-\u003enode_start_pfn + __pgdat-\u003enode_spanned_pages;});\n\nChangelog:\n - fixed to avoid using \"nid\" twice in node_end_pfn() macro.\n\nReported-and-acked-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nReported-and-tested-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nAcked-by: Mel Gorman \u003cmgorman@suse.de\u003e\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "cf8e98d15361f8c594da00a3f7a500787fc1a426", "tree": "ec25cbd7e504b8264061efa743966f8a558285a6", "parents": [ "93ea927eb15b736fa4a431f789b1097318129d2a" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Jun 15 10:35:38 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Jun 15 10:35:38 2011 -0400" }, "message": "arch/tile: remove useless set_fixmap_nocache() macro\n\nTILE doesn\u0027t support PAGE_KERNEL_NOCACHE so the macro isn\u0027t useful;\nit\u0027s a copy-and-paste from the first version of this header in 2007.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "dbcb4a1a3f16702918caa4d4ab7062965050a780", "tree": "0b42ff1e6f8d82e07263975705d944bc4d41d184", "parents": [ "ea41b1e5440442cea5c029b192e9ebbe68e423f6" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 10 13:07:48 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 10 13:07:48 2011 -0400" }, "message": "arch/tile: add hypervisor-based character driver for SPI flash ROM\n\nThe first version of this patch proposed an arch/tile/drivers/ directory,\nbut the consensus was that this was probably a poor choice for a place to\ngroup Tilera-specific drivers, and that in any case grouping by platform\nwas discouraged, and grouping by function was preferred.\n\nThis version of the patch addresses various issues raised in the\ncommunity, primarily the absence of sysfs integration. The sysfs\nintegration now handles passing information on sector size, page size,\nand total partition size to userspace as well. In addition, we now\nuse a single \"struct cdev\" to manage all the partition minor devices,\nand dynamically discover the correct number of partitions from the\nhypervisor rather than using a module_param with a default value.\n\nThis driver has no particular \"peer\" drivers it can be grouped with.\nIt is sort of like an MTD driver for SPI ROM, but it doesn\u0027t group well\nwith the other MTD devices since it relies on hypervisor virtualization\nto handle many of the irritating aspects of flash ROM management: sector\nawareness, background read for sub-sector writes, bit examination to\ndetermine whether a sector erase needs to be issued, etc. It is in fact\nmore like an EEPROM driver, but the hypervisor virtualization does require\na \"flush\" command if you wish to commit a sector write prior to writing\nto a different sector, and this is sufficiently different from generic\nI2C/SPI EEPROMs that as a result it doesn\u0027t group well with them either.\n\nThe simple character device is already in use by a range of Tilera\nSPI ROM management tools, as well as by customers. In addition, using\nthe simple character device actually simplifies the userspace tools,\nsince they don\u0027t need to manage sector erase, background read, etc.\nThis both simplifies the code (since we can uniformly manage plain files\nand the SPI ROM) as well as makes the user code portable to non-Linux\nplatforms that don\u0027t offer the same MTD ioctls.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "2c007a9d8cb018a3ce2106342f2aff2abca2a3bd", "tree": "0502a0ec4f58d1e8316cf4594f25755390621fe3", "parents": [ "9f14517bd6f38cf4b48d742a0ac5db9d17edecba" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 03 17:36:18 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 03 17:36:18 2011 -0400" }, "message": "tile: use generic-y format for one-line asm-generic headers\n\nThis lets us remove a lot of one-line wrapper header files.\nSee commit d8ecc5cd8e227bc318513b5306ae88a474b8886d for context.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "f133ecca9cbb31b5e6e9bda27cbe3034fbf656df", "tree": "1887377b71ee9fc73d4e1226d1d9776ae5a5d7ad", "parents": [ "7a0287df3e83a0012dfc496d4a8af9c1c5b126ef" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 26 12:40:09 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 27 10:39:05 2011 -0400" }, "message": "arch/tile: more /proc and /sys file support\n\nThis change introduces a few of the less controversial /proc and\n/proc/sys interfaces for tile, along with sysfs attributes for\nvarious things that were originally proposed as /proc/tile files.\nIt also adjusts the \"hardwall\" proc API.\n\nArnd Bergmann reviewed the initial arch/tile submission, which\nincluded a complete set of all the /proc/tile and /proc/sys/tile\nknobs that we had added in a somewhat ad hoc way during initial\ndevelopment, and provided feedback on where most of them should go.\n\nOne knob turned out to be similar enough to the existing\n/proc/sys/debug/exception-trace that it was re-implemented to use\nthat model instead.\n\nAnother knob was /proc/tile/grid, which reported the \"grid\" dimensions\nof a tile chip (e.g. 8x8 processors \u003d 64-core chip). Arnd suggested\nlooking at sysfs for that, so this change moves that information\nto a pair of sysfs attributes (chip_width and chip_height) in the\n/sys/devices/system/cpu directory. We also put the \"chip_serial\"\nand \"chip_revision\" information from our old /proc/tile/board file\nas attributes in /sys/devices/system/cpu.\n\nOther information collected via hypervisor APIs is now placed in\n/sys/hypervisor. We create a /sys/hypervisor/type file (holding the\nconstant string \"tilera\") to be parallel with the Xen use of\n/sys/hypervisor/type holding \"xen\". We create three top-level files,\n\"version\" (the hypervisor\u0027s own version), \"config_version\" (the\nversion of the configuration file), and \"hvconfig\" (the contents of\nthe configuration file). The remaining information from our old\n/proc/tile/board and /proc/tile/switch files becomes an attribute\ngroup appearing under /sys/hypervisor/board/.\n\nFinally, after some feedback from Arnd Bergmann for the previous\nversion of this patch, the /proc/tile/hardwall file is split up into\ntwo conceptual parts. First, a directory /proc/tile/hardwall/ which\ncontains one file per active hardwall, each file named after the\nhardwall\u0027s ID and holding a cpulist that says which cpus are enclosed by\nthe hardwall. Second, a /proc/PID file \"hardwall\" that is either\nempty (for non-hardwall-using processes) or contains the hardwall ID.\n\nFinally, this change pushes the /proc/sys/tile/unaligned_fixup/\ndirectory, with knobs controlling the kernel code for handling the\nfixup of unaligned exceptions.\n\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "818d8462bb7c717706bcfe994258e2c3710d1fd0", "tree": "d597fe6369a03fdf0b8fc0c940579cbe1efab35e", "parents": [ "f4de51de2edcd26ec77bfc71b1f00b1de5a5dc20" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue May 17 15:52:22 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 19 22:56:13 2011 -0400" }, "message": "arch/tile: cleanups for tilegx compat mode\n\nThese changes make the syscall table line up correctly for\ntilegx compat mode, and remove the stale sys32_fadvise64() function,\nwhich isn\u0027t actually used by any syscall table.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "571d76acdab95876aeff869ab6449f826c23aa43", "tree": "b52ceacfa83b1ab4c5a6950007ce8be03cec192e", "parents": [ "8aaf1dda42576b0f8dffb004065baa806f4df9b6" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 16 14:23:44 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 19 22:55:59 2011 -0400" }, "message": "arch/tile: support signal \"exception-trace\" hook\n\nThis change adds support for /proc/sys/debug/exception-trace to tile.\nLike x86 and sparc, by default it is set to \"1\", generating a one-line\nprintk whenever a user process crashes. By setting it to \"2\", we get\na much more complete userspace diagnostic at crash time, including\na user-space backtrace, register dump, and memory dump around the\naddress of the crash.\n\nSome vestiges of the Tilera-internal version of this support are\nremoved with this patch (the show_crashinfo variable and the\narch_coredump_signal function). We retain a \"crashinfo\" boot parameter\nwhich allows you to set the boot-time value of exception-trace.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "8aaf1dda42576b0f8dffb004065baa806f4df9b6", "tree": "e9376caaf70b54e4b236840a1cc77a443c07b341", "parents": [ "4800a5bb13c09a572f7c74662a77c9eca229eba1" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 16 13:59:39 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 19 22:55:49 2011 -0400" }, "message": "arch/tile: use better definitions of xchg() and cmpxchg()\n\nThese definitions use a ({}) construct to avoid some cases where\nwe were getting warnings about unused return values. We also\npromote the definition to the common \u003casm/atomic.h\u003e, since it applies\nto both the 32- and 64-bit atomics.\n\nIn addition, define __HAVE_ARCH_CMPXCHG for TILE-Gx since it has\nefficient direct atomic instructions.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "18aecc2b645bbb07851b196452a2af314222069b", "tree": "959f765f69af01046c6e26db12b45c3390799d3e", "parents": [ "be84cb43833ee40a42e08f5425d20310f16229c7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:38:26 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 12 15:52:12 2011 -0400" }, "message": "arch/tile: finish enabling support for TILE-Gx 64-bit chip\n\nThis support was partially present in the existing code (look for\n\"__tilegx__\" ifdefs) but with this change you can build a working\nkernel using the TILE-Gx toolchain and ARCH\u003dtilegx.\n\nMost of these files are new, generally adding a foo_64.c file\nwhere previously there was just a foo_32.c file.\n\nThe ARCH\u003dtilegx directive redirects to arch/tile, not arch/tilegx,\nusing the existing SRCARCH mechanism in the top-level Makefile.\n\nChanges to existing files:\n\n- \u003casm/bitops.h\u003e and \u003casm/bitops_32.h\u003e changed to factor the\n include of \u003casm-generic/bitops/non-atomic.h\u003e in the common header.\n\n- \u003casm/compat.h\u003e and arch/tile/kernel/compat.c changed to remove\n the \"const\" markers I had put on compat_sys_execve() when trying\n to match some recent similar changes to the non-compat execve.\n It turns out the compat version wasn\u0027t \"upgraded\" to use const.\n\n- \u003casm/opcode-tile_64.h\u003e and \u003casm/opcode_constants_64.h\u003e were\n previously included accidentally, with the 32-bit contents. Now\n they have the proper 64-bit contents.\n\nFinally, I had to hack the existing hacky drivers/input/input-compat.h\nto add yet another \"#ifdef\" for INPUT_COMPAT_TEST (same as x86_64).\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Dmitry Torokhov \u003cdmitry.torokhov@gmail.com\u003e [drivers/input]\n" }, { "commit": "dc0b124d8edc6c2f95fc3a689cd40ec05ad85108", "tree": "1a64b5a0e4761c0fc3fb454d0385be52e69f0970", "parents": [ "ef0aaf873ebadd7576f4fb2085ec4557a9df8bf5" ], "author": { "name": "KOSAKI Motohiro", "email": "kosaki.motohiro@jp.fujitsu.com", "time": "Mon Apr 18 21:18:11 2011 +0900" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:41:44 2011 -0400" }, "message": "tile: replace mm-\u003ecpu_vm_mask with mm_cpumask()\n\nWe plan to change mm-\u003ecpu_vm_mask definition later. Thus, this patch convert\nit into proper macro.\n\nSigned-off-by: KOSAKI Motohiro \u003ckosaki.motohiro@jp.fujitsu.com\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "ef0aaf873ebadd7576f4fb2085ec4557a9df8bf5", "tree": "5915716fb8aaacb0226b18df9ea49a22258d30e4", "parents": [ "aaeb012fe4700cb808562c2daf7ccc464e7f18cf" ], "author": { "name": "James Hogan", "email": "james.hogan@imgtec.com", "time": "Mon Apr 04 16:21:47 2011 +0100" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:41:36 2011 -0400" }, "message": "tile,mn10300: add device parameter to dma_cache_sync()\n\nSince v2.6.20 \"Pass struct dev pointer to dma_cache_sync()\"\n(d3fa72e4556ec1f04e46a0d561d9e785ecaa173d), dma_cache_sync() takes a\nstruct dev pointer, but these appear to be missing from the tile and\nmn10300 implementations, so add them.\n\nSigned-off-by: James Hogan \u003cjames.hogan@imgtec.com\u003e\n[cmetcalf@tilera.com: took only the \"tile\" portion as I don\u0027t maintain mn10300]\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d07bd86d82622247dba8cc29974d3860f857ea33", "tree": "d6f1c7059c125e61ac7956e4c4bc4d58416a5096", "parents": [ "5386e735897afd8bcd332caf21a5f68d9e0e81c6" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 16:36:48 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:41:20 2011 -0400" }, "message": "arch/tile: clarify flush_buffer()/finv_buffer() function names\n\nThey are only applicable for locally-homecached memory ranges, so\nchange their names to {flush,finv}_buffer_local(). Change inv_buffer()\nto just do an mf instead of any kind of fancier barrier, since you\u0027re\nobviously not going to be waiting for anything once the local homecache\nis invalidated.\n\nFix tilepro.c network driver not to bother calling finv_buffer when\nstopping the EPP, but just mf after memset to ensure that it will not\nsee any packet data after we finish stopping; use finv_buffer_remote()\nwhen doing exit-time cleanup.\n\nThis also fixes a (not very interesting) generic Linux build failure\nwhere drivers/scsi/st.c declares its own flush_buffer().\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "5386e735897afd8bcd332caf21a5f68d9e0e81c6", "tree": "4149431c393c4aa5631d20790cdb238e718d5347", "parents": [ "28d717411badb78df71ecf087a07b93caf418f59" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 16:21:12 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:41:13 2011 -0400" }, "message": "arch/tile: kernel-related cleanups from removing static page size\n\nUser space code has been able to discover the static page size\nby including a special \u003chv/pagesize.h\u003e file. In the current release,\nthat file is now gone, and \u003casm/page.h\u003e doesn\u0027t rely on it. The\ngetpagesize() API is now the only way for userspace to get the page size.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "28d717411badb78df71ecf087a07b93caf418f59", "tree": "9ad835c19009726acecfa4c114e8a70ca10d5cd0", "parents": [ "dbb434214e34014dc7acb0e7811c37471df26a72" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 16:06:42 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:40:54 2011 -0400" }, "message": "arch/tile: various header improvements for building drivers\n\nThis change adds a number of missing headers in asm (fb.h, parport.h,\nserial.h, and vga.h) using the minimal generic versions.\n\nIt also adds a number of missing interfaces that showed up as build\nfailures when trying to build various drivers not normally included in the\n\"tile\" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(),\nvirt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(),\nand __pmd(). I also added a cast in virt_to_page() since not all callers\npass a pointer.\n\nI fixed \u003casm/stat.h\u003e to properly include a __KERNEL__ guard for the\n__ARCH_WANT_STAT64 symbol, and \u003casm/swab.h\u003e to use __builtin_bswap32()\neven for our 64-bit architecture, since the same code is produced.\n\nI added an export for get_cycles(), since it\u0027s used in some modules.\n\nAnd I made \u003carch/spr_def.h\u003e properly include the __KERNEL__ guard,\neven though it\u0027s not yet exported, since it likely will be soon.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "7194988fb5add6341b95f4501f6778bf27b4d3de", "tree": "8271874e8ffeb61927b94f5d8a48d76db7e43a0b", "parents": [ "df29ccb6c06dcb65867d4fd3c2fa473017f60ecc" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 15:22:18 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:40:16 2011 -0400" }, "message": "arch/tile: disable SD_WAKE_AFFINE flag on CPU/NODE scheduling domain\n\nThis allows processes to spread more effectively to multiple cores\n(particularly important on 64-core chips!).\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "398fa5a9319797e43f67b215337afe62e39475ef", "tree": "44d966997a6baa6b75a176526d981e3ffb32e471", "parents": [ "313ce674d3cbc2d48ed34a9462427920ac54f4ad" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 15:09:42 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:39:53 2011 -0400" }, "message": "arch/tile: improve support for PCI hotplug\n\nNote that this is not complete hot-plug support; hot-unplug is not included.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "313ce674d3cbc2d48ed34a9462427920ac54f4ad", "tree": "7478150a1268c79851f1a366158c59606330e700", "parents": [ "93013a0f533fb3dd6875ca670d8e0bb4166a796e" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 14:50:06 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 18:53:35 2011 -0400" }, "message": "arch/tile: support TIF_NOTIFY_RESUME\n\nThis support is required for CONFIG_KEYS, NFSv4 kernel DNS, etc.\nThe change is slightly more complex than the minimal thing, since\nI took advantage of having to go into the assembly code to just\nmove a bunch of stuff into C code: specifically, the schedule(),\ndo_async_page_fault(), do_signal(), and single_step_once() support,\nin addition to the TIF_NOTIFY_RESUME support.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "93013a0f533fb3dd6875ca670d8e0bb4166a796e", "tree": "b3967c2853ca9b8a6322d16d70400b10bb25ac53", "parents": [ "8e10cd74342c7f5ce259cceca36f6eba084f5d58" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 13:49:14 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 13:49:14 2011 -0400" }, "message": "arch/tile: refactor backtracing code\n\nThis change is the result of some work to make the backtrace code more\nshareable between kernel, libc, and gdb.\n\nFor the kernel, some good effects are to eliminate the hacky\n\"VirtualAddress\" typedef in favor of \"unsigned long\", to eliminate a\nbunch of spurious kernel doc comments, to remove the dead \"bt_read_memory\"\nfunction, and to use \"__tilegx__\" in #ifdefs instead of \"TILE_CHIP\".\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "25985edcedea6396277003854657b5f3cb31a628", "tree": "f026e810210a2ee7290caeb737c23cb6472b7c38", "parents": [ "6aba74f2791287ec407e0f92487a725a25908067" ], "author": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Wed Mar 30 22:57:33 2011 -0300" }, "committer": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Thu Mar 31 11:26:23 2011 -0300" }, "message": "Fix common misspellings\n\nFixes generated by \u0027codespell\u0027 and manually reviewed.\n\nSigned-off-by: Lucas De Marchi \u003clucas.demarchi@profusion.mobi\u003e\n" }, { "commit": "61f2e7b0f474225b4226772830ae4b29a3a21f8d", "tree": "52f880fe6feec8efe5e5e028a3e0637629a500b7", "parents": [ "3fca5af7860f87eb2cd706c2d7dda4ad03230a07" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Wed Mar 23 16:42:16 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 23 19:46:22 2011 -0700" }, "message": "bitops: remove minix bitops from asm/bitops.h\n\nminix bit operations are only used by minix filesystem and useless by\nother modules. Because byte order of inode and block bitmaps is different\non each architecture like below:\n\nm68k:\n\tbig-endian 16bit indexed bitmaps\n\nh8300, microblaze, s390, sparc, m68knommu:\n\tbig-endian 32 or 64bit indexed bitmaps\n\nm32r, mips, sh, xtensa:\n\tbig-endian 32 or 64bit indexed bitmaps for big-endian mode\n\tlittle-endian bitmaps for little-endian mode\n\nOthers:\n\tlittle-endian bitmaps\n\nIn order to move minix bit operations from asm/bitops.h to architecture\nindependent code in minix filesystem, this provides two config options.\n\nCONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k.\nCONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use\nnative byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu,\nm32r, mips, sh, xtensa). The architectures which always use little-endian\nbitmaps do not select these options.\n\nFinally, we can remove minix bit operations from asm/bitops.h for all\narchitectures.\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\nCc: Geert Uytterhoeven \u003cgeert@linux-m68k.org\u003e\nCc: Roman Zippel \u003czippel@linux-m68k.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Yoshinori Sato \u003cysato@users.sourceforge.jp\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nAcked-by: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "f312eff8164879e04923d41e9dd23e7850937d85", "tree": "9f4f6fd00ebf12afd5b070c44d12b55a29440360", "parents": [ "bb5cda3d706f44e5696533c9a7353c458f2871e0" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Wed Mar 23 16:42:14 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 23 19:46:21 2011 -0700" }, "message": "bitops: remove ext2 non-atomic bitops from asm/bitops.h\n\nAs the result of conversions, there are no users of ext2 non-atomic bit\noperations except for ext2 filesystem itself. Now we can put them into\narchitecture independent code in ext2 filesystem, and remove from\nasm/bitops.h for all architectures.\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: Jan Kara \u003cjack@suse.cz\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "861b5ae7cde96ca081914e21dedfa7e8a38da622", "tree": "376cae55475cce2bb45b96213b1f91b330db0448", "parents": [ "c1e6ca7a501f0139e5ec2a01f8420eeb21c97a52" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Wed Mar 23 16:42:02 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 23 19:46:15 2011 -0700" }, "message": "bitops: introduce little-endian bitops for most architectures\n\nIntroduce little-endian bit operations to the big-endian architectures\nwhich do not have native little-endian bit operations and the\nlittle-endian architectures. (alpha, avr32, blackfin, cris, frv, h8300,\nia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa)\n\nThese architectures can just include generic implementation\n(asm-generic/bitops/le.h).\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Yoshinori Sato \u003cysato@users.sourceforge.jp\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nCc: Matthew Wilcox \u003cwilly@debian.org\u003e\nCc: Grant Grundler \u003cgrundler@parisc-linux.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Kazumoto Kojima \u003ckkojima@rr.iij4u.or.jp\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Hans-Christian Egtvedt \u003chans-christian.egtvedt@atmel.com\u003e\nAcked-by: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "b6a84016bd2598e35ead635147fa53619982648d", "tree": "a73dc0ef4e353723bf123898f0fc143e587c16d8", "parents": [ "504f52b5439aaf26d3e2c1d45ec10fce38c8dd27" ], "author": { "name": "Eric Dumazet", "email": "eric.dumazet@gmail.com", "time": "Tue Mar 22 16:30:42 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 22 17:44:01 2011 -0700" }, "message": "mm: NUMA aware alloc_thread_info_node()\n\nAdd a node parameter to alloc_thread_info(), and change its name to\nalloc_thread_info_node()\n\nThis change is needed to allow NUMA aware kthread_create_on_cpu()\n\nSigned-off-by: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nReviewed-by: Andi Kleen \u003cak@linux.intel.com\u003e\nAcked-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nCc: Tejun Heo \u003ctj@kernel.org\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: \u003clinux-arch@vger.kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "08351fc6a75731226e1112fc7254542bd3a2912e", "tree": "8b25bd168e0663c766f0332c8be082aa7d6ed265", "parents": [ "0df0914d414a504b975f3cc66ace0c16ef55b7f3", "0dccb0489f9a5a13a33e828ab965aa49685d12f8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 17 19:34:12 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 17 19:34:12 2011 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (27 commits)\n arch/tile: support newer binutils assembler shift semantics\n arch/tile: fix deadlock bugs in rwlock implementation\n drivers/edac: provide support for tile architecture\n tile on-chip network driver: sync up with latest fixes\n arch/tile: support 4KB page size as well as 64KB\n arch/tile: add some more VMSPLIT options and use consistent naming\n arch/tile: fix some comments and whitespace\n arch/tile: export some additional module symbols\n arch/tile: enhance existing finv_buffer_remote() routine\n arch/tile: fix two bugs in the backtracer code\n arch/tile: use extended assembly to inline __mb_incoherent()\n arch/tile: use a cleaner technique to enable interrupt for cpu_idle()\n arch/tile: sync up with \u003carch/sim.h\u003e and \u003carch/sim_def.h\u003e changes\n arch/tile: fix reversed test of strict_strtol() return value\n arch/tile: avoid a simulator warning during bootup\n arch/tile: export \u003casm/hardwall.h\u003e to userspace\n arch/tile: warn and retry if an IPI is not accepted by the target cpu\n arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcalls\n arch/tile: fix __ndelay etc to work better\n arch/tile: bug fix: exec\u0027ed task thought it was still single-stepping\n ...\n\nFix up trivial conflict in arch/tile/kernel/vmlinux.lds.S (percpu\nalignment vs section naming convention fix)\n" }, { "commit": "0dccb0489f9a5a13a33e828ab965aa49685d12f8", "tree": "0d6b96c5071982ee510abfc1cca9787b550270ed", "parents": [ "325d1605542960903c88409b199734a3d8fc6612" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 17 14:32:06 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 17 14:32:06 2011 -0400" }, "message": "arch/tile: support newer binutils assembler shift semantics\n\nThis change supports building the kernel with newer binutils where\na shift of greater than the word size is no longer interpreted\nsilently as modulo the word size, but instead generates a warning.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "8d7718aa082aaf30a0b4989e1f04858952f941bc", "tree": "f006a565d138cec2b497c2bd619f570ad1a11f6e", "parents": [ "37a9d912b24f96a0591773e6e6c3642991ae5a70" ], "author": { "name": "Michel Lespinasse", "email": "walken@google.com", "time": "Thu Mar 10 18:50:58 2011 -0800" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 11 12:23:31 2011 +0100" }, "message": "futex: Sanitize futex ops argument types\n\nChange futex_atomic_op_inuser and futex_atomic_cmpxchg_inatomic\nprototypes to use u32 types for the futex as this is the data type the\nfutex core code uses all over the place.\n\nSigned-off-by: Michel Lespinasse \u003cwalken@google.com\u003e\nCc: Darren Hart \u003cdarren@dvhart.com\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Matt Turner \u003cmattst88@gmail.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: \"James E.J. Bottomley\" \u003cjejb@parisc-linux.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nLKML-Reference: \u003c20110311025058.GD26122@google.com\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "37a9d912b24f96a0591773e6e6c3642991ae5a70", "tree": "5c4d5b9a52e2c533269e589115afbd25b6c8534b", "parents": [ "522d7decc0370070448a8c28982c8dfd8970489e" ], "author": { "name": "Michel Lespinasse", "email": "walken@google.com", "time": "Thu Mar 10 18:48:51 2011 -0800" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 11 12:23:08 2011 +0100" }, "message": "futex: Sanitize cmpxchg_futex_value_locked API\n\nThe cmpxchg_futex_value_locked API was funny in that it returned either\nthe original, user-exposed futex value OR an error code such as -EFAULT.\nThis was confusing at best, and could be a source of livelocks in places\nthat retry the cmpxchg_futex_value_locked after trying to fix the issue\nby running fault_in_user_writeable().\n \nThis change makes the cmpxchg_futex_value_locked API more similar to the\nget_futex_value_locked one, returning an error code and updating the\noriginal value through a reference argument.\n \nSigned-off-by: Michel Lespinasse \u003cwalken@google.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e [tile]\nAcked-by: Tony Luck \u003ctony.luck@intel.com\u003e [ia64]\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nTested-by: Michal Simek \u003cmonstr@monstr.eu\u003e [microblaze]\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e [frv]\nCc: Darren Hart \u003cdarren@dvhart.com\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Matt Turner \u003cmattst88@gmail.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: \"James E.J. Bottomley\" \u003cjejb@parisc-linux.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nLKML-Reference: \u003c20110311024851.GC26122@google.com\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n\n" }, { "commit": "3c5ead52ed68406c0ee789024c4ae581be8bcee4", "tree": "cd634aba3710115640b372b4fc49fee5ead75acf", "parents": [ "5c7707554858eca8903706b6df7cba5c0f802244" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 13:30:15 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 10 16:10:41 2011 -0500" }, "message": "arch/tile: fix deadlock bugs in rwlock implementation\n\nThe first issue fixed in this patch is that pending rwlock write locks\ncould lock out new readers; this could cause a deadlock if a read lock was\nheld on cpu 1, a write lock was then attempted on cpu 2 and was pending,\nand cpu 1 was interrupted and attempted to re-acquire a read lock.\nThe write lock code was modified to not lock out new readers.\n\nThe second issue fixed is that there was a narrow race window where a tns\ninstruction had been issued (setting the lock value to \"1\") and the store\ninstruction to reset the lock value correctly had not yet been issued.\nIn this case, if an interrupt occurred and the same cpu then tried to\nmanipulate the lock, it would find the lock value set to \"1\" and spin\nforever, assuming some other cpu was partway through updating it. The fix\nis to enforce an interrupt critical section around the tns/store pair.\n\nIn addition, this change now arranges to always validate that after\na readlock we have not wrapped around the count of readers, which\nis only eight bits.\n\nSince these changes make the rwlock \"fast path\" code heavier weight,\nI decided to move all the rwlock code all out of line, leaving only the\nconventional spinlock code with fastpath inlines. Since the read_lock\nand read_trylock implementations ended up very similar, I just expressed\nread_lock in terms of read_trylock.\n\nAs part of this change I also eliminate support for the now-obsolete\ntns_atomic mode.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "5c7707554858eca8903706b6df7cba5c0f802244", "tree": "6ebb5ef933b1cf4dbca374cf2a03e249383cd41e", "parents": [ "d91c641233ae09fcccec75313b7f55992668bf8d" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 13:01:49 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 10 13:30:14 2011 -0500" }, "message": "drivers/edac: provide support for tile architecture\n\nAdd tile support for the EDAC driver, which provides unified system\nerror (memory, PCI, etc.) reporting. For now, the TILEPro port\nreports memory correctable error (CE) only.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "76c567fbba50c3da2f4d40e2e551bab26cfd4381", "tree": "6e3c92a266d0ec255e1930adf5ba5268cd71dee9", "parents": [ "09c17eab075ceeafb53935d858c575b6776394d1" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 16:37:34 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 10 13:17:53 2011 -0500" }, "message": "arch/tile: support 4KB page size as well as 64KB\n\nThe Tilera architecture traditionally supports 64KB page sizes\nto improve TLB utilization and improve performance when the\nhardware is being used primarily to run a single application.\n\nFor more generic server scenarios, it can be beneficial to run\nwith 4KB page sizes, so this commit allows that to be specified\n(by modifying the arch/tile/include/hv/pagesize.h header).\n\nAs part of this change, we also re-worked the PTE management\nslightly so that PTE writes all go through a __set_pte() function\nwhere we can do some additional validation. The set_pte_order()\nfunction was eliminated since the \"order\" argument wasn\u0027t being used.\n\nOne bug uncovered was in the PCI DMA code, which wasn\u0027t properly\nflushing the specified range. This was benign with 64KB pages,\nbut with 4KB pages we were getting some larger flushes wrong.\n\nThe per-cpu memory reservation code also needed updating to\nconform with the newer percpu stuff; before it always chose 64KB,\nand that was always correct, but with 4KB granularity we now have\nto pay closer attention and reserve the amount of memory that will\nbe requested when the percpu code starts allocating.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "5fb682b0644cd20015d9b0e3ca6921ad5533f4ba", "tree": "0a2520197ebf92b6a27e69241bd4f242d1b39be3", "parents": [ "00dce03134689a257120ae2aa18ba7d1a736bef7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 15:58:39 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 10 13:14:03 2011 -0500" }, "message": "arch/tile: fix some comments and whitespace\n\nThis is a grab bag of changes with no actual change to generated code.\nThis includes whitespace and comment typos, plus a couple of stale\ncomments being removed.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "63b7ca6b04427aea9075d6f5f5f15b82e115bce4", "tree": "97a72ec3d243a46475e880b2c5703a167165f961", "parents": [ "3cebbafd28e6f91677f3becffcdf9150b74a4e0c" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 15:48:39 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:21:06 2011 -0500" }, "message": "arch/tile: enhance existing finv_buffer_remote() routine\n\nIt now takes an additional argument so it can be used to\nflush-and-invalidate pages that are cached using hash-for-home\nas well those that are cached with coherence point on a single cpu.\n\nThis allows it to be used more widely for changing the coherence\npoint of arbitrary pages when necessary.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "6c4d11268819d9c920c7befd8e8e9aad456bb067", "tree": "85aeb083d5973696bf704becf261ad91bd484613", "parents": [ "0b989cac90144565b8780ddde36e6a927f8ca7ba" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 15:28:00 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:54 2011 -0500" }, "message": "arch/tile: use extended assembly to inline __mb_incoherent()\n\nThis avoids having to maintain an additional separate assembly\nfile, and of course the inline is slightly more efficient as well.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "a5c149c8a00b247749d0f18c13b130069dcc36e3", "tree": "23fe734b22a2ab4e0f0f37b2243facf95e09f8c4", "parents": [ "ed54d38f0852b2e685393ddae2405d59ef44bed4" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 15:19:10 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:42 2011 -0500" }, "message": "arch/tile: sync up with \u003carch/sim.h\u003e and \u003carch/sim_def.h\u003e changes\n\nThese headers are used by Linux but are maintained upstream.\nThis change incorporates a few minor fixes to these headers,\nincluding a new sim_print() function, cleaner support for the\nsim_syscall() API, and a sim_query_cpu_speed() method.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "9ff27fdbd5d1ffbe2e0a277b4b7bfd0eb8a4bb1c", "tree": "0600b5b4bb25d4b66da91a329c395336c85752ee", "parents": [ "bbeee4b2815dd318e9ec9d092d7f79061cc8ba36" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 13:35:16 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:23 2011 -0500" }, "message": "arch/tile: export \u003casm/hardwall.h\u003e to userspace\n\nThis should have been as part of the initial hardwall submission to\nLKML but was overlooked. The header provides the ioctl definitions for\nmanipulating the hardwall fd, so needs to be available to userspace.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "13371731487896a6ef158b1cd74297f40a3da4bb", "tree": "af09fca3fd8811340b373faaddcdb528f8a07669", "parents": [ "04f7a3f12e10032ee3d44df1a509dbf5b2001fce" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 13:21:52 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:04 2011 -0500" }, "message": "arch/tile: fix __ndelay etc to work better\n\nThe current implementations of __ndelay and __udelay call a hypervisor\nservice to delay, but the hypervisor service isn\u0027t actually implemented\nvery well, and the consensus is that Linux should handle figuring this\nout natively and not use a hypervisor service.\n\nBy converting nanoseconds to cycles, and then spinning until the\ncycle counter reaches the desired cycle, we get several benefits:\nfirst, we are sensitive to the actual clock speed; second, we use\nless power by issuing a slow SPR read once every six cycles while\nwe delay; and third, we properly handle the case of an interrupt by\nexiting at the target time rather than after some number of cycles.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "04f7a3f12e10032ee3d44df1a509dbf5b2001fce", "tree": "2e9281f10f1dffc9fc6b470e823b02bb720ecc4c", "parents": [ "2cb82400719e085a3c226cf7cce8950208f09a06" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 13:08:32 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:19:58 2011 -0500" }, "message": "arch/tile: bug fix: exec\u0027ed task thought it was still single-stepping\n\nTo handle single-step, tile mmap\u0027s a page of memory in the process\nspace for each thread and uses it to construct a version of the\ninstruction that we want to single step. If the process exec\u0027s,\nthough, we lose that mapping, and the kernel needs to be aware that\nit will need to recreate it if the exec\u0027ed process than tries to\nsingle-step as well.\n\nAlso correct some int32_t to s32 for better kernel style.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "2cb82400719e085a3c226cf7cce8950208f09a06", "tree": "f37f00fb93625da933d271d4260a3ea4e7ec9f9c", "parents": [ "d356b595e5a95c0c2305ec0a7d1cdb3e26f57716" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Sun Feb 27 18:52:24 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:18:52 2011 -0500" }, "message": "arch/tile: catch up with section naming convention in 2.6.35\n\nThe convention changed to, e.g., \".data..page_aligned\". This commit\nfixes the places in the tile architecture that were still using the\nold convention. One tile-specific section (.init.page) was dropped\nin favor of just using an \"aligned\" attribute.\n\nSam Ravnborg \u003csam@ravnborg.org\u003e pointed out __PAGE_ALIGNED_BSS, etc.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d356b595e5a95c0c2305ec0a7d1cdb3e26f57716", "tree": "8256f0460d6ff5f50d57590a53c10336b66cb241", "parents": [ "deb4b003eb33e63af23cd887ded04ad77ab3dcbb" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Feb 25 08:46:38 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Feb 25 08:46:38 2011 -0500" }, "message": "arch/tile: Fix atomic_read() definition to use ACCESS_ONCE\n\nThis adds the volatile cast which forces the compiler to emit the load.\nSuggested by Peter Zijlstra \u003cpeterz@infradead.org\u003e.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "81711cee933599fa114abb0d258d8bbabef8adfb", "tree": "cef17c099689b15b3b8bb29b0eae84acd474ed8a", "parents": [ "bc4cf2bb271b2d557fc510426755da786fc985be" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Dec 14 16:07:25 2010 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Dec 17 16:59:29 2010 -0500" }, "message": "arch/tile: handle rt_sigreturn() more cleanly\n\nThe current tile rt_sigreturn() syscall pattern uses the common idiom\nof loading up pt_regs with all the saved registers from the time of\nthe signal, then anticipating the fact that we will clobber the ABI\n\"return value\" register (r0) as we return from the syscall by setting\nthe rt_sigreturn return value to whatever random value was in the pt_regs\nfor r0.\n\nHowever, this breaks in our 64-bit kernel when running \"compat\" tasks,\nsince we always sign-extend the \"return value\" register to properly\nhandle returned pointers that are in the upper 2GB of the 32-bit compat\naddress space. Doing this to the sigreturn path then causes occasional\nrandom corruption of the 64-bit r0 register.\n\nInstead, we stop doing the crazy \"load the return-value register\"\nhack in sigreturn. We already have some sigreturn-specific assembly\ncode that we use to pass the pt_regs pointer to C code. We extend that\ncode to also set the link register to point to a spot a few instructions\nafter the usual syscall return address so we don\u0027t clobber the saved r0.\nNow it no longer matters what the rt_sigreturn syscall returns, and the\npt_regs structure can be cleanly and completely reloaded.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" } ], "next": "47143b094d4700842e42b0a7cc2548d7ae292690" }