)]}' { "log": [ { "commit": "7b67e751479d50b7f84d1a3cc5216eed5e534b66", "tree": "a1a6746857cf65f04dde739fe271bf4143d55eaf", "parents": [ "9f13a1fd452f11c18004ba2422a6384b424ec8a9", "76ccc297018d25d55b789bbd508861ef1e2cdb0c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jan 11 18:50:26 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jan 11 18:50:26 2012 -0800" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)\n x86/PCI: Expand the x86_msi_ops to have a restore MSIs.\n PCI: Increase resource array mask bit size in pcim_iomap_regions()\n PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES\n PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)\n PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB\n x86/PCI: amd: factor out MMCONFIG discovery\n PCI: Enable ATS at the device state restore\n PCI: msi: fix imbalanced refcount of msi irq sysfs objects\n PCI: kconfig: English typo in pci/pcie/Kconfig\n PCI/PM/Runtime: make PCI traces quieter\n PCI: remove pci_create_bus()\n xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources\n x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()\n x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()\n x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan\n sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources\n sparc/PCI: convert to pci_create_root_bus()\n sh/PCI: convert to pci_scan_root_bus() for correct root bus resources\n powerpc/PCI: convert to pci_create_root_bus()\n powerpc/PCI: split PHB part out of pcibios_map_io_space()\n ...\n\nFix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due\nto the same patches being applied in other branches.\n" }, { "commit": "00fb5430f547e411ab03385cfa548776aaac1c92", "tree": "f2c543e9c9ce4b1400081de08bcaf6fd55b72972", "parents": [ "805a6af8dba5dfdd35ec35dc52ec0122400b2610", "1a36ea815a3557c03819ec7c90a6b2fb128385ca", "1456e9d2c4667a6e9221eda27b9648fb3bcc1e8e" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Jan 09 13:04:05 2012 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Jan 09 13:04:05 2012 +0100" }, "message": "Merge branches \u0027iommu/fixes\u0027, \u0027arm/omap\u0027 and \u0027x86/amd\u0027 into next\n\nConflicts:\n\tdrivers/pci/hotplug/acpiphp_glue.c\n" }, { "commit": "1900ca132f53c3d51e6e6b94ea8912530223c63a", "tree": "01f7e215f1ba735e54f30c27c3fd91dd747b2c5a", "parents": [ "424eb391596a38ddf422bee1617e4b9dea60126f" ], "author": { "name": "Hao, Xudong", "email": "xudong.hao@intel.com", "time": "Sat Dec 17 21:24:40 2011 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:11:18 2012 -0800" }, "message": "PCI: Enable ATS at the device state restore\n\nDuring S3 or S4 resume or PCI reset, ATS regs aren\u0027t restored correctly.\nThis patch enables ATS at the device state restore if PCI device has ATS\ncapability.\n\nSigned-off-by: Xudong Hao \u003cxudong.hao@intel.com\u003e\nSigned-off-by: Xiantao Zhang \u003cxiantao.zhang@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "cfa4d8cc56853ec945956d182ecb4c99102b110a", "tree": "ca29cfe3fa5b15f70ff65d0598a34b17c46ff19e", "parents": [ "da8d1c8ba4dcb16d60be54b233deca9a7cac98dc" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Wed Nov 02 14:07:15 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:26 2012 -0800" }, "message": "PCI: Fix PRI and PASID consistency\n\nThese are extended capabilities, rename and move to proper\ngroup for consistency.\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "8c4519456713628cbb457c77bf06684aace67f69", "tree": "9b18579db366024a85e4a6fbeef261a0a96be547", "parents": [ "bbef98ab0f019f1b0c25c1acdf1683c68933d41b" ], "author": { "name": "James Bottomley", "email": "jbottomley@parallels.com", "time": "Tue Nov 29 19:20:23 2011 +0000" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Dec 05 10:31:25 2011 -0800" }, "message": "PCI: fix ats compile failure\n\nI get this compile failure on parisc:\n\ndrivers/pci/ats.c: In function \u0027ats_alloc_one\u0027:\ndrivers/pci/ats.c:29: error: implicit declaration of function \u0027kzalloc\u0027\ndrivers/pci/ats.c:29: warning: assignment makes pointer from integer without a cast\ndrivers/pci/ats.c: In function \u0027ats_free_one\u0027:\ndrivers/pci/ats.c:45: error: implicit declaration of function \u0027kfree\u0027\n\nBecause ats.c is missing linux/slab.h as an include. This patch fixes it\n\nSigned-off-by: James Bottomley \u003cJBottomley@Parallels.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "91f57d5e1be3db1e079c8696f1eab214f1c7922d", "tree": "58d4a2a2fa41185c0fe64f8ac7395215fd27d2a1", "parents": [ "60fe823837d10673500ff685c01eb2f896fe5849" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Fri Nov 11 10:07:36 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Dec 05 10:22:15 2011 -0800" }, "message": "PCI: More PRI/PASID cleanup\n\nMore consistency cleanups. Drop the _OFF, separate and indent\nCTRL/CAP/STATUS bit definitions. This helped find the previous\nmis-use of bit 0 in the PASID capability register.\n\nReviewed-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nTested-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "60fe823837d10673500ff685c01eb2f896fe5849", "tree": "c39f6ae4d9944e766628b1dcd301cda5e4597532", "parents": [ "a776c491ca5e38c26d9f66923ff574d041e747f4" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Fri Nov 11 10:06:56 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Dec 05 10:22:03 2011 -0800" }, "message": "PCI: Enable is not exposed as a PASID capability\n\nThe PASID ECN indicates bit 0 is reserved in the capability register.\nSwitch pci_enable_pasid() to error if PASID is already enabled and\ndon\u0027t expose enable as a feature in pci_pasid_features().\n\nReviewed-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nTested-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "69166fbf02c7a21745013f2de037bf7af26e4279", "tree": "d6cc6dbbbcf547c993203dcd4932bddd4f69be08", "parents": [ "b50cac55bf859d5b2fdcc1803a553a251b703456" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Wed Nov 02 14:07:15 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Dec 05 10:21:45 2011 -0800" }, "message": "PCI: Fix PRI and PASID consistency\n\nThese are extended capabilities, rename and move to proper\ngroup for consistency.\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "363c75db1d7bbda0aa90e680565f2673bab92ee4", "tree": "7f6e2febf8b21f9bb17ad0ae2c699d362629441f", "parents": [ "d81a6d71760c4d8323f1f9a506c64084caa09063" ], "author": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Fri May 27 09:37:25 2011 -0400" }, "committer": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Mon Oct 31 19:31:22 2011 -0400" }, "message": "pci: Fix files needing export.h for EXPORT_SYMBOL/THIS_MODULE\n\nThey were implicitly getting it from device.h --\u003e module.h but\nwe want to clean that up. So add the minimal header for these\nmacros.\n\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\n" }, { "commit": "086ac11f6435c9dc2fe5025fc8ea3a1dbca273d6", "tree": "29e9445f029b73bac174900cb68d5e1fd2748cef", "parents": [ "c320b976d7837c561ce4aa49dfe0a64f0e527ce4" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 27 15:57:16 2011 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Oct 14 09:05:35 2011 -0700" }, "message": "PCI: Add support for PASID capability\n\nDevices supporting Process Address Space Identifiers\n(PASIDs) can use an IOMMU to access multiple IO address\nspaces at the same time. A PCIe device indicates support for\nthis feature by implementing the PASID capability. This\npatch adds support for the capability to the Linux kernel.\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c320b976d7837c561ce4aa49dfe0a64f0e527ce4", "tree": "09d12286e3c63ab15a472468795204eeb154f83c", "parents": [ "d4c0636c2107010f0ef8c4dfbb1d6368ae3b3ed9" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 27 15:57:15 2011 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Oct 14 09:05:34 2011 -0700" }, "message": "PCI: Add implementation for PRI capability\n\nImplement the necessary functions to handle PRI capabilities\non PCIe devices. With PRI devices behind an IOMMU can signal\npage fault conditions to software and recover from such\nfaults.\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "d4c0636c2107010f0ef8c4dfbb1d6368ae3b3ed9", "tree": "06ed57fc41718971fdf540f1034b0df31e3290dc", "parents": [ "db3c33c6d3fa04ee46b491e9d75d0d3b4798d074" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 27 15:57:14 2011 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Oct 14 09:05:34 2011 -0700" }, "message": "PCI: Export ATS functions to modules\n\nThis patch makes the ATS functions usable for modules.\nThey will be used by a module implementing some advanced\nAMD IOMMU features.\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "db3c33c6d3fa04ee46b491e9d75d0d3b4798d074", "tree": "6c1031398621e1b7195b2b23b7045a2eb5e917e1", "parents": [ "78d090b0be3f072a3c95022771c35183af961aaa" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 27 15:57:13 2011 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Oct 14 09:05:33 2011 -0700" }, "message": "PCI: Move ATS implementation into own file\n\nATS does not depend on IOV support, so move the code into\nits own file. This file will also include support for the\nPRI and PASID capabilities later.\nAlso give ATS its own Kconfig variable to allow selecting it\nwithout IOV support.\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" } ] }