)]}' { "log": [ { "commit": "ecd58d667a6ac4350d2f67b9accaadf575bae4b0", "tree": "5209771a0a1f61820171e444d3e4a580ecf3955f", "parents": [ "b07f2ebc109b607789f648dedcff4b125f9afec6", "fb127cb9de791d62fb393d6e65fa9869bddd2460" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Feb 24 14:25:33 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Feb 24 14:25:33 2012 -0800" }, "message": "Merge branch \u0027pci-next+probe_only+bus2res-fb127cb\u0027 of git://github.com/bjorn-helgaas/linux into linux-next\n" }, { "commit": "b07f2ebc109b607789f648dedcff4b125f9afec6", "tree": "3868d50119a2ba1721914e9b53f12d996c5d45b4", "parents": [ "eb572e7c76f154d75f90a783924f88afc34d5fec" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Feb 23 19:23:32 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Feb 24 09:38:59 2012 -0800" }, "message": "PCI: add a PCI resource reallocation config option\n\nAdd a new config option, PCI_REALLOC_ENABLE_AUTO, which will\nautomatically try to re-allocate PCI resources if PCI_IOV support is\nenabled and the SR-IOV resources are unassigned. Behavior can still be\ncontrolled using the pci\u003drealloc\u003d parameter.\n\n-v2: According to Jesse, adding one CONFIG option for distribution to\n disable it or enable it.\n-v3: update Kconfig text (jbarnes)\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "eb572e7c76f154d75f90a783924f88afc34d5fec", "tree": "79e87cc204d3e04b911c25dee39c7ebe5079d276", "parents": [ "b55438fdd5173a367659a7e200acea6c9f77b8cb" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Feb 23 19:23:31 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Feb 24 08:47:53 2012 -0800" }, "message": "PCI: print out suggestion about using pci\u003drealloc\n\nlet user know they could try if pci\u003drealloc could help.\n\n-v2: update suggestion text.\n\nSuggested-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b55438fdd5173a367659a7e200acea6c9f77b8cb", "tree": "fbcb4ac2e03abcf6933b18fce56361adbcda84af", "parents": [ "0c5be0cb0edfe3b5c4b62eac68aa2aa15ec681af" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Feb 23 19:23:30 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Feb 24 08:47:42 2012 -0800" }, "message": "PCI: prepare pci\u003drealloc for multiple options\n\nLet the user could enable and disable with pci\u003drealloc\u003don or pci\u003drealloc\u003doff\n\nAlso\n1. move variable and functions near the place they are used.\n2. change macro to function\n3. change related functions and variable to static and _init\n4. update parameter description accordingly.\n\nThis will let us add a config option to control default behavior, and\nstill allow the user to turn off automatic reallocation if it fails on\ntheir platform until a permanent solution is found.\n\n-v2: still honor pci\u003drealloc, and treat it as pci\u003drealloc\u003don\n also use enum instead of ...\n-v3: update kernel-paramenters.txt according to Jesse.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "0c5be0cb0edfe3b5c4b62eac68aa2aa15ec681af", "tree": "8051eb17c0b95701186bdf53e1a263d641f8b8e7", "parents": [ "823806ff6bd63f92644a5330cf0c3b68fac25ffd" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Feb 23 19:23:29 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Feb 24 08:44:38 2012 -0800" }, "message": "PCI: Retry on IORESOURCE_IO type allocations\n\nWhen enabling pci reallocation for a pci bridge, we clear the small size\nin in bridge and re-assign with requested + optional size for first\nseveral tries, but Ram mention could have problem with one case:\n\thttps://bugzilla.kernel.org/show_bug.cgi?id\u003d15960\n\nAfter checking the booting log in\n\thttps://lkml.org/lkml/2010/4/19/44\n\t[regression, bisected] Xonar DX invalid PCI I/O range since 977d17bb174\n\nWe should not stop too early for io ports.\n\tApr 19 10:19:38 [kernel] pci 0000:04:00.0: BAR 7: can\u0027t assign io (size 0x4000)\n\tApr 19 10:19:38 [kernel] pci 0000:05:01.0: BAR 8: assigned [mem 0x80400000-0x805fffff]\n\tApr 19 10:19:38 [kernel] pci 0000:05:01.0: BAR 7: can\u0027t assign io (size 0x2000)\n\tApr 19 10:19:38 [kernel] pci 0000:05:02.0: BAR 7: can\u0027t assign io (size 0x1000)\n\tApr 19 10:19:38 [kernel] pci 0000:05:03.0: BAR 7: can\u0027t assign io (size 0x1000)\n\tApr 19 10:19:38 [kernel] pci 0000:08:00.0: BAR 7: can\u0027t assign io (size 0x1000)\n\tApr 19 10:19:38 [kernel] pci 0000:09:04.0: BAR 0: can\u0027t assign io (size 0x100)\nand clear 00:1c.0 to retry again.\n\nThis patch removes IORESOUCE_IO checking, and tries one more time. It\ngives us a chance to get an allocation for the 00:1c.0 io port range\nbecause the range from 0x4000 to 0x8000 will be freed and we can use it.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "844393f4c5e309dd262b27796471c47e348b57a8", "tree": "d6504c2d39437f3c3a2d27bd313f13882e75a90e", "parents": [ "b9c40b076c9d247494f91521e3beff9422cd1173" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:18:59 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:18:59 2012 -0700" }, "message": "PCI: make pci_flags non-weak\n\nNo architecture defines its own pci_flags, so the core symbol does not\nneed to be weak.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "47087700ce3ccb2bf69f4dcb6ad7f59764e51308", "tree": "a5c59cb190882dfc72026c32308c22aaa5344d05", "parents": [ "823806ff6bd63f92644a5330cf0c3b68fac25ffd" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 14:29:23 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:18:55 2012 -0700" }, "message": "PCI: make pci_flags always available\n\nIf we move resource assignment functions into the core, we\u0027ll still\nneed a way for architectures to prevent reassignment, e.g., the\n\"pci_probe_only\" functionality, and we\u0027ll need a generic, always\navailable way the core can test for that. The \"pci_flags\"\narrangement used by several architectures seems like a convenient\nway to do this.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "3796f1e2ca38deebd30aa755ea52562b6926c73e", "tree": "8343152f81995af76c68cd253e75886f2724cae9", "parents": [ "1184893439b1a7532b579a85a354db12bbf1b277" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Feb 10 15:33:48 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Feb 23 12:00:04 2012 -0800" }, "message": "PCI: Skip cardbus assigned resource reset during pci bus rescan\n\nOtherwise when rescan is used for cardbus, assigned resources will get\ncleared.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nTested-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1184893439b1a7532b579a85a354db12bbf1b277", "tree": "cfba5be149def3389707a0773909d44c50b58f30", "parents": [ "dcef0d06b34a80071da4496556e85f9bf3b3c0bf" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Feb 10 15:33:47 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Feb 23 11:59:56 2012 -0800" }, "message": "PCI: Fix \"cardbus bridge resources as optional\" size handling\n\nWe should not set the requested size to -2; that will confuse the\nresource list sorting with align when SIZEALIGN is used.\n\nChange to STARTALIGN and pass align from start; we are safe to do that\njust as we do that regular pci bridge. In the long run, we should just\ntreat cardbus like a regular pci bridge.\n\nAlso fix the case when realloc_head is not passed: we should keep the\nrequested size.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nTested-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nAcked-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "dcef0d06b34a80071da4496556e85f9bf3b3c0bf", "tree": "0801a6c7dbbcc2ac3ba05b59e506ebf6cc5d3df7", "parents": [ "5b415f1e79e0c09366f26e3eabe751642059285a" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Feb 10 15:33:46 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Feb 23 11:59:45 2012 -0800" }, "message": "PCI: Disable cardbus bridge MEM1 prefetchable bit\n\nSome BIOSes enable prefetch on both MEM0 and MEM1. But the cardbus code\nassumes MEM1 is non-pref...\n\nDiscussion could be found at:\n\thttps://lkml.org/lkml/2012/1/12/1\n\thttps://bugzilla.kernel.org/show_bug.cgi?id\u003d41622#c23\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nTested-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "67cc7e26a5c46508ee00b9fe169aad833b798025", "tree": "bb684ce9e451597efe4fa6a19df0c64fb57a8d6a", "parents": [ "b592443d9045f0880eb4d8cc9125075744db4b9e" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:32 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:58 2012 -0800" }, "message": "PCI: remove add_to_failed_list()\n\nOnly one user; just use add_to_list instead.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b592443d9045f0880eb4d8cc9125075744db4b9e", "tree": "e8f6d1d49f67f3558ae18b9bde41328a6856569c", "parents": [ "bffc56d41102705d809f88c29918a9c33d2900f7" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:31 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:58 2012 -0800" }, "message": "PCI: add debug print out for add_size\n\nFor use in debugging resource reallocation.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "bffc56d41102705d809f88c29918a9c33d2900f7", "tree": "61889ca64ef9166ef17ea8555dc0c53c50149b16", "parents": [ "b9b0bba96cf5acbf025f7829fbf6c09e74323b41" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:30 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:57 2012 -0800" }, "message": "PCI: make free_list() into a function\n\nAfter merging struct pci_dev_resource_x and pci_dev_resource,\nWe can use a function instead of macro now.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b9b0bba96cf5acbf025f7829fbf6c09e74323b41", "tree": "64dcc384b6aa90458608cda94bedf67e7486dad8", "parents": [ "764242a0aec69e10b8dc0f4f0303a6800b09cf45" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:29 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:57 2012 -0800" }, "message": "PCI: Rename dev_res_x to add_res or fail_res\n\nLinus says don\u0027t use dev_res_x because it doesn\u0027t communicate anything\nabout usage. Rename them to add_res or fail_res etc according to\ncontext.\n\nSuggested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "764242a0aec69e10b8dc0f4f0303a6800b09cf45", "tree": "c61109a8d13c8b212be05c069d3339fdc73cfa14", "parents": [ "bdc4abecaeff30b3cc230b418a925999dda594c2" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:28 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:56 2012 -0800" }, "message": "PCI: Merge pci_dev_resource_x and pci_dev_resource\n\npci_dev_resource_x is a superset of pci_dev_resource and they\u0027re just\ntemp structs used during resource reallocation.\n\npci_dev_resource usage is quite limted.\n\nSo just use pci_dev_resource_x, and rename it as new pci_dev_resource.\n\n-v2: According to Linus, Separate free_list change to another patch\n\nSuggested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "bdc4abecaeff30b3cc230b418a925999dda594c2", "tree": "560705372265c02af5c8e9738a0a2bcaae32bb02", "parents": [ "2934a0de095f277a7bbc15a72ecf61af31a45163" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:27 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:55 2012 -0800" }, "message": "PCI: Replace resource_list with generic list\n\nSo we can use helper functions for generic list. This makes the\nresource re-allocation code much more readable.\n\n-v2: Use list_add_tail instead of adding list_insert_before, Pointed out\n by Linus.\n\nSuggested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2934a0de095f277a7bbc15a72ecf61af31a45163", "tree": "26fcc207a7bfa419f5a2ecfdf6bcd63e7e09cdcd", "parents": [ "78c3b329b9dd7097781cb900146e503e499cccfe" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:26 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:55 2012 -0800" }, "message": "PCI: Move struct resource_list to setup-bus.c\n\nNo user outside of setup-bus.c now. Later patches will convert\nresource_list to a regular list.\n\nSuggested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "78c3b329b9dd7097781cb900146e503e499cccfe", "tree": "0e7648baae8ac6f17b34108f5793aa1e3d4f23f8", "parents": [ "19aa7ee432cec00b647443719eb5c055b69a5e8e" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:25 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:54 2012 -0800" }, "message": "PCI: Move pdev_sort_resources() to setup-bus.c\n\nThis allows us to move the definition of struct resource_list to\nsetup_bus.c and later convert resource_list to a regular list.\n\nSuggested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "19aa7ee432cec00b647443719eb5c055b69a5e8e", "tree": "7d0175d80dba6171786886ddf388cb97e3d11dad", "parents": [ "9b03088f955552299f50a1f660372698b07ab339" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:24 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:54 2012 -0800" }, "message": "PCI: make re-allocation try harder by reassigning ranges higher in the heirarchy\n\nOn a system with devices that support SRIOV connected to a pcie switch\nto pcie root port:\n\n +-[0000:80]-+-00.0-[81-8f]--\n | +-01.0-[90-9f]--\n | +-02.0-[a0-af]----00.0-[a1-a3]--+-02.0-[a2]--+-00.0 Oracle Corporation Device 207a\n | | \\-03.0-[a3]--+-00.0 Oracle Corporation Device 207a\n | +-02.2-[b0-bf]----00.0-[b1-b3]--+-02.0-[b2]--+-00.0 Oracle Corporation Device 207a\n | | \\-03.0-[b3]--+-00.0 Oracle Corporation Device 207a\n\nWhen the BIOS does not assign resources for SRIOV BARs, kernel pci\nreallocation only goes up one bridge and then gives up, failing to to\nget resources for all sSRIOV BARs, even though the range is large enough\nin the peer root bus.\n\nSpecifically, only the bridge at the a1:02.0 level has its resources\ncleared and reallocated. The kernel does not go up to clear the bridge\nat the 80:02.0 level.\n\nTo make it go to upper levels, during retry, we need to treat \"good to have\"\nresources as \"must have\".\n\nOnly on the last try will we treat good to have resources as optional.\nAt that time, parent bridge resources will already have been released so\nwe\u0027ll have a chance to get everything assigned with must_have plus\ngood_to_have for all child devices.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9b03088f955552299f50a1f660372698b07ab339", "tree": "4cc4a7d8059186eca4b20a9733f3c0954ff09d96", "parents": [ "2f320521a0d2d11fb857be09d05e2fbbf3ef8c13" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:23 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:53 2012 -0800" }, "message": "PCI: Make pci_rescan_bus handle add_list\n\nThis allows us to allocate resources to hotplug bridges during\nremove/rescan.\n\nWe need to move the function to setup-bus.c so it can use\n__pci_bus_size_bridges and __pci_bus_assign_resources directly to take\nthe add_list resource tracking list.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "8424d7592eab8245b51051ee458e598213bca3b2", "tree": "7c1dfe89c382ba8b9875382363a768172d5b6f90", "parents": [ "3e6e0d80941773a6d0ac94354b083b74967f06fb" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:21 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:52 2012 -0800" }, "message": "PCI: Use add_list in pcie hotplug path.\n\nWe need add size for hot plug path when pluging in hotplug chassis\nwithout cards.\n\n-v2: change descriptions. make it applicable after \"pci: Check bridge\n resources after resource allocation.\"\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3e6e0d80941773a6d0ac94354b083b74967f06fb", "tree": "cbf597e9d4c6352baa606dc8c3b08dec92b8f40b", "parents": [ "1c372353e9c681b127f21030f8a0f0c2afd82429" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:20 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:52 2012 -0800" }, "message": "PCI: try to assign required+option size first\n\nWe found reassignment can not find a range for one resource, even if the\ntotal available range is large enough.\n\nbridge b1:02.0 will need 2M+3M\nbridge b1:03.0 will need 2M+3M\n\nso bridge b0:00.0 will get assigned: 4M : [f8000000-f83fffff]\n later is reassigned to 10M : [f8000000-f9ffffff]\n\nb1:02.0 is assigned to 2M : [f8000000-f81fffff]\nb1:03.0 is assigned to 2M : [f8200000-f83fffff]\n\nAfter that b1:03.0 get chance to be reassigned to [f8200000-f86fffff],\nbut b1:02.0 will not have chance to expand, because b1:03.0 is using in\nmiddle one.\n\n[ 187.911401] pci 0000:b1:02.0: bridge window [mem 0x00100000-0x002fffff] to [bus b2-b2] add_size 300000\n[ 187.920764] pci 0000:b1:03.0: bridge window [mem 0x00100000-0x002fffff] to [bus b3-b3] add_size 300000\n[ 187.930129] pci 0000:b1:02.0: [mem 0x00100000-0x002fffff] get_res_add_size add_size 300000\n[ 187.938500] pci 0000:b1:03.0: [mem 0x00100000-0x002fffff] get_res_add_size add_size 300000\n[ 187.946857] pci 0000:b0:00.0: bridge window [mem 0x00100000-0x004fffff] to [bus b1-b3] add_size 600000\n[ 187.956206] pci 0000:b0:00.0: BAR 14: assigned [mem 0xf8000000-0xf83fffff]\n[ 187.963102] pci 0000:b0:00.0: BAR 15: assigned [mem 0xf5000000-0xf51fffff pref]\n[ 187.970434] pci 0000:b0:00.0: BAR 14: reassigned [mem 0xf8000000-0xf89fffff]\n[ 187.977497] pci 0000:b1:02.0: BAR 14: assigned [mem 0xf8000000-0xf81fffff]\n[ 187.984383] pci 0000:b1:02.0: BAR 15: assigned [mem 0xf5000000-0xf50fffff pref]\n[ 187.991695] pci 0000:b1:03.0: BAR 14: assigned [mem 0xf8200000-0xf83fffff]\n[ 187.998576] pci 0000:b1:03.0: BAR 15: assigned [mem 0xf5100000-0xf51fffff pref]\n[ 188.005888] pci 0000:b1:03.0: BAR 14: reassigned [mem 0xf8200000-0xf86fffff]\n[ 188.012939] pci 0000:b1:02.0: BAR 14: can\u0027t assign mem (size 0x200000)\n[ 188.019471] pci 0000:b1:02.0: failed to add 300000 to res\u003d[mem 0xf8000000-0xf81fffff]\n[ 188.027326] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]\n[ 188.034071] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]\n[ 188.040795] pci 0000:b2:00.0: BAR 2: assigned [mem 0xf8000000-0xf80fffff 64bit]\n[ 188.048119] pci 0000:b2:00.0: BAR 2: set to [mem 0xf8000000-0xf80fffff 64bit] (PCI address [0xf8000000-0xf80fffff])\n[ 188.058550] pci 0000:b2:00.0: BAR 6: assigned [mem 0xf5000000-0xf50fffff pref]\n[ 188.065802] pci 0000:b2:00.0: BAR 0: assigned [mem 0xf8100000-0xf8103fff 64bit]\n[ 188.073125] pci 0000:b2:00.0: BAR 0: set to [mem 0xf8100000-0xf8103fff 64bit] (PCI address [0xf8100000-0xf8103fff])\n[ 188.083596] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]\n[ 188.090310] pci 0000:b2:00.0: BAR 9: can\u0027t assign mem (size 0x300000)\n[ 188.096773] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]\n[ 188.103479] pci 0000:b2:00.0: BAR 7: assigned [mem 0xf8104000-0xf810ffff 64bit]\n[ 188.110801] pci 0000:b2:00.0: BAR 7: set to [mem 0xf8104000-0xf810ffff 64bit] (PCI address [0xf8104000-0xf810ffff])\n[ 188.121256] pci 0000:b1:02.0: PCI bridge to [bus b2-b2]\n[ 188.126512] pci 0000:b1:02.0: bridge window [mem 0xf8000000-0xf81fffff]\n[ 188.133328] pci 0000:b1:02.0: bridge window [mem 0xf5000000-0xf50fffff pref]\n[ 188.140608] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]\n[ 188.147341] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]\n[ 188.154076] pci 0000:b3:00.0: BAR 2: assigned [mem 0xf8200000-0xf82fffff 64bit]\n[ 188.161417] pci 0000:b3:00.0: BAR 2: set to [mem 0xf8200000-0xf82fffff 64bit] (PCI address [0xf8200000-0xf82fffff])\n[ 188.171865] pci 0000:b3:00.0: BAR 6: assigned [mem 0xf5100000-0xf51fffff pref]\n[ 188.179090] pci 0000:b3:00.0: BAR 0: assigned [mem 0xf8300000-0xf8303fff 64bit]\n[ 188.186431] pci 0000:b3:00.0: BAR 0: set to [mem 0xf8300000-0xf8303fff 64bit] (PCI address [0xf8300000-0xf8303fff])\n[ 188.196884] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]\n[ 188.203591] pci 0000:b3:00.0: BAR 9: assigned [mem 0xf8400000-0xf86fffff 64bit]\n[ 188.210909] pci 0000:b3:00.0: BAR 9: set to [mem 0xf8400000-0xf86fffff 64bit] (PCI address [0xf8400000-0xf86fffff])\n[ 188.221379] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]\n[ 188.228089] pci 0000:b3:00.0: BAR 7: assigned [mem 0xf8304000-0xf830ffff 64bit]\n[ 188.235407] pci 0000:b3:00.0: BAR 7: set to [mem 0xf8304000-0xf830ffff 64bit] (PCI address [0xf8304000-0xf830ffff])\n[ 188.245843] pci 0000:b1:03.0: PCI bridge to [bus b3-b3]\n[ 188.251107] pci 0000:b1:03.0: bridge window [mem 0xf8200000-0xf86fffff]\n[ 188.257922] pci 0000:b1:03.0: bridge window [mem 0xf5100000-0xf51fffff pref]\n[ 188.265180] pci 0000:b0:00.0: PCI bridge to [bus b1-b3]\n[ 188.270443] pci 0000:b0:00.0: bridge window [mem 0xf8000000-0xf89fffff]\n[ 188.277250] pci 0000:b0:00.0: bridge window [mem 0xf5000000-0xf51fffff pref]\n[ 188.284512] pcieport 0000:80:02.2: PCI bridge to [bus b0-bf]\n[ 188.290184] pcieport 0000:80:02.2: bridge window [io 0xa000-0xbfff]\n[ 188.296735] pcieport 0000:80:02.2: bridge window [mem 0xf8000000-0xf8ffffff]\n[ 188.303963] pcieport 0000:80:02.2: bridge window [mem 0xf5000000-0xf5ffffff 64bit pref]\n\nThus b2:00.0 BAR 9 does not get assigned...\n\nroot cause:\nb1:02.0 can not be added more range, because b1:03.0 is just after it;\nno space between the required ranges.\n\nSolution:\nTry to assign required + optional all together at first, and if that\nfails, try again with just the required resources.\n\n-v2: seperate add_to_list change() to another patch according to Jesse.\n seperate get_res_add_size() moving to another patch according to Jesse.\n add !realloc_head-\u003enext check if the list is empty to bail early\n according to Jesse.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1c372353e9c681b127f21030f8a0f0c2afd82429", "tree": "5cbd91269d7cef2ae1b5a4a41ddd867919d65014", "parents": [ "ef62dfefa93bc90f1cb0f4a55c2d86b3269b3f92" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:19 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:51 2012 -0800" }, "message": "PCI: Move get_res_add_size() function\n\nNeed to call it from __assign_resources_sorted() later and we\u0027d like to\navoid a forward declaraion.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "ef62dfefa93bc90f1cb0f4a55c2d86b3269b3f92", "tree": "a29e759324b2331968a732db1312fafc75f3d737", "parents": [ "a4ac9fea016fc5c09227eb479bd35e34978323a4" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:18 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:51 2012 -0800" }, "message": "PCI: Make add_to_list() return status\n\nWill be used for resource_list_x duplication when trying\nrequested+optional at first.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a4ac9fea016fc5c09227eb479bd35e34978323a4", "tree": "fcf35e3d704afc5de48c304dd365880fe03a7bf3", "parents": [ "0dea210b1769f191d6b2bc3cc86e51481837ec5e" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:17 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:50 2012 -0800" }, "message": "PCI : Calculate right add_size\n\nDuring debug of one SRIOV enabled hotplug device, we found found that\nadd_size is not passed properly.\n\nThe device has devices under two level bridges:\n\n +-[0000:80]-+-00.0-[81-8f]--\n | +-01.0-[90-9f]--\n | +-02.0-[a0-af]----00.0-[a1-a3]--+-02.0-[a2]--+-00.0 Oracle Corporation Device\n | | \\-03.0-[a3]--+-00.0 Oracle Corporation Device\n\nWhich means later the parent bridge will not try to add a big enough range:\n\n[ 557.455077] pci 0000:a0:00.0: BAR 14: assigned [mem 0xf9000000-0xf93fffff]\n[ 557.461974] pci 0000:a0:00.0: BAR 15: assigned [mem 0xf6000000-0xf61fffff pref]\n[ 557.469340] pci 0000:a1:02.0: BAR 14: assigned [mem 0xf9000000-0xf91fffff]\n[ 557.476231] pci 0000:a1:02.0: BAR 15: assigned [mem 0xf6000000-0xf60fffff pref]\n[ 557.483582] pci 0000:a1:03.0: BAR 14: assigned [mem 0xf9200000-0xf93fffff]\n[ 557.490468] pci 0000:a1:03.0: BAR 15: assigned [mem 0xf6100000-0xf61fffff pref]\n[ 557.497833] pci 0000:a1:03.0: BAR 14: can\u0027t assign mem (size 0x200000)\n[ 557.504378] pci 0000:a1:03.0: failed to add optional resources res\u003d[mem 0xf9200000-0xf93fffff]\n[ 557.513026] pci 0000:a1:02.0: BAR 14: can\u0027t assign mem (size 0x200000)\n[ 557.519578] pci 0000:a1:02.0: failed to add optional resources res\u003d[mem 0xf9000000-0xf91fffff]\n\nIt turns out we did not calculate size1 properly.\n\nstatic resource_size_t calculate_memsize(resource_size_t size,\n resource_size_t min_size,\n resource_size_t size1,\n resource_size_t old_size,\n resource_size_t align)\n{\n if (size \u003c min_size)\n size \u003d min_size;\n if (old_size \u003d\u003d 1 )\n old_size \u003d 0;\n if (size \u003c old_size)\n size \u003d old_size;\n size \u003d ALIGN(size + size1, align);\n return size;\n}\n\nWe should not pass add_size with min_size in calculate_memsize since\nthat will make add_size not contribute final add_size.\n\nSo just pass add_size with size1 to calculate_memsize().\n\nWith this change, we should have chance to remove extra addon in\npci_reassign_resource.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "e24442733ee486c99d03fe2ecd98924d1bc14c51", "tree": "799b7789febb8491115c97f5a136042d26a81cff", "parents": [ "72da0b07b1b497927758a2102b856ce41e4ba81e" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Sun Sep 11 14:08:38 2011 -0300" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Oct 14 09:05:29 2011 -0700" }, "message": "PCI: Make pci_setup_bridge() non-static for use by arch code\n\nThe \"powernv\" platform of the powerpc architecture needs to assign PCI\nresources using a specific algorithm to fit some HW constraints of\nthe IBM \"IODA\" architecture (related to the ability to create error\nhandling domains that encompass specific segments of MMIO space).\n\nFor doing so, it wants to call pci_setup_bridge() from architecture\nspecific resource management in order to configure bridges after all\nresources have been assigned. So make it non-static.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9e8bf93a7f416a3fa8fb6d76177d90e67bd45496", "tree": "0ad966551eec5894129010dbcaef1f271c960cec", "parents": [ "0a2daa1cf35004f5adbf4138555cc5669abf3a3e" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Mon Jul 25 13:08:42 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Aug 01 11:50:50 2011 -0700" }, "message": "PCI: code and comments cleanup\n\na) adjust_resource_sorted() is now called reassign_resource_sorted()\nb) nice-to-have is now called optional\nc) add_list is now called realloc_list.\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "0a2daa1cf35004f5adbf4138555cc5669abf3a3e", "tree": "035bd37e33f7e95f226d9e46e173c043f0fbe018", "parents": [ "2aceefcbd5a73059e5f52831817ec277e987440d" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Mon Jul 25 13:08:41 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Aug 01 11:50:40 2011 -0700" }, "message": "PCI: make cardbus-bridge resources optional\n\nAllocate resources to cardbus bridge only after all other genuine\nresources requests are satisfied. Dont retry if resource allocation\nfor cardbus-bridges fail.\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2aceefcbd5a73059e5f52831817ec277e987440d", "tree": "37b1a0f36a0cde11ab73d5ca2108ab94a1eb10f6", "parents": [ "2bbc6942273b5b3097bd265d82227bdd84b351b2" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Mon Jul 25 13:08:40 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Aug 01 11:50:31 2011 -0700" }, "message": "PCI: make SRIOV resources optional\n\nFrom: Yinghai Lu \u003cyinghai@kernel.org\u003e\n\nAllocate resources to SRIOV BARs only after all other required\nresource-requests are satisfied. Dont retry if resource allocation for SRIOV\nBARs fail.\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2bbc6942273b5b3097bd265d82227bdd84b351b2", "tree": "34d846f34a94dbe7b0c4800cb8efc3cf2e07ad74", "parents": [ "be768912a49b10b68e96fbd8fa3cab0adfbd3091" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Mon Jul 25 13:08:39 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Aug 01 11:50:15 2011 -0700" }, "message": "PCI : ability to relocate assigned pci-resources\n\nCurrently pci-bridges are allocated enough resources to satisfy their immediate\nrequirements. Any additional resource-requests fail if additional free space,\ncontiguous to the one already allocated, is not available. This behavior is not\nreasonable since sufficient contiguous resources, that can satisfy the request,\nare available at a different location.\n\nThis patch provides the ability to expand and relocate a allocated resource.\n\n\tv2: Changelog: Fixed size calculation in pci_reassign_resource()\n\tv3: Changelog : Split this patch. The resource.c changes are already\n\t\t\tupstream. All the pci driver changes are in here.\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "be768912a49b10b68e96fbd8fa3cab0adfbd3091", "tree": "d1414e67c840bd66fef1d92177d41a2c22529015", "parents": [ "b03e7495a862b028294f59fc87286d6d78ee7fa1" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Mon Jul 25 13:08:38 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Aug 01 11:49:39 2011 -0700" }, "message": "PCI: honor child buses add_size in hot plug configuration\n\ngit commit c8adf9a3e873eddaaec11ac410a99ef6b9656938\n \"PCI: pre-allocate additional resources to devices only after\n\tsuccessful allocation of essential resources.\"\n\nfails to take into consideration the optional-resources needed by children\ndevices while calculating the optional-resource needed by the bridge.\n\nThis can be a problem on some setup. For example, if a hotplug bridge has 8\nchildren hotplug bridges, the bridge should have enough resources to accomodate\nthe hotplug requirements for each of its children hotplug bridges. Currently\nthis is not the case.\n\nThis patch fixes the problem.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7b87c9df5602efd6c7edeb291bbd104d49a6babf", "tree": "9fe9167f4492cf05c4e1b38ccf21ab8404900cb4", "parents": [ "28c6821a0f8e686d4f1a6107d970705d37475d87" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Jun 14 13:04:40 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jul 22 09:08:07 2011 -0700" }, "message": "PCI: remove printks about disabled bridge windows\n\nI don\u0027t think there\u0027s enough value in the fact of a bridge window\nbeing disabled to justify cluttering the dmesg log with it.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "f483d3923dc3a6394c483e28ccb3fe700bdf399e", "tree": "ef487babd0ef104e1fa8323c23050d66096c0f3a", "parents": [ "a2fa83faf47b514ab947cea916d3691b66525073" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Thu Jul 07 11:19:10 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jul 08 15:49:20 2011 -0700" }, "message": "PCI: conditional resource-reallocation through kernel parameter pci\u003drealloc\n \nMultiple attempts to dynamically reallocate pci resources have\nunfortunately lead to regressions. Though we continue to fix the\nregressions and fine tune the dynamic-reallocation behavior, we have not\nreached a acceptable state yet.\n \nThis patch provides a interim solution. It disables dynamic reallocation\nby default, but adds the ability to enable it through pci\u003drealloc kernel\ncommand line parameter.\n \nTested-by: Oliver Hartkopp \u003csocketcan@hartkopp.net\u003e\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5e152b4c9e0fce6149c74406346a7ae7e7a17727", "tree": "12503a50142797c1babfd87099c193b3e4d54f93", "parents": [ "a77febbef105554c5a37241cf903f48ab7bc03c7", "9251bac97d47fdaea406ea0595c2d0aa50022f12" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 15:39:34 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 15:39:34 2011 -0700" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (27 commits)\n PCI: Don\u0027t use dmi_name_in_vendors in quirk\n PCI: remove unused AER functions\n PCI/sysfs: move bus cpuaffinity to class dev_attrs\n PCI: add rescan to /sys/.../pci_bus/.../\n PCI: update bridge resources to get more big ranges when allocating space (again)\n KVM: Use pci_store/load_saved_state() around VM device usage\n PCI: Add interfaces to store and load the device saved state\n PCI: Track the size of each saved capability data area\n PCI/e1000e: Add and use pci_disable_link_state_locked()\n x86/PCI: derive pcibios_last_bus from ACPI MCFG\n PCI: add latency tolerance reporting enable/disable support\n PCI: add OBFF enable/disable support\n PCI: add ID-based ordering enable/disable support\n PCI hotplug: acpiphp: assume device is in state D0 after powering on a slot.\n PCI: Set PCIE maxpayload for card during hotplug insertion\n PCI/ACPI: Report _OSC control mask returned on failure to get control\n x86/PCI: irq and pci_ids patch for Intel Panther Point DeviceIDs\n PCI: handle positive error codes\n PCI: check pci_vpd_pci22_wait() return\n PCI: Use ICH6_GPIO_EN in ich6_lpc_acpi_gpio\n ...\n\nFix up trivial conflicts in include/linux/pci_ids.h: commit a6e5e2be4461\nmoved the intel SMBUS ID definitons to the i2c-i801.c driver.\n" }, { "commit": "da7822e5ad71ec9b745b412639f1e5e0ba795a20", "tree": "605722e2c2b32fd6450bc91718ac7b4240fcba6c", "parents": [ "f8fcfd775523347afe460dc3a0f45d0479e784a2" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu May 12 17:11:37 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Sat May 21 12:17:11 2011 -0700" }, "message": "PCI: update bridge resources to get more big ranges when allocating space (again)\n\nWith Ram\u0027s fixes, this should be safe to do again. So let\u0027s give it\nanother try.\n\nBIOS separates IO ranges between several IOHs, and on some slots, BIOS\nassigns resources to a bridge, but stops assigning resources to the\ndevice under that bridge, because the device needs a big resource.\n\nSo:\n1. allocate resources and record the failed device resources\n2. clear the BIOS assigned resources of the parent bridge of failing device\n3. go back and call pci assign unassigned\n4. if it still fails, go up the tree, clear more bridges. and try again\n\nNow Ram\u0027s allocate requested resource already got into mainline. could\nput this one again.\n\nReviewed-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "93d2175d3d31f11ba04fcfa0e9a496a1b4bc8b34", "tree": "3bb4635b432268db72967b237d6b3f33d427ef9f", "parents": [ "df8d06ade6eed9077f658ac8696fc1cb5c081220" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri May 13 18:06:17 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 16 18:33:35 2011 -0700" }, "message": "PCI: Clear bridge resource flags if requested size is 0\n\nDuring pci remove/rescan testing found:\n\n pci 0000:c0:03.0: PCI bridge to [bus c4-c9]\n pci 0000:c0:03.0: bridge window [io 0x1000-0x0fff]\n pci 0000:c0:03.0: bridge window [mem 0xf0000000-0xf00fffff]\n pci 0000:c0:03.0: bridge window [mem 0xfc180000000-0xfc197ffffff 64bit pref]\n pci 0000:c0:03.0: device not available (can\u0027t reserve [io 0x1000-0x0fff])\n pci 0000:c0:03.0: Error enabling bridge (-22), continuing\n pci 0000:c0:03.0: enabling bus mastering\n pci 0000:c0:03.0: setting latency timer to 64\n pcieport 0000:c0:03.0: device not available (can\u0027t reserve [io 0x1000-0x0fff])\n pcieport: probe of 0000:c0:03.0 failed with error -22\n\nThis bug was caused by commit c8adf9a3e873 (\"PCI: pre-allocate\nadditional resources to devices only after successful allocation of\nessential resources.\")\n\nAfter that commit, pci_hotplug_io_size is changed to additional_io_size\nfrom minium size. So it will not go through resource_size(res) !\u003d 0\npath, and will not be reset.\n\nThe root cause is: pci_bridge_check_ranges will set RESOURCE_IO flag for\npci bridge, and later if children do not need IO resource. those bridge\nresources will not need to be allocated. but flags is still there.\nthat will confuse the the pci_enable_bridges later.\n\nrelated code:\n\n static void assign_requested_resources_sorted(struct resource_list *head,\n struct resource_list_x *fail_head)\n {\n struct resource *res;\n struct resource_list *list;\n int idx;\n\n for (list \u003d head-\u003enext; list; list \u003d list-\u003enext) {\n res \u003d list-\u003eres;\n idx \u003d res - \u0026list-\u003edev-\u003eresource[0];\n if (resource_size(res) \u0026\u0026 pci_assign_resource(list-\u003edev, idx)) {\n ...\n reset_resource(res);\n }\n }\n }\n\nAt last, We have to clear the flags in pbus_size_mem/io when requested\nsize \u003d\u003d 0 and !add_head. becasue this case it will not go through\nadjust_resources_sorted().\n\nJust make size1 \u003d size0 when !add_head. it will make flags get cleared.\n\nAt the same time when requested size \u003d\u003d 0, add_size !\u003d 0, will still\nhave in head and add_list. because we do not clear the flags for it.\n\nAfter this, we will get right result:\n\n pci 0000:c0:03.0: PCI bridge to [bus c4-c9]\n pci 0000:c0:03.0: bridge window [io disabled]\n pci 0000:c0:03.0: bridge window [mem 0xf0000000-0xf00fffff]\n pci 0000:c0:03.0: bridge window [mem 0xfc180000000-0xfc197ffffff 64bit pref]\n pci 0000:c0:03.0: enabling bus mastering\n pci 0000:c0:03.0: setting latency timer to 64\n pcieport 0000:c0:03.0: setting latency timer to 64\n pcieport 0000:c0:03.0: irq 160 for MSI/MSI-X\n pcieport 0000:c0:03.0: Signaling PME through PCIe PME interrupt\n pci 0000:c4:00.0: Signaling PME through PCIe PME interrupt\n pcie_pme 0000:c0:03.0:pcie01: service driver pcie_pme loaded\n aer 0000:c0:03.0:pcie02: service driver aer loaded\n pciehp 0000:c0:03.0:pcie04: Hotplug Controller:\n\nv3: more simple fix. also fix one typo in pbus_size_mem\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCc: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "b42282e5a05018ecdc0d63a4ad530b0999785912", "tree": "c358fbb6eae26a1c5a2bd478241cbcdfd9aa3124", "parents": [ "c44eaf41a5a423993932c9a9ad279ee132779b48" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Apr 11 10:53:11 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Apr 11 10:53:11 2011 -0700" }, "message": "pci: fix PCI bus allocation alignment handling\n\nIn commit 13583b16592a (\"PCI: refactor io size calculation code\") Ram\nhad a thinko in the refactorization of the code: the end result used the\nvariable \u0027align\u0027 for the bus alignment, but the original code used\n\u0027min_align\u0027.\n\nSince then, another use of that \u0027align\u0027 variable got introduced by\ncommit c8adf9a3e873 (\"PCI: pre-allocate additional resources to devices\nonly after successful allocation of essential resources.\")\n\nFix both of those uses to use \u0027min_align\u0027 as they should.\n\nDaniel Hellstrom \u003cdaniel@gaisler.com\u003e\nAcked-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "c8adf9a3e873eddaaec11ac410a99ef6b9656938", "tree": "020eacc6e04b1f78268c2c3508d6ac88cae1806c", "parents": [ "fc075e1da1b96ef65c32e83648055606b8204b58" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Mon Feb 14 17:43:20 2011 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 04 10:46:47 2011 -0800" }, "message": "PCI: pre-allocate additional resources to devices only after successful allocation of essential resources.\n\nLinux tries to pre-allocate minimal resources to hotplug bridges. This\nworks fine as long as there are enough resources to satisfy all other\ngenuine resource requirements. However if enough resources are not\navailable to satisfy any of these nice-to-have pre-allocations, the\nresource-allocator reports errors and returns failure.\n\nThis patch distinguishes between must-have resource from nice-to-have\nresource. Any failure to allocate nice-to-have resources are ignored.\n\nThis behavior can be particularly useful to trigger automatic\nreallocation when the OS discovers genuine allocation-conflicts or\ngenuine unallocated-requests caused by buggy allocation behavior of the\nnative BIOS/uEFI.\n\nhttps://bugzilla.kernel.org/show_bug.cgi?id\u003d15960 captures the\nmovitation behind the patch. This patch is verified to resolve the above\nbug.\n\n changelog v2: o fixed a bug where pci_assign_resource() was called on a\n \t\t resource of zero resource size.\n\n changelog v3: addressed Bjorn\u0027s comment\n \t o \"Please don\u0027t indent and right-justify the changelog\".\n \t o removed add_size from struct resource. The additional\n \t\t size is now tracked using a linked list.\n\n changelog v4: o moved freeing up of elements in head list from\n \t\tassign_requested_resources_sorted() to\n \t\t__assign_resources_sorted().\n \t o removed a wrong reference to \u0027add_size\u0027 in\n \t\t\tpbus_size_mem().\n \t o some code optimizations in adjust_resources_sorted()\n \t\t\tand assign_requested_resources_sorted()\n\n changelog v5: o moved freeing up of elements in head list from\n \t\tassign_requested_resources_sorted() to\n \t\t__assign_resources_sorted().\n \t o removed a wrong reference to \u0027add_size\u0027 in\n \t\t\tpbus_size_mem().\n \t o some code optimizations in adjust_resources_sorted()\n \t\t\tand assign_requested_resources_sorted()\n\n changelog v5: o factored out common code and made them into\n\t\tseparate independent patches\n \t o added comments in kdoc format\n\t o added a BUG_ON in pci_assign_unassigned_resources()\n\t\t to catch for memory leak.\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "fc075e1da1b96ef65c32e83648055606b8204b58", "tree": "220297b578c15391b4190f0301db2e067f8f52ff", "parents": [ "094732a520caae81ae1532af29da82a4fa953472" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Mon Feb 14 17:43:19 2011 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 04 10:46:16 2011 -0800" }, "message": "PCI: introduce reset_resource()\n\nIntroduce reset_resource() which factors out resource reset logic.\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "094732a520caae81ae1532af29da82a4fa953472", "tree": "8c1b7ed35d86187032372b6e0db690c04b10a6bc", "parents": [ "13583b16592a9a85093dd9aa3d4e8cd76e4f0cd4" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Mon Feb 14 17:43:18 2011 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 04 10:46:04 2011 -0800" }, "message": "PCI: data structure agnostic free list function\n\nReplace free_failed_list() with a free_list() call. free_list() can\nhandle \u0027resource_list_x\u0027, \u0027resource_list\u0027 and any linked list linked\nthrough -\u003enext\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "13583b16592a9a85093dd9aa3d4e8cd76e4f0cd4", "tree": "72e598db87ae0415d6f137a768203748e426f70f", "parents": [ "87e3dc3855430bd254370afc79f2ed92250f5b7c" ], "author": { "name": "Ram Pai", "email": "linuxram@us.ibm.com", "time": "Mon Feb 14 17:43:17 2011 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 04 10:45:48 2011 -0800" }, "message": "PCI: refactor io size calculation code\n\nRefactor code that calculates the io size in pbus_size_io() and\npbus_mem_io() into separate functions.\n\nSigned-off-by: Ram Pai \u003clinuxram@us.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3f579c340fe6d6bdd8c6f9f144e7c3b85d4174ec", "tree": "7dbffa4e375aa2315c19db402857a07b24c82b40", "parents": [ "0ba10bc75271e4139eb9ca67d107624d581e3a94" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri May 21 14:35:06 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jul 30 09:29:16 2010 -0700" }, "message": "PCI hotplug: make sure child bridges are enabled at hotplug time\n\nFound one PCIe Module with several bridges built-in where a \"cold\"\nhotadd doesn\u0027t work.\n\nIf we end up reassigning bridge windows at hotadd time, and have to loop\nthrough assigning new ranges, we won\u0027t end up enabling the child bridges\nbecause the first assignment pass already tried to enable them, which\nprevents __pci_bridge_assign_resource from updating the windows.\n\nSo try to move enabling of child bridges to the end, and only do it\nonce.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "769d9968e42c995eaaf61ac5583d998f32e0769a", "tree": "e777fd34d8772fe3a89491f6669161c66c78a2cf", "parents": [ "7ac512aa8237c43331ffaf77a4fd8b8d684819ba" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 12 18:39:45 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 12 18:39:45 2010 -0700" }, "message": "Revert \"PCI: update bridge resources to get more big ranges in PCI assign unssigned\"\n\nThis reverts commit 977d17bb1749517b353874ccdc9b85abc7a58c2a, because it\ncan cause problems with some devices not getting any resources at all\nwhen the resource tree is re-allocated.\n\nFor an example of this, see\n\n\thttps://bugzilla.kernel.org/show_bug.cgi?id\u003d15960\n\t(originally https://bugtrack.alsa-project.org/alsa-bug/view.php?id\u003d4982)\n\t(lkml thread: http://lkml.org/lkml/2010/4/19/20)\n\nwhere Peter Henriksson reported his Xonar DX sound card gone, because\nthe IO port region was no longer allocated.\n\nReported-bisected-and-tested-by: Peter Henriksson \u003cpeter.henriksson@gmail.com\u003e\nRequested-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nRequested-by: Clemens Ladisch \u003cclemens@ladisch.de\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "9a928660c9dcaff568c9d379655c5aa16fb981f8", "tree": "df244e4ebf47647b59dfafd4c5f999cf67309e48", "parents": [ "30ff056c42c665b9ea535d8515890857ae382540" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sun Feb 28 15:49:39 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 07:41:55 2010 -0800" }, "message": "pci: don\u0027t reassign to ROM res if it is not going to be enabled\n\nA ROM resource that doesn\u0027t fit should not cause us to try to re-assign\nall the bus resources. Nobody generally cares, and re-assigning is\ngoing to just cause way more troubles than it tries to solve.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "89a74ecccd1f78e51faf6287e5c0e93a92ac096e", "tree": "6d167d73fb2cf5bb457b0b19145fcbf81cf441ef", "parents": [ "2adf75160b10bf3f09ed7d3d04e937f923fc557e" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Feb 23 10:24:31 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 23 09:43:31 2010 -0800" }, "message": "PCI: add pci_bus_for_each_resource(), remove direct bus-\u003eresource[] refs\n\nNo functional change; this converts loops that iterate from 0 to\nPCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the\npci_bus_for_each_resource() iterator instead.\n\nThis doesn\u0027t change the way resources are stored; it merely removes\ndependencies on the fact that they\u0027re in a table.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9958610552c0bd7558b41cb8addbd865587f142a", "tree": "38106fadf812bca10fc5b2c9bef8912de154df74", "parents": [ "32180e402f9ff1f3389c99edf3f393425e706080" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:28 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:25 2010 -0800" }, "message": "PCI: set PCI_PREF_RANGE_TYPE_64 in pci_bridge_check_ranges\n\nMake pci_bridge_check_ranges() store the PCI_PREF_RANGE_TYPE_64 in\naddition to IORESOURCE_MEM_64. Just like pci_read_bridge_bases().\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "32180e402f9ff1f3389c99edf3f393425e706080", "tree": "8bdc06675bdaf8dc79916e96e4ca666343bb1b23", "parents": [ "9789ac979b6b6ae6cc09f7b29c88e95ecb14ec39" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:27 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:25 2010 -0800" }, "message": "PCI: pciehp: second try to get big range for pcie devices\n\nHandle the case where the slot bridge that doesn\u0027t get a pre-allocated\nresource big enough to handle its child resources.. For example pcie\ndevices need 256M, but the bridge only gets 2M preallocated.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6841ec681a88b66651e4563040b9c7a7ad25d7b5", "tree": "412ddf4db54257d64136930ccd921e674fffd1f9", "parents": [ "977d17bb1749517b353874ccdc9b85abc7a58c2a" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:25 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:23 2010 -0800" }, "message": "PCI: introduce pci_assign_unassigned_bridge_resources\n\nFor use by pciehp.\n\npci_setup_bridge() will not check enabled for the slot bridge, otherwise\nupdate res is not updated to bridge BAR. That is, bridge is already\nenabled for port service.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "977d17bb1749517b353874ccdc9b85abc7a58c2a", "tree": "7abb576779682d20fb71d8656d50741571f0cdb2", "parents": [ "d65245c3297ac63abc51a976d92f45f2195d2854" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:24 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:22 2010 -0800" }, "message": "PCI: update bridge resources to get more big ranges in PCI assign unssigned\n\nBIOS separates IO ranges between several IOHs, and on some slots, BIOS assigns\nresources to a bridge, but stops assigning resources to the device under that\nbridge, because the device needs a big resource.\n\nSo:\n 1. allocate resources and record the failed device resources\n 2. clear the BIOS assigned resources of the parent bridge of failing device\n 3. go back and call pci assign unassigned\n 4. if it still fails, go up the tree, clear more bridges. and try again\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "d65245c3297ac63abc51a976d92f45f2195d2854", "tree": "97dbc9a714ef03810609f2d5faca1f56fd872547", "parents": [ "cd81e1ea1a4cda94aa5f3e942301cf0da497c262" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:23 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:21 2010 -0800" }, "message": "PCI: don\u0027t shrink bridge resources\n\nWhen clearing leaf bridge resources, trying to get a big enough one, we\ncould shrink the bridge if there is no resource under it. Confirm\nagainst the old resource side to make sure we\u0027re increasing the\nallocation.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "568ddef8735d4a51a521ba6af026ee0c32281566", "tree": "967c71b21ae4ecbafa9547726b6e34848215c13e", "parents": [ "5009b46025acb2d3955d2c93574604fba667ef39" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:21 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:20 2010 -0800" }, "message": "PCI: add failed_list to pci_bus_assign_resources\n\nThis allows us to track failed allocations for later re-trying with\nreallocation.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5009b46025acb2d3955d2c93574604fba667ef39", "tree": "13c9822a92c3b797364313f1e52856caf6ab67c3", "parents": [ "ba02b242bbf8e4e1bc63d62e8ccec33b4e5ea132" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:20 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:19 2010 -0800" }, "message": "PCI: add pci_bridge_release_resources and pci_bus_release_bridge_resources\n\nWe use this in later patches to free resrouce ranges for reassignment in\nan effort to support a wider variety of PCI topologies.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7c9342b8dd1a32386fc32bffb9eedebbfe264763", "tree": "5e1e96a1f9bd0808ec3ded0a0cfbf6cf6917eff0", "parents": [ "5eeec0ec931a01e85b3701ce121b7d8a1800ec60" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Tue Dec 22 15:02:24 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:00 2010 -0800" }, "message": "PCI: don\u0027t dump resource when bus resource flags indicates unused\n\nDon\u0027t print out resources without flags to avoid cluttering up the debug\noutput.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7cc5997d1dada3bdeed95a59c2f4f6c66cbb0767", "tree": "d93b2e63dbc6ee0a45bdbe222a0c9a74005249b1", "parents": [ "b0fc889c4311835ae7d02f433154bc20cad9ee11" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Tue Dec 22 15:02:21 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:16:59 2010 -0800" }, "message": "PCI: separate pci_setup_bridge to small functions\n\nThis is a good cleanup in itself, and makes it easier to modify specific\nresource types in later code.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nAcked-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "59353ea30e65ab3ae181d6175e3212e1361c3787", "tree": "4fc54f9c8e3b4dd5af6d7f125739ccac9f9d6410", "parents": [ "04b55c4732780381410e52db0e9bfb7661f2b4b3" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@hp.com", "time": "Mon Nov 30 14:51:44 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Dec 04 15:52:43 2009 -0800" }, "message": "PCI: Always set prefetchable base/limit upper32 registers\n\nPrior to 1f82de10 we always initialized the upper 32bits of the\nprefetchable memory window, regardless of the address range used.\nNow we only touch it for a \u003e32bit address, which means the upper32\nregisters remain whatever the BIOS initialized them too.\n\nIt\u0027s valid for the BIOS to set the upper32 base/limit to\n0xffffffff/0x00000000, which makes us program prefetchable ranges\nlike 0xffffffffabc00000 - 0x00000000abc00000\n\nRevert the chunk of 1f82de10 that made this conditional so we always\nwrite the upper32 registers and remove now unused pref_mem64 variable.\n\nSigned-off-by: Alex Williamson \u003calex.williamson@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "865df576e8fc70daf297b53e61a4fbefc719d065", "tree": "59abb13e1dd402bf8cb4496ab94bbceb2ac2ee2b", "parents": [ "0207c356ef0e2bae6ce4603080d42c130d7debc6" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Wed Nov 04 10:32:57 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Nov 04 13:06:44 2009 -0800" }, "message": "PCI: improve discovery/configuration messages\n\nThis makes PCI resource management messages more consistent and adds a few\nnew messages to aid debugging.\n\nWhenever we assign resources to a device, update a BAR, or change a\nbridge aperture, it\u0027s worth noting it.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c7dabef8a2c59e6a3de9d66fc35fb6a43ef7172d", "tree": "0f8b0021e693a0e380ef9026083b59d0909dffc6", "parents": [ "4fd8bdc567e70c02fab7eeaaa7d2a64232add789" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Oct 27 13:26:47 2009 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Nov 04 13:06:41 2009 -0800" }, "message": "vsprintf: use %pR, %pr instead of %pRt, %pRf\n\nJesse accidentally applied v1 [1] of the patchset instead of v2 [2]. This\nis the diff between v1 and v2.\n\nThe changes in this patch are:\n - tidied vsprintf stack buffer to shrink and compute size more\n accurately\n - use %pR for decoding and %pr for \"raw\" (with type and flags) instead\n of adding %pRt and %pRf\n\n[1] http://lkml.org/lkml/2009/10/6/491\n[2] http://lkml.org/lkml/2009/10/13/441\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a369c791e881503a6253dafc0d0ad5e41e5557e5", "tree": "20de1e773f328875afbfaf96fedd3991e9288f68", "parents": [ "fd95541e23e2c9acb1e38cd41fc0c7cc37fceb53" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Oct 06 15:33:44 2009 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Nov 04 08:47:18 2009 -0800" }, "message": "PCI: print resources consistently with %pRt\n\nThis uses %pRt to print additional resource information (type, size,\nprefetchability, etc.) consistently.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "55a1098476619d5d8f4cdae7240ea759274dead7", "tree": "841931bc1c5297788c28f55b4ba2a73d7a22442d", "parents": [ "964fe080d94db82a3268443e9b9ece4c60246414" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Oct 27 09:39:18 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Oct 27 09:39:18 2009 -0700" }, "message": "Revert \"PCI: get larger bridge ranges when space is available\"\n\nThis reverts commit 308cf8e13f42f476dfd6552aeff58fdc0788e566. This\npatch had trouble with transparent bridges, among other things. A more\nreadable and correct version should land in 2.6.33.\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "308cf8e13f42f476dfd6552aeff58fdc0788e566", "tree": "e3a12e8519900667ec93ad9a21a71e6e5d035b6a", "parents": [ "19eea630f7c56038dd80fe2f6910c78655bf29c8" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sun Sep 13 15:57:10 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Oct 07 09:28:18 2009 -0700" }, "message": "PCI: get larger bridge ranges when space is available\n\nFound one system:\n[ 71.120590] pci 0000:40:05.0: scanning behind bridge, config 4f4a40, pass 0\n[ 71.138283] PCI: Scanning bus 0000:4a\n[ 71.140341] pci 0000:4a:00.0: found [15b3:6278] class 000c06 header type 00\n[ 71.157173] pci 0000:4a:00.0: reg 10 64bit mmio: [0x000000-0x0fffff]\n[ 71.161697] pci 0000:4a:00.0: reg 18 64bit mmio pref: [0x000000-0x7fffff]\n[ 71.179403] pci 0000:4a:00.0: reg 20 64bit mmio pref: [0x000000-0xfffffff]\n[ 71.185366] pci 0000:4a:00.0: calling quirk_resource_alignment+0x0/0x1dd\n[ 71.200846] pci 0000:4a:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with \u0027pcie_aspm\u003dforce\u0027\n[ 71.219623] PCI: Fixups for bus 0000:4a\n[ 71.222194] pci 0000:40:05.0: bridge 32bit mmio: [0xcf000000-0xcf0fffff]\n[ 71.238662] pci 0000:40:05.0: bridge 64bit mmio pref: [0xcd800000-0xcdffffff]\n[ 71.255793] PCI: Bus scan for 0000:4a returning with max\u003d4a\n\nDevice needs a big pref mmio, but BIOS doesn\u0027t allocate mmio to it aside\nfrom a small MMIO range. Later, the kernel will not allocate resources to\nthat to the device:\n[ 99.574030] pci 0000:4a:00.0: BAR 4: can\u0027t allocate mem resource [0xd0000000-0xcdffffff]\n[ 99.580102] pci 0000:4a:00.0: BAR 2: got res [0xcd800000-0xcdffffff] bus [0xcd800000-0xcdffffff] flags 0x12120c\n[ 99.602307] pci 0000:4a:00.0: BAR 2: moved to bus [0xcd800000-0xcdffffff] flags 0x12120c\n[ 99.615991] pci 0000:4a:00.0: BAR 0: got res [0xcf000000-0xcf0fffff] bus [0xcf000000-0xcf0fffff] flags 0x120204\n[ 99.634499] pci 0000:4a:00.0: BAR 0: moved to bus [0xcf000000-0xcf0fffff] flags 0x120204\n[ 99.654318] pci 0000:40:05.0: PCI bridge, secondary bus 0000:4a\n[ 99.658766] pci 0000:40:05.0: IO window: disabled\n[ 99.675478] pci 0000:40:05.0: MEM window: 0xcf000000-0xcf0fffff\n[ 99.681663] pci 0000:40:05.0: PREFETCH window: 0x000000cd800000-0x000000cdffffff\n\nSo try to get a big range in the pci bridge if there is no child using\nthat range. With the patch we get:\n[ 99.104525] pci 0000:4a:00.0: BAR 4: got res [0xfc080000000-0xfc08fffffff] bus [0xfc080000000-0xfc08fffffff] flags 0x12120c\n[ 99.123624] pci 0000:4a:00.0: BAR 4: moved to bus [0xfc080000000-0xfc08fffffff] flags 0x12120c\n[ 99.131977] pci 0000:4a:00.0: BAR 2: got res [0xfc090000000-0xfc0907fffff] bus [0xfc090000000-0xfc0907fffff] flags 0x12120c\n[ 99.149788] pci 0000:4a:00.0: BAR 2: moved to bus [0xfc090000000-0xfc0907fffff] flags 0x12120c\n[ 99.169248] pci 0000:4a:00.0: BAR 0: got res [0xc0200000-0xc02fffff] bus [0xc0200000-0xc02fffff] flags 0x120204\n[ 99.189508] pci 0000:4a:00.0: BAR 0: moved to bus [0xc0200000-0xc02fffff] flags 0x120204\n[ 99.206402] pci 0000:40:05.0: PCI bridge, secondary bus 0000:4a\n[ 99.210637] pci 0000:40:05.0: IO window: disabled\n[ 99.224856] pci 0000:40:05.0: MEM window: 0xc0200000-0xc03fffff\n[ 99.230019] pci 0000:40:05.0: PREFETCH window: 0x000fc080000000-0x000fc097ffffff\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "28760489a3f1e136c5ae8581c0fa8f63511f2f4c", "tree": "a3c890e9c8d9e98385691d56f5c007d280514fe5", "parents": [ "0ba379ec0fb182a87b8891c5754abbcd9c035b4f" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@aristanetworks.com", "time": "Wed Sep 09 14:09:24 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Sep 09 14:10:24 2009 -0700" }, "message": "PCI: pcie: Ensure hotplug ports have a minimum number of resources\n\nIn general a BIOS may goof or we may hotplug in a hotplug controller.\nIn either case the kernel needs to reserve resources for plugging\nin more devices in the future instead of creating a minimal resource\nassignment.\n\nWe already do this for cardbus bridges I am just adding a variant\nfor pcie bridges.\n\nv2: Make testing for pcie hotplug bridges based on a flag.\n\n So far we only set the flag for pcie but a header_quirk\n could easily be added for the non-standard pci hotplug\n bridges.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@aristanetworks.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6faf17f6f1ffc586d16efc2f9fa2083a7785ee74", "tree": "383d4a10cdc0b02bd8bc3a873613a68a06748cd7", "parents": [ "adda766193ea1cf3137484a9521972d080d0b7af" ], "author": { "name": "Chris Wright", "email": "chrisw@sous-sol.org", "time": "Fri Aug 28 13:00:06 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Sun Aug 30 08:37:25 2009 -0700" }, "message": "PCI SR-IOV: correct broken resource alignment calculations\n\nAn SR-IOV capable device includes an SR-IOV PCIe capability which\ndescribes the Virtual Function (VF) BAR requirements. A typical SR-IOV\ndevice can support multiple VFs whose BARs must be in a contiguous region,\neffectively an array of VF BARs. The BAR reports the size requirement\nfor a single VF. We calculate the full range needed by simply multiplying\nthe VF BAR size with the number of possible VFs and create a resource\nspanning the full range.\n\nThis all seems sane enough except it artificially inflates the alignment\nrequirement for the VF BAR. The VF BAR need only be aligned to the size\nof a single BAR not the contiguous range of VF BARs. This can cause us\nto fail to allocate resources for the BAR despite the fact that we\nactually have enough space.\n\nThis patch adds a thin PCI specific layer over the generic\nresource_alignment() function which is aware of the special nature of\nVF BARs and does sorting and allocation based on the smaller alignment\nrequirement.\n\nI recognize that while resource_alignment is generic, it\u0027s basically a\nPCI helper. An alternative to this patch is to add PCI VF BAR specific\ninformation to struct resource. I opted for the extra layer rather than\nadding such PCI specific information to struct resource. This does\nhave the slight downside that we don\u0027t cache the BAR size and re-read\nfor each alignment query (happens a small handful of times during boot\nfor each VF BAR).\n\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nCc: Yu Zhao \u003cyu.zhao@intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "d09ee9687e027fc7d2c6b95daf05a8ef3ff06340", "tree": "a7423042ba31ae5c1eb709d0e03115961b2b63b3", "parents": [ "1f82de10d6b1d845155363c895c552e61b36b51a" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Apr 23 20:49:25 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Jun 11 12:04:07 2009 -0700" }, "message": "PCI: improve resource allocation under transparent bridges\n\nWe could run out of space under under 4g, but devices under transparent\nbridges can use 64bit resources, so keep trying on the parent bus until\nwe hit a non-transparent bridge.\n\nImpact: better support for assigning unassigned resources\n\nReviewed-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1f82de10d6b1d845155363c895c552e61b36b51a", "tree": "3e93b9d1c97ae48509133fbbec9c81b4823816a5", "parents": [ "67b5db6502ddd27d65dea43bf036abbd82d0dfc9" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Apr 23 20:48:32 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Jun 11 12:04:06 2009 -0700" }, "message": "PCI/x86: don\u0027t assume prefetchable ranges are 64bit\n\nWe should not assign 64bit ranges to PCI devices that only take 32bit\nprefetchable addresses.\n\nTry to set IORESOURCE_MEM_64 in 64bit resource of pci_device/pci_bridge\nand make the bus resource only have that bit set when all devices under\nit support 64bit prefetchable memory. Use that flag to allocate\nresources from that range.\n\nReported-by: Yannick \u003cyannick.roehlly@free.fr\u003e\nReviewed-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "681bf597215c62bd6f5ae1180a58a38997122b5b", "tree": "92958a213d25859ced6aadf3ed13b3d0f4aa9220", "parents": [ "0e94ecd098347874e776f7818728613a335880d1" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Mon Apr 13 18:28:54 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Apr 22 14:49:25 2009 -0700" }, "message": "PCI: cleanup debug output resources\n\nRemove outputs for 0 sized resources and indicate prefetchability.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "296ccb086dfb89b5b8d73ef08c795ffdff12a597", "tree": "8c4ef0f0271e448b6843811a1bcded8c47c005a1", "parents": [ "7eb93b175d4de9438a4b0af3a94a112cb5266944" ], "author": { "name": "Yuji Shimada", "email": "shimada-yxb@necst.nec.co.jp", "time": "Fri Apr 03 16:41:46 2009 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Apr 06 11:25:06 2009 -0700" }, "message": "PCI: Setup disabled bridges even if buses are added\n\nThis patch sets up disabled bridges even if buses have already been\nadded.\n\npci_assign_unassigned_resources is called after buses are added.\npci_assign_unassigned_resources calls pci_bus_assign_resources.\npci_bus_assign_resources calls pci_setup_bridge to configure BARs of\nbridges.\n\nCurrently pci_setup_bridge returns immediately if the bus have already\nbeen added. So pci_assign_unassigned_resources can\u0027t configure BARs of\nbridges that were added in a disabled state; this patch fixes the issue.\n\nOn logical hot-add, we need to prevent the kernel from re-initializing\nbridges that have already been initialized. To achieve this,\npci_setup_bridge returns immediately if the bridge have already been\nenabled.\n\nWe don\u0027t need to check whether the specified bus is a root bus or not.\npci_setup_bridge is not called on a root bus, because a root bus does\nnot have a bridge.\n\nThe patch adds a new helper function, pci_is_enabled. I made the\nfunction name similar to pci_is_managed. The codes which use\nenable_cnt directly are changed to use pci_is_enabled.\n\nAcked-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Yuji Shimada \u003cshimada-yxb@necst.nec.co.jp\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b73e97d95c168cbc19bd1208c894077f25931ba1", "tree": "325b8ecf3358c9980f398166ec6d778c7dc32370", "parents": [ "74710ded8e16fc8dacbb702a5bac1a493d88549a" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Fri Mar 20 14:56:15 2009 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 20 14:57:32 2009 -0700" }, "message": "PCI: do not initialize bridges more than once\n\nIn preparation for PCI core hotplug, we need to ensure that we do\nnot attempt to re-initialize bridges that have already been initialized.\n\nWe only need to worry about non-root buses, since we will not allow\nroot bus removal.\n\nReported-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "ea7415512a07add2b09c070c9a5d1950833cf9b3", "tree": "1c0d7468f57d38f74f4649cb9f4655b1937cf2a0", "parents": [ "c48f1670f42b71f39f4a3bfba01ffb691cc9206c" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Wed Feb 18 10:44:29 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Thu Mar 19 19:29:35 2009 -0700" }, "message": "PCI: constify pci_bus_assign_resources()\n\ndrivers/pci/hotplug/fakephp.c: In function \u0027pci_rescan_bus\u0027:\ndrivers/pci/hotplug/fakephp.c:271: warning: passing argument 1 of \u0027pci_bus_assign_resources\u0027 discards qualifiers from pointer target type\n\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a19f5df7d9696b9e53ba7c865816597057d5f76e", "tree": "344ead23faba0fa94c3c1711b70ac61325393a66", "parents": [ "db5679437a2b938c9127480a3923633721583a4f" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Thu Dec 18 16:34:19 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:19 2009 -0800" }, "message": "PCI: use dev_printk for PCI bus resource mssages\n\nSince pci_bus has a struct device, use dev_printk directly instead\nof faking it by hand.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "29935282f24a6ce2f0a65c3d77fb7f695461f583", "tree": "c2f99a3b4fe45050a1c30ec5b0f0f75dcff90aa8", "parents": [ "2a9d35219c593bdf46ec21f2b75a6370af7af1b0" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Wed Dec 10 13:02:18 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:12:44 2009 -0800" }, "message": "PCI: make PCI bus resource messages more meaningful\n\nChange PCI bus resource messages so they have a bit more context\nand look like the rest of PCI, e.g.,\n\n - bus: 00 index 0 io port: [0x00-0xffff]\n - bus: 00 index 1 mmio: [0x000000-0xffffffff]\n + pci 0000:00: bus resource 0 io : [0x00-0xffff]\n + pci 0000:00: bus resource 1 mem: [0x000000-0xffffffff]\n\nThis also changes them from KERN_INFO to KERN_DEBUG.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "022edd86d7c864bc8fadc3c8ac4e6a464472ab05", "tree": "6495a6f473837f1c880c052d76ff9358de76297d", "parents": [ "c322b28a04c084a467a862766f74c40c917a721c" ], "author": { "name": "Zhao, Yu", "email": "yu.zhao@intel.com", "time": "Mon Oct 13 19:24:28 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 10:54:28 2008 -0700" }, "message": "PCI: use resource_size() everywhere.\n\nThis is a cleanup that replaces the resource calculation formula with\nresource_size().\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "096e6f673dc02a6394dc9a7d8f8735c6978f5b91", "tree": "50e9f463b089dc1b62c3f260a27d500040534525", "parents": [ "332d2e7834986a9326ec3fa6a91641daef81746c" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Mon Oct 20 15:07:37 2008 +1100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 20 09:12:32 2008 -0700" }, "message": "pci: Use new %pR to print resource ranges\n\nThis converts things in drivers/pci to use %pR to printout the\ncontent of a struct resource instead of hand-casted %llx or\nother variants.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "6b2ada82101a08e2830fb29d7dc9b858be637dd4", "tree": "c0580c250211f8773674f3a4f7cd575818f153cc", "parents": [ "278429cff8809958d25415ba0ed32b59866ab1a8", "3b7ecb5d2ffde82efd1b1bcc6780dc8a019acf02", "77af7e3403e7314c47b0c07fbc5e4ef21d939532", "15160716eea5591eb31f40fd4dba56d83bea4209", "1fa63a817d27af7dc0d5ed454eb8fe5dec65fac7", "85462323555dda749f1c5373a8d72679464c968d" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Oct 15 12:48:44 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Oct 15 12:48:44 2008 +0200" }, "message": "Merge branches \u0027core/softlockup\u0027, \u0027core/softirq\u0027, \u0027core/resources\u0027, \u0027core/printk\u0027 and \u0027core/misc\u0027 into core-v28-for-linus\n" }, { "commit": "8308c54d7e312f7a03e2ce2057d0837e6fe3843f", "tree": "452b32a3d2182c4d150d632f243e31f16b2ac0ce", "parents": [ "947d0496cf3e12ebfa70b3eaf561c25403247ce9" ], "author": { "name": "Jeremy Fitzhardinge", "email": "jeremy@goop.org", "time": "Thu Sep 11 01:31:50 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sun Sep 14 17:24:27 2008 +0200" }, "message": "generic: redefine resource_size_t as phys_addr_t\n\nThere\u0027s no good reason why a resource_size_t shouldn\u0027t just be a\nphysical address, so simply redefine it in terms of phys_addr_t.\n\nSigned-off-by: Jeremy Fitzhardinge \u003cjeremy.fitzhardinge@citrix.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "0cb60efd03ed82d02f44a14594714367e59e8abc", "tree": "23d9443331673a75e296781031f652e3e87687cc", "parents": [ "c19e80808b34b3de5c20884f11f58c3b6988daff", "395a125c6237802b19bf22b41017c99ff57f1024" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Sep 13 14:47:33 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Sep 13 14:47:33 2008 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:\n PCI: re-add debug prints for unmodified BARs\n PCI: fix pciehp_free_irq()\n PCI Hotplug: fakephp: fix deadlock... again\n PCI: Fix printk warnings in setup-bus.c\n PCI: Fix printk warnings in probe.c\n PCI/iommu: blacklist DMAR on Intel G31/G33 chipsets\n" }, { "commit": "53bc88701be91e7f631ad31418b32392aa952e9b", "tree": "9b8530303fb13fab447ea3c4dba4a7853222ce39", "parents": [ "4ca8a7726fb0e8094fdb56f2ae2d69fcf9254eae" ], "author": { "name": "Johann Felix Soden", "email": "johfel@users.sourceforge.net", "time": "Fri Aug 22 20:25:10 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Sep 09 11:43:38 2008 -0700" }, "message": "PCI: Fix printk warnings in setup-bus.c\n\nAgain, the cleaned up code introduced some resource warnings:\ndrivers/pci/setup-bus.c: In function \u0027pci_bus_dump_res\u0027:\ndrivers/pci/setup-bus.c:542: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 5 has type \u0027resource_size_t\u0027\ndrivers/pci/setup-bus.c:542: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 6 has type \u0027resource_size_t\u0027\n\nFix those up too.\n\nSigned-off-by: Johann Felix Soden \u003cjohfel@users.sourceforge.net\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5f17cfce5776c566d64430f543a289e5cfa4538b", "tree": "f5da29c42ce3b29a35791d9192fbcbe0fb737f30", "parents": [ "de014d617636d6a6bd5aef3b3d1f7f9a35669057" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Sep 04 01:33:59 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Sep 04 01:33:59 2008 -0700" }, "message": "PCI: fix pbus_size_mem() resource alignment for CardBus controllers\n\nCommit 884525655d07fdee9245716b998ecdc45cdd8007 (\"PCI: clean up resource\nalignment management\") changed the resource handling to mark how a\nresource was aligned on a per-resource basis.\n\nThus, instead of looking at the resource number to determine whether it\nwas a bridge resource or a regular resource (they have different\nalignment rules), we should just ask the resource for its alignment\ndirectly.\n\nThe reason this broke only cardbus resources was that for the other\ntypes of resources, the old way of deciding alignment actually still\nhappened to work. But CardBus bridge resources had been changed by\ncommit 934b7024f0ed29003c95cef447d92737ab86dc4f (\"Fix cardbus resource\nallocation\") to look more like regular resources than PCI bridge\nresources from an alignment handling standpoint.\n\nReported-and-tested-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "0679c2f47d50651018dd5e0bf35330f6e6ae35ec", "tree": "2df65ebb958f930abf0b7ad35fd6e528398b1679", "parents": [ "76fbc263ff7e42ce8b21b8aee176e3c74b45f81a", "5b664cb235e97afbf34db9c4d77f08ebd725335e" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 18 22:39:59 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 18 22:39:59 2008 +0200" }, "message": "Merge branch \u0027linus\u0027 into pci-for-jesse\n" }, { "commit": "80ccba1186d48fa728dc4b1456cc07ffb07da501", "tree": "b58826b8d0e42e2a41e5f5632bf95e52f9dfc676", "parents": [ "b86ec7ed2877f560ff069e8ed1b433a9005619c6" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Jun 13 10:52:11 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jun 25 16:05:13 2008 -0700" }, "message": "PCI: use dev_printk when possible\n\nConvert printks to use dev_printk().\n\nI converted pr_debug() to dev_dbg(). Both use KERN_DEBUG and are enabled\nonly when DEBUG is defined.\n\nI converted printk(KERN_DEBUG) to dev_printk(KERN_DEBUG), not to dev_dbg(),\nbecause dev_dbg() is only enabled when DEBUG is defined.\n\nI converted DBG(KERN_INFO) (only in setup-bus.c) to dev_info(). The DBG()\nname makes it sound like debug, but it\u0027s been enabled forever, so dev_info()\npreserves the previous behavior.\n\nI tried to make the resource assignment formats more consistent, e.g.,\n \"BAR %d: got res [%#llx-%#llx] bus [%#llx-%#llx] flags %#lx\\n\"\ninstead of sometimes using \"start-end\" and sometimes using \"size@start\".\nI\u0027m not attached to one or the other; I\u0027d just like them consistent.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "76fbc263ff7e42ce8b21b8aee176e3c74b45f81a", "tree": "7866077c7b014be1bd9f69110d04432b6b6cf868", "parents": [ "9bf8a1a79d549a0cf3b26c88d1ac8cdf07deafee" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel@gmail.com", "time": "Mon Jun 23 20:33:06 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Jun 23 21:57:21 2008 +0200" }, "message": "pci: debug extra pci bus resources\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "934b7024f0ed29003c95cef447d92737ab86dc4f", "tree": "eade0cdc07dbb8ab46c57244444fc8697e129f66", "parents": [ "29591b92e19f409d5ad4c099c2b7b5ea56f50dfa" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 22 18:16:30 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 22 18:16:30 2008 -0700" }, "message": "Fix cardbus resource allocation\n\nCommit 884525655d07fdee9245716b998ecdc45cdd8007 (\"PCI: clean up resource\nalignment management\") didn\u0027t set the alignment information for the\ncardbus window resources, causing their subsequent allocations to fail\nmiserably with a message like\n\n yenta_cardbus 0000:15:00.0: device not available because of BAR 7 [100:1ff] collisions\n yenta_cardbus: probe of 0000:15:00.0 failed with error -16\n\nor similar.\n\nThis fixes it and clarifies the code a bit too (we used to have to use\nthe insane PCI bridge alignment logic that put the alignment in the\n\"start\" field, this makes it use the slightly easier-to-understand\nsize-based alignment, and allows us to set the resource start to zero\nuntil it gets allocated).\n\nReported-and-tested-by: Jeff Chua \u003cjeff.chua.linux@gmail.com\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "a391f19717984a8f70756b29074298f379fcfdbc", "tree": "d6590a434e8801cad54bafe300f2cfb36a9767bd", "parents": [ "5468ae617035f06ae1e07c264d6cdfcd721b539f" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Fri Apr 18 13:53:57 2008 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:13 2008 -0700" }, "message": "PCI: pci_setup_bridge() mustn\u0027t be __devinit\n\nWARNING: drivers/pci/built-in.o(.text+0x28ee9): Section mismatch in reference from the function pci_bus_assign_resources() to the function .devinit.text:pci_setup_bridge()\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "5468ae617035f06ae1e07c264d6cdfcd721b539f", "tree": "538e9e4c28d80c183d5c1c6ad01c6798d9ea5b08", "parents": [ "7f7b5de2c0e10aa35ad9909edb1af9f2aed2f5d0" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Fri Apr 18 13:53:56 2008 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:12 2008 -0700" }, "message": "PCI: pci_bus_size_cardbus() mustn\u0027t be __devinit\n\nWARNING: drivers/pci/built-in.o(.text+0x28e1f): Section mismatch in reference from the function pci_bus_size_bridges() to the function .devinit.text:pci_bus_size_cardbus()\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "884525655d07fdee9245716b998ecdc45cdd8007", "tree": "975cbf2b5079430240d3496323df1a266be95d27", "parents": [ "d75b305295c38ba9610ff3b2200f7d1989dc55fd" ], "author": { "name": "Ivan Kokshaysky", "email": "ink@jurassic.park.msu.ru", "time": "Sun Mar 30 19:50:14 2008 +0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:08 2008 -0700" }, "message": "PCI: clean up resource alignment management\n\nDone per Linus\u0027 request and suggestions. Linus has explained that\nbetter than I\u0027ll be able to explain:\n\nOn Thu, Mar 27, 2008 at 10:12:10AM -0700, Linus Torvalds wrote:\n\u003e Actually, before we go any further, there might be a less intrusive\n\u003e alternative: add just a couple of flags to the resource flags field (we\n\u003e still have something like 8 unused bits on 32-bit), and use those to\n\u003e implement a generic \"resource_alignment()\" routine.\n\u003e\n\u003e Two flags would do it:\n\u003e\n\u003e - IORESOURCE_SIZEALIGN: size indicates alignment (regular PCI device\n\u003e resources)\n\u003e\n\u003e - IORESOURCE_STARTALIGN: start field is alignment (PCI bus resources\n\u003e during probing)\n\u003e\n\u003e and then the case of both flags zero (or both bits set) would actually be\n\u003e \"invalid\", and we would also clear the IORESOURCE_STARTALIGN flag when we\n\u003e actually allocate the resource (so that we don\u0027t use the \"start\" field as\n\u003e alignment incorrectly when it no longer indicates alignment).\n\u003e\n\u003e That wouldn\u0027t be totally generic, but it would have the nice property of\n\u003e automatically at least add sanity checking for that whole \"res-\u003estart has\n\u003e the odd meaning of \u0027alignment\u0027 during probing\" and remove the need for a\n\u003e new field, and it would allow us to have a generic \"resource_alignment()\"\n\u003e routine that just gets a resource pointer.\n\nBesides, I removed IORESOURCE_BUS_HAS_VGA flag which was unused for ages.\n\nSigned-off-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Gary Hade \u003cgaryhade@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "12c22d6ef299ccf0955e5756eb57d90d7577ac68", "tree": "c9afb810d740363b0b731644f006c54c51369cf2", "parents": [ "05dda977f2574c3341abef9b74c27d2b362e1e3a" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 26 11:22:40 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 26 11:22:40 2008 -0700" }, "message": "Revert \"PCI: remove transparent bridge sizing\"\n\nThis reverts commit 8fa5913d54f3b1e09948e6a0db34da887e05ff1f, which\ncaused various interesting problems for people, including wrong resource\nallocations. See for example bugzilla entry \"2.6.25-rc2: ohci1394\nproblem (MMIO broken)\" at\n\n\thttp://bugzilla.kernel.org/show_bug.cgi?id\u003d10080\n\nAnd Gary Hade says:\n\n \"The same change had also exposed an issue reported by Paul Martin that\n has been causing an Oops while hotplugging ThinkPads to a ThinkPad\n Dock II. See\n\n\thttp://lkml.org/lkml/2008/2/19/405\n\thttp://bugzilla.kernel.org/show_bug.cgi?id\u003d9961\n\n I have a fix for the ThinkPad docking Oops but if the issue being\n discussed here is caused by the transparent bridge sizing removal\n change I totally agree that it should be reverted.\"\n\n The transparent bridge sizing removal change was motivated by\n insufficient PCI memory resource for a transparent bridge window that\n was being created as a result of expansion ROM(s) being included in\n the transparent bridge sizing calculations.\n\n A later \"PCI: Remove default PCI expansion ROM memory allocation\"\n change ( re: http://lkml.org/lkml/2007/12/11/361 ) removes the\n expansion ROM(s) from the transparent bridge sizing calculations which\n actually resolves the original issue in a different manner. So, even\n if the \"PCI: remove transparent bridge sizing\" is not problematic it\n is no longer needed anyway.\"\n\nIdentified-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nTested-by: Thomas Meyer \u003cthomas@m3y3r.de\u003e\nAcked-by: Gary Hade \u003cgaryhade@us.ibm.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Stefan Richter \u003cstefanr@s5r6.in-berlin.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "13d36c248379ca09c269f5dbed6dce1e3a326a48", "tree": "e502b3ca016a6cc57b014a145d63f32e16b3e251", "parents": [ "6e4be1ff2e767fc3a34c5e8d67c3cba107c02099" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Mon Feb 04 23:50:12 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Feb 21 15:34:38 2008 -0800" }, "message": "PCI: fix up setup-bus.c #ifdef\n\nUse upper_32_bits(): no code changes, one less ifdef.\n\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "451124a7cc6c89fcb83d48082c7290f16f652f1c", "tree": "e81340f0d9e83f5447d60418972a064c888463c9", "parents": [ "4105717bc98ba01663ff28f8a16d8716ba9d07fe" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Sat Feb 02 22:33:43 2008 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sat Feb 02 15:08:04 2008 -0800" }, "message": "PCI: fix 4x section mismatch warnings\n\nThe following warnings were issued during build of\ndrivers/pci with an allyesconfig build:\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0xdaf): Section mismatch in reference from the function pci_add_new_bus() to the function .devinit.text:pci_alloc_child_bus()\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0x15e2): Section mismatch in reference from the function pci_scan_single_device() to the function .devinit.text:pci_scan_device()\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0x1b0c5): Section mismatch in reference from the function pci_bus_assign_resources() to the function .devinit.text:pci_setup_bridge()\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0x1b32d): Section mismatch in reference from the function pci_bus_size_bridges() to the function .devinit.text:pci_bus_size_cardbus()\n\nInvestigating each case closer it looked like all\nreferred functions are only used in the init phase\nor during hotplug.\nSo to avoid wasting too much memory in the non-hotplug\ncase the simpler fix was to allow the fuctions to\nuse code/data from the __devinit sections.\nThis was done in all four case by adding the __ref\nannotation.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nCc: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "c40a22e0ce5eb400f27449e59e43d021bee58b8d", "tree": "9335519358ff657a6a80baefd759337e324dc26d", "parents": [ "f07234b66af1d1a204b9ddabdbdb312e8f1fb35e" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Mon Dec 10 17:32:15 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:25 2008 -0800" }, "message": "PCI: Fix bus resource assignment on 32 bits with 64b resources\n\nThe current pci_assign_unassigned_resources() code doesn\u0027t work properly\non 32 bits platforms with 64 bits resources. The main reason is the use\nof unsigned long in various places instead of resource_size_t.\n\nThis is a pre-requisite for making powerpc use the generic code instead of\nits own half-useful implementation.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "8fa5913d54f3b1e09948e6a0db34da887e05ff1f", "tree": "22d64e43f445e140d45966dac65c86b67c94b676", "parents": [ "ecb3908046ce9ce7feb44e2c2cf77ccdbe231f70" ], "author": { "name": "Gary Hade", "email": "garyhade@us.ibm.com", "time": "Wed Oct 03 15:55:51 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 12 15:03:17 2007 -0700" }, "message": "PCI: remove transparent bridge sizing\n\nRemove transparent bridge sizing.\n\nDue to code in pci_read_bridge_bases() [drivers/pci/probe.c] the child\nbus of a transparent bridge already has access to the parent bus\nresources so transparent bridge sizing appears unnecessary. The bridge\nsizing includes alignment and granularity adjustments that can cause\nsignificantly more memory to be reserved from the parant bus than\nrequired by devices on the child bus and allotted by _CRS.\n\nSigned-off-by: Gary Hade \u003cgary.hade@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "6f6f8c2f4b59711857d14ada8e70309d52e8fae4", "tree": "3936c964c97a29fe41929b0b591311a2ad9d1adf", "parents": [ "caa5171622c8fef70fa20d2d74f4326866039df9" ], "author": { "name": "Milind Arun Choudhary", "email": "milindchoudhary@gmail.com", "time": "Mon Jul 09 11:55:51 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jul 11 16:02:11 2007 -0700" }, "message": "PCI: ROUND_UP macro cleanup in drivers/pci\n\nROUND_UP macro cleanup, use ALIGN where ever appropriate\n\nSigned-off-by: Milind Arun Choudhary \u003cmilindchoudhary@gmail.com\u003e\nAcked-by: Scott Murray \u003cscottm@somanetworks.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "96bde06a2df1b363206d3cdef53134b84ff37813", "tree": "4d3cc2c8c73a0534bc65e56ff1dec39eaa823b4c", "parents": [ "6ba186361ed2cda7e174856a3ab8a8e3237b3c3d" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Mon Mar 26 21:53:30 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:35 2007 -0700" }, "message": "pci: do not mark exported functions as __devinit\n\nFunctions marked __devinit will be removed after kernel init. But being\nexported they are potentially called by a module much later.\n\nSo the safer choice seems to be to keep the function even in the non\nCONFIG_HOTPLUG case.\n\nThis silence the follwoing section mismatch warnings:\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_add_device from __ksymtab_gpl between \u0027__ksymtab_pci_bus_add_device\u0027 (at offset 0x20) and \u0027__ksymtab_pci_walk_bus\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_create_bus from __ksymtab_gpl between \u0027__ksymtab_pci_create_bus\u0027 (at offset 0x40) and \u0027__ksymtab_pci_stop_bus_device\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_max_busnr from __ksymtab_gpl between \u0027__ksymtab_pci_bus_max_busnr\u0027 (at offset 0xc0) and \u0027__ksymtab_pci_assign_resource_fixed\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_claim_resource from __ksymtab_gpl between \u0027__ksymtab_pci_claim_resource\u0027 (at offset 0xe0) and \u0027__ksymtab_pcie_port_bus_type\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_add_devices from __ksymtab between \u0027__ksymtab_pci_bus_add_devices\u0027 (at offset 0x70) and \u0027__ksymtab_pci_bus_alloc_resource\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_scan_bus_parented from __ksymtab between \u0027__ksymtab_pci_scan_bus_parented\u0027 (at offset 0x90) and \u0027__ksymtab_pci_root_buses\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_assign_resources from __ksymtab between \u0027__ksymtab_pci_bus_assign_resources\u0027 (at offset 0x4d0) and \u0027__ksymtab_pci_bus_size_bridges\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_size_bridges from __ksymtab between \u0027__ksymtab_pci_bus_size_bridges\u0027 (at offset 0x4e0) and \u0027__ksymtab_pci_setup_cardbus\u0027\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "4516a618a76eae6eb1b37259ad49f39b7b7f33d8", "tree": "9122bdc9e596064542f14b23450ac24e18af1c4d", "parents": [ "26ba05e4c66ad3fafe08412ffcf8c328cc4640b0" ], "author": { "name": "Atsushi Nemoto", "email": "anemo@mba.ocn.ne.jp", "time": "Mon Feb 05 16:36:06 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 16 15:30:10 2007 -0800" }, "message": "PCI: Make CARDBUS_MEM_SIZE and CARDBUS_IO_SIZE boot options\n\nCARDBUS_MEM_SIZE was increased to 64MB on 2.6.20-rc2, but larger size might\nresult in allocation failure for the reserving itself on some platforms\n(for example typical 32bit MIPS). Make it (and CARDBUS_IO_SIZE too)\ncustomizable by \"pci\u003d\" option for such platforms.\n\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nCc: Daniel Ritz \u003cdaniel.ritz@gmx.ch\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "fe0e5c4d947d34f10002b4cf272f0ebf110305b7", "tree": "0f514dc726ab1fa80386dc2a3827661eb6e34b37", "parents": [ "192636ad9097b13d58310a6358fd512d3084c09a" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Fri Dec 22 01:11:36 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Fri Dec 22 08:55:51 2006 -0800" }, "message": "[PATCH] increase CARDBUS_MEM_SIZE\n\nLinus sayeth:\n\nGoogle knows everything, and finds, on MS own site no less:\n\n \"Windows 2000 default resources:\n\n One 4K memory window\n\n One 2 MB memory window\n\n Two 256-byte I/O windows\"\n\nwhich is clearly utterly bogus and insufficient. But Microsoft apparently\nrealized this, and:\n\n \"Windows XP default resources:\n\n Because one memory window of 4K and one window of 2 MB are not\n sufficient for CardBus controllers in many configurations, Windows XP\n allocates larger memory windows to CardBus controllers where possible.\n However, resource windows are static (that is, the operating system\n does not dynamically allocate larger memory windows if new devices\n appear.) Under Windows XP, CardBus controllers will be assigned the\n following resources:\n\n One 4K memory window, as in Windows 2000\n\n 64 MB memory, if that amount of memory is available. If 64 MB is not\n available the controller will receive 32 MB; if 32 MB is not available,\n the controller will receive 16 MB; if 16 MB is not available, the\n bridge will receive 8 MB; and so on down to a minimum assignment of 1\n MB in configurations where memory is too constrained for the operating\n system to provide a larger window.\n\n Two 256-byte I/O windows\"\n\nSo I think we have our answer. Windows uses one 4k window, and one 64MB\nwindow. And they are no more dynamic than we are (we _could_ try to do it\ndynamically, but let\u0027s face it, it\u0027s fairly painful to dynamically expand\nPCI bus resources - you may need to reprogram everything up to the root,\nso it would be absolutely crazy to do that unless you have some serious\nmasochistic tendencies).\n\nSo let\u0027s just increase our default value to 64M too.\n\nCc: Markus Rechberger \u003cmrechberger@gmail.com\u003e\nCc: Daniel Ritz \u003cdaniel.ritz@gmx.ch\u003e\nCc: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "9bded00bf62090ebc9d6e8be640cdb69e8497db6", "tree": "bee6645e3b226127d312fb0a152a2586b1d16a18", "parents": [ "18e39913d41ca4d63e9e94a2ad25b5ea31caaa7f" ], "author": { "name": "Kenji Kaneshige", "email": "kaneshige.kenji@jp.fujitsu.com", "time": "Wed Oct 04 02:15:34 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:14 2006 -0700" }, "message": "[PATCH] fix \"PCI: assign ioapic resource at hotplug\"\n\nRoland Dreier wrote:\n\u003e The change \"PCI: assign ioapic resource at hotplug\" (commit\n\u003e 23186279658cea6d42a050400d3e79c56cb459b4 in Linus\u0027s tree) makes\n\u003e networking stop working on my system (SuperMicro H8QC8 with four\n\u003e dual-core Opteron 885 CPUs). In particular, the on-board NIC stops\n\u003e working, probably because it gets assigned the wrong IRQ (225 in the\n\u003e non-working case, 217 in the working case)\n\u003e\n\u003e With that patch applied, e1000 doesn\u0027t work. Reverting just that\n\u003e patch (shown below) from Linus\u0027s latest tree fixes things for me.\n\u003e\n\nThe cause of this problem might be an wrong assumption that the \u0027start\u0027\nmember of resource structure for ioapic device has non-zero value if the\nresources are assigned by firmware. The \u0027start\u0027 member of ioapic device\nseems not to be set even though the resources were actually assigned to\nioapic devices by firmware.\n\nCc: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nCc: MUNEDA Takahiro \u003cmuneda.takahiro@jp.fujitsu.com\u003e\nCc: Satoru Takeuchi \u003ctakeuchi_satoru@jp.fujitsu.com\u003e\nCc: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nCc: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nCc: Roland Dreier \u003crdreier@cisco.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "23186279658cea6d42a050400d3e79c56cb459b4", "tree": "6ee58000baed3cd34af6a47f49f0d6107c3bdf2d", "parents": [ "d5cdb67236dba94496de052c9f9f431e1fc658f4" ], "author": { "name": "Satoru Takeuchi", "email": "takeuchi_satoru@jp.fujitsu.com", "time": "Tue Sep 12 10:21:44 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Sep 26 17:43:54 2006 -0700" }, "message": "PCI: assign ioapic resource at hotplug\n\nWe need to assign resources to ioapics being hot-added. This patch\nchanges pbus_assign_resources_sorted() to assign resources if the\nioapic has no assigned resources.\n\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: MUNEDA Takahiro \u003cmuneda.takahiro@jp.fujitsu.com\u003e\nSigned-off-by: Satoru Takeuchi \u003ctakeuchi_satoru@jp.fujitsu.com\u003e\nSigned-off-by: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "1396a8c3f7cec9f5e0d00bd089be21fc468f0f1c", "tree": "b96018459e26a24e20221f0bb7d5bb25d6608147", "parents": [ "7c7459d1f91abdf1e31ef80cad526e83e8b8ba4e" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 12 15:14:29 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Jun 27 09:23:58 2006 -0700" }, "message": "[PATCH] 64bit resource: fix up printks for resources in pci core and hotplug drivers\n\nThis is needed if we wish to change the size of the resource structures.\n\nBased on an original patch from Vivek Goyal \u003cvgoyal@in.ibm.com\u003e\n\nCc: Vivek Goyal \u003cvgoyal@in.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "c0da3ba0a29d70c95ed39366a1c9b849f3439fbe", "tree": "e8d31f5137a8f5bc5337e139c0778f8ba6b4b4f4", "parents": [ "b209a6ee49099b7500abf024f7b6b9648b5a3eac" ], "author": { "name": "Kimball Murray", "email": "kimball.murray@gmail.com", "time": "Wed May 31 14:20:04 2006 -0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 12:00:00 2006 -0700" }, "message": "[PATCH] PCI: don\u0027t move ioapics below PCI bridge\n\nA recent Stratus x86_64 platform uses a system ioapic that is a PCI device\nlocated below a PCI bridge. Other platforms like this may exist.\n\nThis patch fixes a problem wherein the kernel\u0027s PCI setup code moves\nthe ioapic to an address other than that assigned by the BIOS. It simply\nadds another exclusion (which already includes classless devices and host\nbridges) to the function pbus_assign_resources_sorted so that it will not\nmove the ioapic.\n\nIf the ioapic is moved, the fixmap mapping to it is broken, so the OS should\nleave it alone.\n\nFrom: Kimball Murray \u003ckimball.murray@gmail.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "4196c3af25d98204216a5d6c37ad2cb303a1f2bf", "tree": "ac636ec99466e67eaa1b52555517a48a1c4fcb35", "parents": [ "9092b20803e4b3b3a480592794a73030f17370b3" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 23 16:31:16 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 23 16:31:16 2005 -0700" }, "message": "cardbus: limit IO windows to 256 bytes\n\nThat\u0027s what we\u0027ve always historically done, and bigger windows seem to\nconfuse some cardbus bridges. Or something.\n\nAlan reports that this makes the ThinkPad 600x series work properly\nagain: the 4kB IO window for some reason made IDE DMA not work, which\nmakes IDE painfully slow even if it works after DMA timeouts.\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b3743fa4442fc172e950ff0eaf6aa96e7d5ce9be", "tree": "fdc53b41cc1c1d762397bf673c43991000a6bdbe", "parents": [ "76fa82fb7156aa7191dfd1fdede1fc0da51d45dd" ], "author": { "name": "Dominik Brodowski", "email": "linux@dominikbrodowski.net", "time": "Fri Sep 09 13:03:23 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Sep 09 13:57:47 2005 -0700" }, "message": "[PATCH] yenta: share code with PCI core\n\nShare code between setup-bus.c and yenta_socket.c: use the write-out code of\nresources to the bridge also in yenta_socket.c, as it provides useful debug\noutput. In addition, it fixes the bug that the CPU-centric resource view\nmight need to be transferred to the PCI-centric view: setup-bus.c does that,\nwhile yenta-socket.c did not.\n\nSigned-off-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "81d4af1340badcd2100c84fbd1bfd13156de41aa", "tree": "67b7302a238eb930c7416d00b3a316def6396b3d", "parents": [ "ae11be6f37dfa140b6c2d1a53b307ef57da69a04" ], "author": { "name": "Ivan Kokshaysky", "email": "ink@jurassic.park.msu.ru", "time": "Tue Aug 30 18:48:52 2005 +0400" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Aug 30 11:14:48 2005 -0700" }, "message": "[PATCH] x86: pci_assign_unassigned_resources() update\n\nI had some time to think about PCI assign issues in 2.6.13-rc series.\n\nThe major problem here is that we call pci_assign_unassigned_resources()\nway too early - at subsys_initcall level. Therefore we give no chances\nto ACPI and PnP routines (called at fs_initcall level) to reserve their\nrespective resources properly, as the comments in drivers/pnp/system.c\nand drivers/acpi/motherboard.c suggest:\n\n /**\n * Reserve motherboard resources after PCI claim BARs,\n * but before PCI assign resources for uninitialized PCI devices\n */\n\nSo I moved the pci_assign_unassigned_resources() call to\npcibios_assign_resources() (fs_initcall), which should hopefully fix a\nlot of problems and make PCIBIOS_MIN_IO tweaks unnecessary.\n\nOther changes:\n- remove resource assignment code from pcibios_assign_resources(), since\n it duplicates pci_assign_unassigned_resources() functionality and\n actually does nothing in 2.6.13;\n- modify ROM assignment code as per Ben\u0027s suggestion: try to use firmware\n settings by default (if PCI_ASSIGN_ROMS is not set);\n- set CARDBUS_IO_SIZE back to 4K as it\u0027s a wonderful stress test for\n various setups.\n\nConfirmed by Tero Roponen \u003cteanropo@cc.jyu.fi\u003e (who had problems with\nthe 4kB CardBus IO size previously).\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" } ], "next": "26aad69e3dd854abe9028ca873fb40b410a39dd7" }