)]}'
{
  "log": [
    {
      "commit": "d1e90e9e7467dbfe521b25ba79f520bf676ebc36",
      "tree": "2c4a2b8bfa2a984cb57a781b034a204a12fcc4b6",
      "parents": [
        "122dbe7e58c7d064a17eefd33205227e6bce85ca"
      ],
      "author": {
        "name": "Viresh Kumar",
        "email": "viresh.kumar@st.com",
        "time": "Fri Mar 30 11:25:40 2012 +0530"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Wed Apr 18 13:53:10 2012 +0200"
      },
      "message": "pinctrl: replace list_*() with get_*_count()\n\nMost of the SoC drivers implement list_groups() and list_functions()\nroutines for pinctrl and pinmux. These routines continue returning\nzero until the selector argument is greater than total count of\navailable groups or functions.\n\nThis patch replaces these list_*() routines with get_*_count()\nroutines, which returns the number of available selection for SoC\ndriver. pinctrl layer will use this value to check the range it can\nchoose.\n\nThis patch fixes all user drivers for this change. There are other\nroutines in user drivers, which have checks to check validity of\nselector passed to them. It is also no more required and hence\nremoved.\n\nDocumentation updated as well.\n\nAcked-by: Stephen Warren \u003cswarren@wwwdotorg.org\u003e\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\n[Folded in fix and fixed a minor merge artifact manually]\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "0d2006bbf09e817f125ba1e42b2549bc2c5d7351",
      "tree": "f452f0a77705139763448c5676f6118270285439",
      "parents": [
        "706e8520e8450a631ca6f798f8c811faf56f0a59"
      ],
      "author": {
        "name": "Chanho Park",
        "email": "chanho61.park@samsung.com",
        "time": "Tue Jan 03 16:47:51 2012 +0900"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Tue Jan 03 09:10:09 2012 +0100"
      },
      "message": "pinctrl: remove unnecessary max pin number\n\nThis patch removes maxpin member in the pin control descriptor\nbecause we don\u0027t need this value as we enumerate a pin space\nusing offset.\n\nSigned-off-by: Chanho Park \u003cchanho61.park@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "3bece55aa5356af0171aaa64fd9c4f7601c47f1c",
      "tree": "8dd08d51859062defc424ff234f1032b89e9410e",
      "parents": [
        "43699dea1ea21a0d5786317a794cb2ba27a6f4fe"
      ],
      "author": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Sun Dec 18 23:44:26 2011 +0100"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Tue Jan 03 09:10:08 2012 +0100"
      },
      "message": "pinctrl: rename U300 and SIRF pin controllers\n\nFor stringent order, rename the pinmux-* pin controllers to\npinctrl-* and also rename the Kconfig symbols and in-kernel\nusers.\n\nCc: Rongjun Ying \u003cRongjun.Ying@csr.com\u003e\nCc: Jean-Christophe PLAGNIOL-VILLARD \u003cplagnioj@jcrosoft.com\u003e\nAcked-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "3c739ad0df5eb41cd7adad879eda6aa09879eb76",
      "tree": "4ab739e639373a18ca993b26b6c18ace7edee9e2",
      "parents": [
        "33d58949adee5086478e140751e4a7263bd7e207"
      ],
      "author": {
        "name": "Chanho Park",
        "email": "chanho61.park@samsung.com",
        "time": "Fri Nov 11 18:47:58 2011 +0900"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Tue Jan 03 09:10:01 2012 +0100"
      },
      "message": "pinctrl: add a pin_base for sparse gpio-ranges\n\nThis patch enables mapping a base offset of gpio ranges with\na pin offset even if does\u0027nt matched. A base of pinctrl_gpio_range\nmeans a base offset of gpio. However, we cannot convert gpio to pin\nnumber for sparse gpio ranges just only using a gpio base offset.\nWe can convert a gpio to real pin number(even if not matched) using\na new pin_base which means a base pin offset of requested gpio range.\nNow, the pin control subsystem passes the pin base offset to the\npinmux driver.\n\nFor example, let\u0027s assume below two gpio ranges in the system.\n\nstatic struct pinctrl_gpio_range gpio_range_a \u003d {\n    .name \u003d \"chip a\",\n    .id \u003d 0,\n    .base \u003d 32,\n    .pin_base \u003d 32,\n    .npins \u003d 16,\n    .gc \u003d \u0026chip_a;\n};\n\nstatic struct pinctrl_gpio_range gpio_range_b \u003d {\n    .name \u003d \"chip b\",\n    .id \u003d 0,\n    .base \u003d 48,\n    .pin_base \u003d 64,\n    .npins \u003d 8,\n    .gc \u003d \u0026chip_b;\n};\n\nWe can calucalate a exact pin ranges even if doesn\u0027t matched with gpio ranges.\n\nchip a:\n    gpio-range : [32 .. 47]\n    pin-range  : [32 .. 47]\nchip b:\n    gpio-range : [48 .. 55]\n    pin-range  : [64 .. 71]\n\nSigned-off-by: Chanho Park \u003cchanho61.park@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "f59d28dc00ae3f1a76b442dcd0a52d8708c577cc",
      "tree": "2112af42f3f9ec939a2df0269fe41f77df24e951",
      "parents": [
        "caca6a03d365883564885f2c1da3e88dcf65d139"
      ],
      "author": {
        "name": "Barry Song",
        "email": "Baohua.Song@csr.com",
        "time": "Fri Dec 02 10:32:15 2011 +0800"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Fri Dec 02 11:19:15 2011 +0100"
      },
      "message": "pinctrl/sirf: fix pin number typo for SPI1\n\nSigned-off-by: Barry Song \u003cBaohua.Song@csr.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "ad7761ab3adc03fbf2cca8e3c84344175d876c40",
      "tree": "10677cfa52d28568872695d081248676b6dc8188",
      "parents": [
        "5d2eaf8090874f8e65388e82f7e91f9cef74885e"
      ],
      "author": {
        "name": "Jean-Christophe PLAGNIOL-VILLARD",
        "email": "plagnioj@jcrosoft.com",
        "time": "Tue Oct 25 00:11:56 2011 +0800"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Tue Oct 25 10:43:57 2011 +0200"
      },
      "message": "pinctrl/sirf: fix sirfsoc_get_group_pins prototype\n\nfix sirfsoc_get_group_pins prototype introduced in 7e570f97, we\nmissed to de-constify a pointer.\n\nSigned-off-by: Jean-Christophe PLAGNIOL-VILLARD \u003cplagnioj@jcrosoft.com\u003e\nAcked-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "25aec320d993950474a065b59585e8dd006c3e18",
      "tree": "4a2d78cdf9cc216b3c41a96b907f399122c0f37c",
      "parents": [
        "a5818a8bd095a08cfb1871b63af9c8bed103e4b9"
      ],
      "author": {
        "name": "Stephen Warren",
        "email": "swarren@nvidia.com",
        "time": "Wed Oct 19 16:19:26 2011 -0600"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Thu Oct 20 11:49:53 2011 +0200"
      },
      "message": "pinctrl: Remove unsafe __refdata\n\nA pin controller\u0027s pin definitions are used both during pinctrl_register()\nand pinctrl_unregister(). The latter happens outside of __init/__devinit\ntime, and hence it is unsafe to mark the pin array as __refdata.\n\nAcked-by: Barry Song \u003cBaohua.Song@csr.com\u003e\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "a5818a8bd095a08cfb1871b63af9c8bed103e4b9",
      "tree": "7fc2ade1186cc42877f21a0eead3843515b914be",
      "parents": [
        "393daa814f4bbc6f5c099178c073fae9f7ef6177"
      ],
      "author": {
        "name": "Stephen Warren",
        "email": "swarren@nvidia.com",
        "time": "Wed Oct 19 16:19:25 2011 -0600"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@linaro.org",
        "time": "Thu Oct 20 11:41:49 2011 +0200"
      },
      "message": "pinctrl: get_group_pins() const fixes\n\nget_group_pins() \"returns\" a pointer to an array of const objects, through\na pointer parameter. Fix the prototype so what\u0027s pointed at by the returned\npointer is const, rather than the function parameter being const.\n\nThis also allows the removal of a cast in each of the two current pinmux\ndrivers.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n"
    },
    {
      "commit": "393daa814f4bbc6f5c099178c073fae9f7ef6177",
      "tree": "6bf1296eb65da30fe71a82d5bc0fd43dfe2c3d1d",
      "parents": [
        "98da3529536ed3c78ae493f4cc3d7ac8d43fc72c"
      ],
      "author": {
        "name": "Rongjun Ying",
        "email": "Rongjun.Ying@csr.com",
        "time": "Sun Oct 09 03:11:13 2011 -0700"
      },
      "committer": {
        "name": "Linus Walleij",
        "email": "linus.walleij@stericsson.com",
        "time": "Thu Oct 13 12:57:46 2011 +0200"
      },
      "message": "pinctrl: add a driver for the CSR SiRFprimaII pinmux\n\nThis creates a pin controller driver for the SiRFprinaII\npin mux portions.\n\nSigned-off-by: Rongjun Ying \u003cRongjun.Ying@csr.com\u003e\nSigned-off-by: Barry Song \u003cBaohua.Song@csr.com\u003e\n[Fixup for changed function names and semantics in the v10 patch]\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\n"
    }
  ]
}