)]}' { "log": [ { "commit": "527c680f7c36ff17d49efc99632232dba3549c51", "tree": "ae72c69971ff8dce4cc17b0035bd6abb2651a110", "parents": [ "23caaeea271cfe3176f0e27374d2016bd7583ea8", "f9c6a655a94042f94c0adb30d07d93cfd8915e95" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 03 10:20:22 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 03 10:20:22 2013 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.infradead.org/users/vkoul/slave-dma\n\nPull second set of slave-dmaengine updates from Vinod Koul:\n \"Arnd\u0027s patch moves the dw_dmac to use generic DMA binding. I agreed\n to merge this late as it will avoid the conflicts between trees.\n\n The second patch from Matt adding a dma_request_slave_channel_compat\n API was supposed to be picked up, but somehow never got picked up.\n Some patches dependent on this are already in -next :(\"\n\n* \u0027next\u0027 of git://git.infradead.org/users/vkoul/slave-dma:\n dmaengine: dw_dmac: move to generic DMA binding\n dmaengine: add dma_request_slave_channel_compat()\n" }, { "commit": "f9c6a655a94042f94c0adb30d07d93cfd8915e95", "tree": "527fa9aa65510c3ad96e4bb93fbdb6abd46b9f37", "parents": [ "864ef69b2d9b34e7c85baa9c5c601d5e735b208a" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Wed Feb 27 21:36:03 2013 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 28 09:53:21 2013 +0530" }, "message": "dmaengine: dw_dmac: move to generic DMA binding\n\nThe original device tree binding for this driver, from Viresh Kumar\nunfortunately conflicted with the generic DMA binding, and did not allow\nto completely seperate slave device configuration from the controller.\n\nThis is an attempt to replace it with an implementation of the generic\nbinding, but it is currently completely untested, because I do not have\nany hardware with this particular controller.\n\nThe patch applies on top of the slave-dma tree, which contains both the base\nsupport for the generic DMA binding, as well as the earlier attempt from\nViresh. Both of these are currently not merged upstream however.\n\nThis version incorporates feedback from Viresh Kumar, Andy Shevchenko\nand Russell King.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nAcked-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nCc: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\nCc: devicetree-discuss@lists.ozlabs.org\nCc: linux-arm-kernel@lists.infradead.org\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "69ee266b4c890aea7505388c4e394f5757166531", "tree": "a135b37603b98044258d27dc4f5951983bc33a17", "parents": [ "615f2e5c531bc57d5a190f321d697988e950ae4d" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Wed Feb 27 17:04:03 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Feb 27 19:10:15 2013 -0800" }, "message": "dmaengine: convert to idr_alloc()\n\nConvert to the much saner new idr interface.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nCc: Dan Williams \u003cdjbw@fb.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "5115f3c19d17851aaff5a857f55b4a019c908775", "tree": "0d02cf01e12e86365f4f5e3b234f986daef181a7", "parents": [ "c41b3810c09e60664433548c5218cc6ece6a8903", "17166a3b6e88b93189e6be5f7e1335a3cc4fa965" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Feb 26 09:24:48 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Feb 26 09:24:48 2013 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.infradead.org/users/vkoul/slave-dma\n\nPull slave-dmaengine updates from Vinod Koul:\n \"This is fairly big pull by my standards as I had missed last merge\n window. So we have the support for device tree for slave-dmaengine,\n large updates to dw_dmac driver from Andy for reusing on different\n architectures. Along with this we have fixes on bunch of the drivers\"\n\nFix up trivial conflicts, usually due to #include line movement next to\neach other.\n\n* \u0027next\u0027 of git://git.infradead.org/users/vkoul/slave-dma: (111 commits)\n Revert \"ARM: SPEAr13xx: Pass DW DMAC platform data from DT\"\n ARM: dts: pl330: Add #dma-cells for generic dma binding support\n DMA: PL330: Register the DMA controller with the generic DMA helpers\n DMA: PL330: Add xlate function\n DMA: PL330: Add new pl330 filter for DT case.\n dma: tegra20-apb-dma: remove unnecessary assignment\n edma: do not waste memory for dma_mask\n dma: coh901318: set residue only if dma is in progress\n dma: coh901318: avoid unbalanced locking\n dmaengine.h: remove redundant else keyword\n dma: of-dma: protect list write operation by spin_lock\n dmaengine: ste_dma40: do not remove descriptors for cyclic transfers\n dma: of-dma.c: fix memory leakage\n dw_dmac: apply default dma_mask if needed\n dmaengine: ioat - fix spare sparse complain\n dmaengine: move drivers/of/dma.c -\u003e drivers/dma/of-dma.c\n ioatdma: fix race between updating ioat-\u003ehead and IOAT_COMPLETION_PENDING\n dw_dmac: add support for Lynxpoint DMA controllers\n dw_dmac: return proper residue value\n dw_dmac: fill individual length of descriptor\n ...\n" }, { "commit": "9d3cae26acb471d5954cfdc25d1438b32060babe", "tree": "77e93b6fb207438f7f1f30a201cc86bc5b0ec82b", "parents": [ "df24eef3e794afbac69a377d1d2e2e3f5869f67a", "8520e443aa56cc157b015205ea53e7b9fc831291" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Feb 23 17:09:55 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Feb 23 17:09:55 2013 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\nPull powerpc updates from Benjamin Herrenschmidt:\n \"So from the depth of frozen Minnesota, here\u0027s the powerpc pull request\n for 3.9. It has a few interesting highlights, in addition to the\n usual bunch of bug fixes, minor updates, embedded device tree updates\n and new boards:\n\n - Hand tuned asm implementation of SHA1 (by Paulus \u0026 Michael\n Ellerman)\n\n - Support for Doorbell interrupts on Power8 (kind of fast\n thread-thread IPIs) by Ian Munsie\n\n - Long overdue cleanup of the way we handle relocation of our open\n firmware trampoline (prom_init.c) on 64-bit by Anton Blanchard\n\n - Support for saving/restoring \u0026 context switching the PPR (Processor\n Priority Register) on server processors that support it. This\n allows the kernel to preserve thread priorities established by\n userspace. By Haren Myneni.\n\n - DAWR (new watchpoint facility) support on Power8 by Michael Neuling\n\n - Ability to change the DSCR (Data Stream Control Register) which\n controls cache prefetching on a running process via ptrace by\n Alexey Kardashevskiy\n\n - Support for context switching the TAR register on Power8 (new\n branch target register meant to be used by some new specific\n userspace perf event interrupt facility which is yet to be enabled)\n by Ian Munsie.\n\n - Improve preservation of the CFAR register (which captures the\n origin of a branch) on various exception conditions by Paulus.\n\n - Move the Bestcomm DMA driver from arch powerpc to drivers/dma where\n it belongs by Philippe De Muyter\n\n - Support for Transactional Memory on Power8 by Michael Neuling\n (based on original work by Matt Evans). For those curious about\n the feature, the patch contains a pretty good description.\"\n\n(See commit db8ff907027b: \"powerpc: Documentation for transactional\nmemory on powerpc\" for the mentioned description added to the file\nDocumentation/powerpc/transactional_memory.txt)\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (140 commits)\n powerpc/kexec: Disable hard IRQ before kexec\n powerpc/85xx: l2sram - Add compatible string for BSC9131 platform\n powerpc/85xx: bsc9131 - Correct typo in SDHC device node\n powerpc/e500/qemu-e500: enable coreint\n powerpc/mpic: allow coreint to be determined by MPIC version\n powerpc/fsl_pci: Store the pci ctlr device ptr in the pci ctlr struct\n powerpc/85xx: Board support for ppa8548\n powerpc/fsl: remove extraneous DIU platform functions\n arch/powerpc/platforms/85xx/p1022_ds.c: adjust duplicate test\n powerpc: Documentation for transactional memory on powerpc\n powerpc: Add transactional memory to pseries and ppc64 defconfigs\n powerpc: Add config option for transactional memory\n powerpc: Add transactional memory to POWER8 cpu features\n powerpc: Add new transactional memory state to the signal context\n powerpc: Hook in new transactional memory code\n powerpc: Routines for FP/VSX/VMX unavailable during a transaction\n powerpc: Add transactional memory unavaliable execption handler\n powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes\n powerpc: Add FP/VSX and VMX register load functions for transactional memory\n powerpc: Add helper functions for transactional memory context switching\n ...\n" }, { "commit": "bab588fcfb6335c767d811a8955979f5440328e0", "tree": "2a862ddf47a82be885a8e7945a17cc3ff7a658b9", "parents": [ "3298a3511f1e73255a8dc023efd909e569eea037", "9cb0d1babfcb1b4ac248c09425f7d5de1e771133" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Feb 21 15:27:22 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Feb 21 15:27:22 2013 -0800" }, "message": "Merge tag \u0027soc\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc\n\nPull ARM SoC-specific updates from Arnd Bergmann:\n \"This is a larger set of new functionality for the existing SoC\n families, including:\n\n - vt8500 gains support for new CPU cores, notably the Cortex-A9 based\n wm8850\n\n - prima2 gains support for the \"marco\" SoC family, its SMP based\n cousin\n\n - tegra gains support for the new Tegra4 (Tegra114) family\n\n - socfpga now supports a newer version of the hardware including SMP\n\n - i.mx31 and bcm2835 are now using DT probing for their clocks\n\n - lots of updates for sh-mobile\n\n - OMAP updates for clocks, power management and USB\n\n - i.mx6q and tegra now support cpuidle\n\n - kirkwood now supports PCIe hot plugging\n\n - tegra clock support is updated\n\n - tegra USB PHY probing gets implemented diffently\"\n\n* tag \u0027soc\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits)\n ARM: prima2: remove duplicate v7_invalidate_l1\n ARM: shmobile: r8a7779: Correct TMU clock support again\n ARM: prima2: fix __init section for cpu hotplug\n ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)\n ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)\n arm: socfpga: Add SMP support for actual socfpga harware\n arm: Add v7_invalidate_l1 to cache-v7.S\n arm: socfpga: Add entries to enable make dtbs socfpga\n arm: socfpga: Add new device tree source for actual socfpga HW\n ARM: tegra: sort Kconfig selects for Tegra114\n ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114\n ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC\n ARM: tegra: Fix build error for gic update\n ARM: tegra: remove empty tegra_smp_init_cpus()\n ARM: shmobile: Register ARM architected timer\n ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move\n ARM: shmobile: r8a7779: Correct TMU clock support\n ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT\n ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles\n ARM: mxs: use apbx bus clock to drive the timers on timrotv2\n ...\n" }, { "commit": "3298a3511f1e73255a8dc023efd909e569eea037", "tree": "2d8e9bdb9e398049e3876b99fbb4d51099a45cc3", "parents": [ "5ce7aba976ebdfbf467e3cbcd3a7536ebdec4b11", "acb7452369e4f8749dd32d48dbda98936035a87c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Feb 21 15:20:41 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Feb 21 15:20:41 2013 -0800" }, "message": "Merge tag \u0027multiplatform\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc\n\nPull ARM SoC multiplatform support from Arnd Bergmann:\n \"Converting more ARM platforms to multiplatform support. This time,\n OMAP gets converted, which is a major step since this is by far the\n largest platform in terms of code size. The same thing happens to the\n vt8500 platform.\"\n\n* tag \u0027multiplatform\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:\n net: cwdavinci_cpdma: export symbols for cpsw\n remoteproc: omap: depend on OMAP_MBOX_FWK\n [media] davinci: do not include mach/hardware.h\n ARM: OMAP2+: Make sure files with omap initcalls include soc.h\n ARM: OMAP2+: Include soc.h to drm.c to fix compiling\n ARM: OMAP2+: Fix warning for hwspinlock omap_postcore_initcall\n ARM: multi_v7_defconfig: add ARCH_ZYNQ\n ARM: multi_v7_defconfig: remove unnecessary CONFIG_GPIOLIB\n arm: vt8500: Remove remaining mach includes\n arm: vt8500: Convert debug-macro.S to be multiplatform friendly\n arm: vt8500: Remove single platform Kconfig options\n ARM: OMAP2+: Remove now obsolete uncompress.h and debug-macro.S\n ARM: OMAP2+: Add minimal support for booting vexpress\n ARM: OMAP2+: Enable ARCH_MULTIPLATFORM support\n ARM: OMAP2+: Disable code that currently does not work with multiplaform\n ARM: OMAP2+: Add multiplatform debug_ll support\n ARM: OMAP: Fix dmaengine init for multiplatform\n ARM: OMAP: Fix i2c cmdline initcall for multiplatform\n ARM: OMAP2+: Use omap initcalls\n ARM: OMAP2+: Limit omap initcalls to omap only on multiplatform kernels\n" }, { "commit": "5ce7aba976ebdfbf467e3cbcd3a7536ebdec4b11", "tree": "a31ceb4a167035aad73fd116ee8512fca905fd7b", "parents": [ "7ae1c76ee5b58fe5bd55a07f99a3359333270b86", "b6a03d0492dedb5c10b8a5708ee92e04b0590c07" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Feb 21 15:12:17 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Feb 21 15:12:18 2013 -0800" }, "message": "Merge tag \u0027drivers\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc\n\nPull ARM SoC driver specific changes from Arnd Bergmann:\n\n - Updates to the ux500 cpufreq code\n\n - Moving the u300 DMA controller driver to drivers/dma\n\n - Moving versatile express drivers out of arch/arm for sharing with arch/arm64\n\n - Device tree bindings for the OMAP General Purpose Memory Controller\n\n* tag \u0027drivers\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (27 commits)\n ARM: OMAP2+: gpmc: Add device tree documentation for elm handle\n ARM: OMAP2+: gpmc: add DT bindings for OneNAND\n ARM: OMAP2+: gpmc-onenand: drop __init annotation\n mtd: omap-onenand: pass device_node in platform data\n ARM: OMAP2+: Prevent potential crash if GPMC probe fails\n ARM: OMAP2+: gpmc: Remove unneeded of_node_put()\n arm: Move sp810.h to include/linux/amba/\n ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND\n ARM: OMAP: gpmc: enable hwecc for AM33xx SoCs\n ARM: OMAP: gpmc-nand: drop __init annotation\n mtd: omap-nand: pass device_node in platform data\n ARM: OMAP: gpmc: don\u0027t create devices from initcall on DT\n dma: coh901318: cut down on platform data abstraction\n dma: coh901318: merge header files\n dma: coh901318: push definitions into driver\n dma: coh901318: push header down into the DMA subsystem\n dma: coh901318: skip hard-coded addresses\n dma: coh901318: remove hardcoded target addresses\n dma: coh901318: push platform data into driver\n dma: coh901318: create a proper platform data file\n ...\n" }, { "commit": "dffff02a6b10f25f879e1e523733770c0a492e76", "tree": "a7f69af7963ece1afac5c76a902ce12dd5078294", "parents": [ "877d66856e9de4a6d1ffbf61bec6f830bde4d3bf", "fa59f178552f927bd96771ba84e9706655bea705" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Feb 20 11:39:05 2013 +1100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Feb 20 11:39:05 2013 +1100" }, "message": "Merge remote-tracking branch \u0027agust/next\u0027 into next\n\n\u003c\u003c\nPlease pull mpc5xxx patches for v3.9. The bestcomm driver is\nmoved to drivers/dma (so it will be usable for ColdFire).\nmpc5121 now provides common dtsi file and existing mpc5121 device\ntrees use it. There are some minor clock init and sparse fixes\nand updates for various 5200 device tree files from Grant. Some\nfixes for bugs in the mpc5121 DIU driver are also included here\n(Andrew Morton suggested to push them via my mpc5xxx tree).\n\u003e\u003e\n" }, { "commit": "acb7452369e4f8749dd32d48dbda98936035a87c", "tree": "34219b164e90f14bb5a551f5ab28987b58a35999", "parents": [ "dad2d9e666cbd733afff855f5224dd7e8a7996d3", "949db153b6466c6f7cad5a427ecea94985927311", "6929e24e4cc46ce8d5b7dd8f8bdf4244c8d77f76" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Fri Feb 15 13:25:20 2013 +0100" }, "committer": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Fri Feb 15 13:31:52 2013 +0100" }, "message": "Merge branch \u0027omap/multiplatform-fixes\u0027, tag \u0027v3.8-rc5\u0027 into next/multiplatform\n\nThe omap multiplatform support uncovered a bug in the cwdavinci_cpdma\ncode and was missing two drivers that are enabled now but are not\nquite ready for multiplatform, as found by allyesconfig builds.\n\nThere is also a conflict generated by automated merge in\narch/arm/mach-omap2/drm.c between a bug fix that went into v3.8-rc5\nand a different version of the same fix that went into the\nomap/multiplatform branch. This merge removes the extraneous\n #include that was causing build errors.\n\n* omap/multiplatform-fixes:\n net: cwdavinci_cpdma: export symbols for cpsw\n remoteproc: omap: depend on OMAP_MBOX_FWK\n [media] davinci: do not include mach/hardware.h\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "421da89aadd1b24f4a3bc1d60c9de9825ec2debc", "tree": "6819535a892530a23d7ab4ed347fff491e4e3103", "parents": [ "a80258f9b2ac81e72ff680d273df9544a1307a32" ], "author": { "name": "Padmavathi Venna", "email": "padma.v@samsung.com", "time": "Thu Feb 14 09:10:07 2013 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:04:27 2013 +0530" }, "message": "DMA: PL330: Register the DMA controller with the generic DMA helpers\n\nThis patch registers the pl330 dma controller driver with the generic\ndevice tree dma helper functions.\n\nSigned-off-by: Padmavathi Venna \u003cpadma.v@samsung.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a80258f9b2ac81e72ff680d273df9544a1307a32", "tree": "2797ea0a381780cea4369fc2fb6d1802b9c3249b", "parents": [ "34d19355b84adde9eebc1d6771231c15dff891e6" ], "author": { "name": "Padmavathi Venna", "email": "padma.v@samsung.com", "time": "Thu Feb 14 09:10:06 2013 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:04:27 2013 +0530" }, "message": "DMA: PL330: Add xlate function\n\nAdd xlate to translate the device-tree binding information into\nthe appropriate format. The filter function requires the dma\ncontroller device and dma channel number as filter_params.\n\nSigned-off-by: Padmavathi Venna \u003cpadma.v@samsung.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "34d19355b84adde9eebc1d6771231c15dff891e6", "tree": "a1de3edb01cc8591032833ed934bcd4a1e16ce64", "parents": [ "a72208733f7866972bcba7995f7e598ad07f1158" ], "author": { "name": "Padmavathi Venna", "email": "padma.v@samsung.com", "time": "Thu Feb 14 09:10:05 2013 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:04:27 2013 +0530" }, "message": "DMA: PL330: Add new pl330 filter for DT case.\n\nThis patch adds a new pl330_dt_filter for DT case to filter the\nrequired channel based on the new filter params and modifies the\nold filter only for non-DT case as suggested by Arnd Bergmann.\n\nSigned-off-by: Padmavathi Venna \u003cpadma.v@samsung.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a72208733f7866972bcba7995f7e598ad07f1158", "tree": "e1007caa6c25d33e401a5cc46949d01df158937d", "parents": [ "373459eee0cd79f775ef9874395bb37638154777" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Feb 14 11:00:20 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:00:54 2013 +0530" }, "message": "dma: tegra20-apb-dma: remove unnecessary assignment\n\nThere is no need to assign 0 to residue, because dma_cookie_status() does this\nfor us.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nAcked-by: Laxman Dewangan \u003cldewangan@nvidia.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "373459eee0cd79f775ef9874395bb37638154777", "tree": "850b828d96f39bf3f04ee4a05a540b0438c18060", "parents": [ "9b562639a1dbef847dfc9daa807bd3e7e02ef24f" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Feb 14 11:00:19 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:00:53 2013 +0530" }, "message": "edma: do not waste memory for dma_mask\n\nAccordingly to commentary in the platform_device_register_full the memory\nallocated for dma_mask will not going to be freed. That\u0027s why is better to\nassign dma_mask afterwards.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "9b562639a1dbef847dfc9daa807bd3e7e02ef24f", "tree": "ea18c0b5399fbe544bda33047631ce848f3dd83c", "parents": [ "4168d0d9d304f184f786b1f00750557b8e09453c" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Feb 14 11:00:18 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:00:53 2013 +0530" }, "message": "dma: coh901318: set residue only if dma is in progress\n\nWhen status is DMA_SUCCESS the residue should be zero. Otherwise it\u0027s a bug.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nCc: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nCc: linux-arm-kernel@lists.infradead.org\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "4168d0d9d304f184f786b1f00750557b8e09453c", "tree": "7385fb072673f5934cb08f79faeecc9829a32674", "parents": [ "978c4172af48f0adc082f8b1d94acb817d947730" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Feb 14 11:00:17 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:00:53 2013 +0530" }, "message": "dma: coh901318: avoid unbalanced locking\n\nIn case the len is 0 we must return without trying to unlock the lock that was\nnot locked.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nCc: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nCc: linux-arm-kernel@lists.infradead.org\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "88b386c0a7c278581d2b8e2c2761d12f6475938d", "tree": "b4616aeeb7a8c5c057cd52d30a2ecadb744d6f1f", "parents": [ "7dd145252574e34d92ad574e5168e4115639c0be" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Feb 14 11:00:15 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 20:00:53 2013 +0530" }, "message": "dma: of-dma: protect list write operation by spin_lock\n\nIt\u0027s possible to have an inconsistency in the list due to unprotected operation\non it. The patch adds a proper locking on the list operation.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "7dd145252574e34d92ad574e5168e4115639c0be", "tree": "0b68fb06fbe4b6e431d72411bffc053c3c9ccedf", "parents": [ "e68b1130dfbb834a4a028df01133591aeb59d241" ], "author": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Thu Feb 14 10:03:10 2013 +0100" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 19:54:31 2013 +0530" }, "message": "dmaengine: ste_dma40: do not remove descriptors for cyclic transfers\n\nFix dma_tc_handle() to call d40_desc_remove() and d40_desc_done() only\nfor non-cyclic transfers, as this was breaking ux500_pcm since\nintroduced in:\n\nd49278e dmaengine: dma40: Add support to split up large elements\n\nReported-by: Shreshtha Kumar Sahu \u003cshreshthakumar.sahu@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "e68b1130dfbb834a4a028df01133591aeb59d241", "tree": "364877c35c453e27590b1b43508ceb0f1928c942", "parents": [ "877e86f28385407f05c5aa4e397d4ccb3233f01a" ], "author": { "name": "Cong Ding", "email": "dinggnu@gmail.com", "time": "Thu Feb 14 11:16:10 2013 +0100" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 19:11:46 2013 +0530" }, "message": "dma: of-dma.c: fix memory leakage\n\nThe memory allocated to ofdma might be a leakage when error occurs.\n\nSigned-off-by: Cong Ding \u003cdinggnu@gmail.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "877e86f28385407f05c5aa4e397d4ccb3233f01a", "tree": "5467a9c9360f49b6ff1d2d0a0f8e8347767904f6", "parents": [ "a20702b8d7c2b54a618e203d94b37b4f1d21bbd4" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Feb 14 10:41:09 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Thu Feb 14 15:14:36 2013 +0530" }, "message": "dw_dmac: apply default dma_mask if needed\n\nIn some cases we got the device without dma_mask configured. We have to apply\nthe default value to avoid crashes during memory mapping.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a20702b8d7c2b54a618e203d94b37b4f1d21bbd4", "tree": "c621ea1997ba39989719b16e80e6f05b5cc0aa43", "parents": [ "5fa422c922c2599dbfd960faf6dfca2411cc3f99" ], "author": { "name": "Fengguang Wu", "email": "fengguang.wu@intel.com", "time": "Wed Feb 13 09:40:03 2013 +0800" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Feb 13 08:10:09 2013 -0800" }, "message": "dmaengine: ioat - fix spare sparse complain\n\n\u003e\u003e drivers/dma/ioat/dma_v3.c:371:6: sparse: symbol \u0027ioat3_timer_event\u0027 was not declared.\n\nReported-by: Fengguang Wu \u003cfengguang.wu@intel.com\u003e\nSigned-off-by: Fengguang Wu \u003cfengguang.wu@intel.com\u003e\nAcked-by: Dave Jiang \u003cdave.jiang@intel.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "5fa422c922c2599dbfd960faf6dfca2411cc3f99", "tree": "52ae231ffae2032fcf26b39a7c1b4e121bc37710", "parents": [ "4dec23d7718e6f1f5e1773698d112025169e7d49" ], "author": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Tue Feb 12 09:15:02 2013 -0800" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Feb 13 08:09:37 2013 -0800" }, "message": "dmaengine: move drivers/of/dma.c -\u003e drivers/dma/of-dma.c\n\nas requested by Rob\n\nSuggested-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "4dec23d7718e6f1f5e1773698d112025169e7d49", "tree": "2d39626f26b0b8cbbdcb246188ec5b2c7494fd8d", "parents": [ "cfdf5b6cc5985014a7ce891093f4fd0ae2d27ca6" ], "author": { "name": "Dave Jiang", "email": "dave.jiang@intel.com", "time": "Thu Feb 07 14:38:32 2013 -0700" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Tue Feb 12 08:27:21 2013 -0800" }, "message": "ioatdma: fix race between updating ioat-\u003ehead and IOAT_COMPLETION_PENDING\n\nThere is a race that can hit during __cleanup() when the ioat-\u003ehead pointer is\nincremented during descriptor submission. The __cleanup() can clear the\nPENDING flag when it does not see any active descriptors. This causes new\nsubmitted descriptors to be ignored because the COMPLETION_PENDING flag is\ncleared. This was introduced when code was adapted from ioatdma v1 to ioatdma\nv2. For v2 and v3, IOAT_COMPLETION_PENDING flag will be abandoned and a new\nflag IOAT_CHAN_ACTIVE will be utilized. This flag will also be protected under\nthe prep_lock when being modified in order to avoid the race.\n\nSigned-off-by: Dave Jiang \u003cdave.jiang@intel.com\u003e\nReviewed-by: Dan Williams \u003cdjbw@fb.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "cfdf5b6cc5985014a7ce891093f4fd0ae2d27ca6", "tree": "e9b6e719a87573cb41283679492743607aa3a02c", "parents": [ "4702d5244ca947263e8b7eb2ba6d8721e80c46e2" ], "author": { "name": "Mika Westerberg", "email": "mika.westerberg@linux.intel.com", "time": "Thu Feb 07 17:36:28 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Tue Feb 12 08:14:36 2013 -0800" }, "message": "dw_dmac: add support for Lynxpoint DMA controllers\n\nIntel Lynxpoint PCH Low Power Subsystem has DMA controller to support general\npurpose serial buses like SPI, I2C, and HSUART. This controller is enumerated\nfrom ACPI namespace with ACPI ID INTL9C60.\n\nSigned-off-by: Mika Westerberg \u003cmika.westerberg@linux.intel.com\u003e\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "bda6f8e6cdcdb55db9b2961b6a7c9d0d97da4765", "tree": "cec7c71c5120538352157fa1d2826efe881a7b0c", "parents": [ "c35a0bfacb61f5c56e0e64f309d36c59c7fe8da3", "ef3ffe5a0458606c488def757bb7f6dd013c2db5" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Tue Feb 05 12:13:10 2013 -0800" }, "committer": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Tue Feb 05 12:13:10 2013 -0800" }, "message": "Merge tag \u0027tegra-for-3.9-soc-ccf\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc\n\nFrom Stephen Warren:\nARM: tegra: Common Clock Framework rework\n\nTegra already supports the common clock framework, but had issues:\n\n1) The clock driver was located in arch/arm/mach-tegra/ rather than\n drivers/clk/.\n\n2) A single \"Tegra clock\" type was implemented, rather than separate\n clock types for PLL, mux, divider, ... type in HW.\n\n3) Clock lookups by device drivers were still driven by device name\n and connection ID, rather than through device tree.\n\nThis pull request solves all three issues. This required some DT changes\nto add clocks properties, and driver changes to request clocks more\n\"correctly\". Finally, this rework allows all AUXDATA to be removed from\nTegra board files, and various duplicate clock lookup entries to be\nremoved from the driver.\n\nThis pull request is based on the previous pull request, with tag\ntegra-for-3.9-cleanup.\n\n* tag \u0027tegra-for-3.9-soc-ccf\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits)\n clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s\n clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s\n ARM: tegra30: remove auxdata\n ARM: tegra20: remove auxdata\n ASoC: tegra: remove auxdata\n staging: nvec: remove use of clk_get_sys\n ARM: tegra: paz00: add clock information to DT\n ARM: tegra: add clock properties to Tegra30 DT\n ARM: tegra: add clock properties to Tegra20 DT\n spi: tegra: do not use clock name to get clock\n ARM: tegra: remove legacy clock code\n ARM: tegra: migrate to new clock code\n clk: tegra: add clock support for Tegra30\n clk: tegra: add clock support for Tegra20\n clk: tegra: add Tegra specific clocks\n ARM: tegra: define Tegra30 CAR binding\n ARM: tegra: define Tegra20 CAR binding\n ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h\n ARM: tegra: add function to read chipid\n ARM: tegra: fix compile error when disable CPU_IDLE\n ...\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\n\nConflicts:\n\tarch/arm/mach-tegra/board-dt-tegra20.c\n\tarch/arm/mach-tegra/board-dt-tegra30.c\n\tarch/arm/mach-tegra/common.c\n\tarch/arm/mach-tegra/platsmp.c\n\tdrivers/clocksource/Makefile\n" }, { "commit": "3e93093ecd0c144e86a86cc1f165221b6cd3e7fb", "tree": "0d6dffb90985bd90fd0ca43076a629f12e277096", "parents": [ "43243322139194c2fea606095f82498e07536c27", "da660b4a3b15caea9c198c4f26d1cf7023df92fc" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Jan 30 10:04:23 2013 -0800" }, "committer": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Jan 30 10:04:56 2013 -0800" }, "message": "Merge tag \u0027vexpress/drivers-for-3.9\u0027 of git://git.linaro.org/people/pawelmoll/linux into next/drivers\n\nFrom Pawel Moll:\nVersatile Express related driver updates for 3.9:\n* Move sp810 header to a more generic location,\n mainly to share it with arm64\n\n* tag \u0027vexpress/drivers-for-3.9\u0027 of git://git.linaro.org/people/pawelmoll/linux:\n arm: Move sp810.h to include/linux/amba/\n + Linux 3.8-rc5\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\n" }, { "commit": "43243322139194c2fea606095f82498e07536c27", "tree": "aa434c6c8425c2279819d0fe72b2025eac1dc9f9", "parents": [ "7bcdd8d5e31db4f49ae52580e86723c376ee0999", "73b31eaee7f02946dbb0bfabbee72ab6f0117bfb" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Mon Jan 28 13:37:09 2013 -0800" }, "committer": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Mon Jan 28 13:37:09 2013 -0800" }, "message": "Merge tag \u0027coh901318-for-arm-soc\u0027 of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers\n\nThis pushes the platform data for the U300 COH901318\nDMA controller down into the driver and cleans up in\nthe \u003cmach/*\u003e namespace for the U300 platform.\n\n* tag \u0027coh901318-for-arm-soc\u0027 of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:\n dma: coh901318: cut down on platform data abstraction\n dma: coh901318: merge header files\n dma: coh901318: push definitions into driver\n dma: coh901318: push header down into the DMA subsystem\n dma: coh901318: skip hard-coded addresses\n dma: coh901318: remove hardcoded target addresses\n dma: coh901318: push platform data into driver\n dma: coh901318: create a proper platform data file\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\n\nConflicts:\n\tarch/arm/mach-u300/core.c\n" }, { "commit": "61fd290d213e25d5a119b8ca25644001ed9f8f2d", "tree": "16d8d1da34b5970985145c14cd6b8a624486abba", "parents": [ "b08e8c0ecc42afa3a2e1019851af741980dd5a6b" ], "author": { "name": "Prashant Gaikwad", "email": "pgaikwad@nvidia.com", "time": "Fri Jan 11 13:16:26 2013 +0530" }, "committer": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Mon Jan 28 11:19:07 2013 -0700" }, "message": "ARM: tegra: migrate to new clock code\n\nMigrate Tegra clock support to drivers/clk/tegra, this involves\nmoving:\n1. definition of tegra_cpu_car_ops to clk.c\n2. definition of reset functions to clk-peripheral.c\n3. change parent of cpu clock.\n4. Remove legacy clock initialization.\n5. Initialize clocks using DT.\n6. Remove all instance of mach/clk.h\n\nSigned-off-by: Prashant Gaikwad \u003cpgaikwad@nvidia.com\u003e\n[swarren: use to_clk_periph_gate().]\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\n" }, { "commit": "4702d5244ca947263e8b7eb2ba6d8721e80c46e2", "tree": "127c5fdd5590467d781aca04685517e97d02bb01", "parents": [ "176dcec50f3f0bc46f11b983c1a3bbc2dd3514fd" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Fri Jan 25 11:48:03 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 28 04:04:50 2013 -0800" }, "message": "dw_dmac: return proper residue value\n\nCurrently the driver returns full length of the active descriptor which is\nwrong. We have to go throught the active descriptor and substract the length of\neach sent children in the chain from the total length along with the actual\ndata in the DMA channel registers.\n\nThe cyclic case is not handled by this patch due to len field in the descriptor\nstructure is left untouched by the original code.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "176dcec50f3f0bc46f11b983c1a3bbc2dd3514fd", "tree": "26f47f218200c789c785ee7397f5bed6c27e4d79", "parents": [ "30d38a3286b140ae8cea84a93cde1f112e352aaf" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Fri Jan 25 11:48:02 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 28 04:04:42 2013 -0800" }, "message": "dw_dmac: fill individual length of descriptor\n\nIt will be useful to have the length of the transfer in the descriptor. The\ncyclic transfer functions remained untouched.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "30d38a3286b140ae8cea84a93cde1f112e352aaf", "tree": "b8b08a5ffacdfad43531ef38227db39cdbb69fcb", "parents": [ "fdf475fa40f1468cf43a72b270f74dc6a4a5c905" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Fri Jan 25 11:48:01 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 28 04:04:36 2013 -0800" }, "message": "dw_dmac: introduce total_len field in struct dw_desc\n\nBy this new field we distinguish a total length of the chain and the individual\nlength of each descriptor in the chain.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "fdf475fa40f1468cf43a72b270f74dc6a4a5c905", "tree": "89760fdfe1e8035191321ca78835bc1f92c39045", "parents": [ "985a6c7dcf309378b91d16cdbdb0909479f99c33" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Fri Jan 25 11:48:00 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 28 04:04:32 2013 -0800" }, "message": "dw_dmac: remove unnecessary tx_list field in dw_dma_chan\n\nThe soft LLP mode is working for active descriptor only. So, we do not need to\nhave a copy of its pointer.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "985a6c7dcf309378b91d16cdbdb0909479f99c33", "tree": "3701944de4813bddd07dd3d9b6688ab0e6074d98", "parents": [ "2b99c2592167eb1043e16d1e7187afdc7c940a41" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Fri Jan 18 17:10:59 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 28 04:04:28 2013 -0800" }, "message": "dw_dmac: print out DW_PARAMS and DWC_PARAMS when debug\n\nIt\u0027s usefull to have the values of the DW_PARAMS and DWC_PARAMS printed when\ndebug mode is enabled.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "2b99c2592167eb1043e16d1e7187afdc7c940a41", "tree": "afeb11ea46e527befcd07b956596ea8cf8c18585", "parents": [ "2518d1d1fc0ba7ef781bac97132bcfd6d7466c4b" ], "author": { "name": "Barry Song", "email": "Baohua.Song@csr.com", "time": "Fri Dec 14 11:06:58 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 28 01:44:46 2013 -0800" }, "message": "DMAEngine: sirf: lock the shared registers access in sirfsoc_dma_terminate_all\n\nJust like Russell pointed out in \"DMAEngine: sirf: add DMA\npause/resume support\" at\nhttp://www.spinics.net/lists/arm-kernel/msg212496.html\nhere I find sirfsoc_dma_terminate_all() has same problem,\nso move the locking to the front of registers access.\n\nSigned-off-by: Barry Song \u003cBaohua.Song@csr.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "2518d1d1fc0ba7ef781bac97132bcfd6d7466c4b", "tree": "7c38d76cbf4f92fc81dea18073f66f53027ce946", "parents": [ "6c5e6a3990ce64192b56ffafa5ffa5af129751d5" ], "author": { "name": "Barry Song", "email": "Baohua.Song@csr.com", "time": "Fri Dec 14 10:59:22 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 28 01:44:40 2013 -0800" }, "message": "DMAEngine: sirf: add DMA pause/resume support\n\npause/resume are important for users like ALSA sound drivers,\nthis patches make the sirf prima2/marco support DMA commands\nDMA_PAUSE and DMA_RESUME.\n\nSigned-off-by: Barry Song \u003cBaohua.Song@csr.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "422d26b6ecd77af8c77f2a40580679459825170f", "tree": "632e690e458fb7b27db200cd6fcd5429e143e419", "parents": [ "4c271bb67c04253c1e99006eb48fb773a8fe8c0f", "949db153b6466c6f7cad5a427ecea94985927311" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@linuxfoundation.org", "time": "Fri Jan 25 21:06:30 2013 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@linuxfoundation.org", "time": "Fri Jan 25 21:06:30 2013 -0800" }, "message": "Merge 3.8-rc5 into driver-core-next\n\nThis resolves a gpio driver merge issue pointed out in linux-next.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@linuxfoundation.org\u003e\n" }, { "commit": "7331205a9662a730799470fdd9ecbff0ea073606", "tree": "b314ae443a4b788456a44237a4fdadf3dd27c25f", "parents": [ "93316e263a321de6ef268a2a66c322626bd65cf1" ], "author": { "name": "Thierry Reding", "email": "thierry.reding@avionic-design.de", "time": "Mon Jan 21 11:09:00 2013 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@linuxfoundation.org", "time": "Fri Jan 25 12:21:46 2013 -0800" }, "message": "dma: Convert to devm_ioremap_resource()\n\nConvert all uses of devm_request_and_ioremap() to the newly introduced\ndevm_ioremap_resource() which provides more consistent error handling.\n\ndevm_ioremap_resource() provides its own error messages so all explicit\nerror messages can be removed from the failure code paths.\n\nSigned-off-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\nCc: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@linuxfoundation.org\u003e\n" }, { "commit": "3f58e0945eb064777f7b77e65ae44cb4f1efc92e", "tree": "46b49ddc57887a52ba7c0d820e06d7313a7ce64b", "parents": [ "acc5da0f9d89299b4115cf9cb995c0157cd6bf12", "b9bb37f5486ba05d2b557dbf1aeb754fef618985" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 24 10:17:49 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 24 10:17:49 2013 -0800" }, "message": "Merge branch \u0027fixes\u0027 of git://git.infradead.org/users/vkoul/slave-dma\n\nPull slave-dmaengine fixes from Vinod Koul:\n \"A few fixes on slave dmanengine. There are trivial fixes in imx-dma,\n tegra-dma \u0026 ioat driver\"\n\n* \u0027fixes\u0027 of git://git.infradead.org/users/vkoul/slave-dma:\n dma: tegra: implement flags parameters for cyclic transfer\n dmaengine: imx-dma: Disable use of hw_chain to fix sg_dma transfers.\n ioat: Fix DMA memory sync direction correct flag\n" }, { "commit": "6c5e6a3990ce64192b56ffafa5ffa5af129751d5", "tree": "228632cd25a3ce0e00194fb492eaa4c50e5acbae", "parents": [ "77bcc497c60ec62dbb84abc809a6e218d53409e9", "da2ac56a1bc9c6c56244aa9ca990d5c5c7574b5f" ], "author": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 21 06:35:12 2013 -0800" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 21 07:09:34 2013 -0800" }, "message": "Merge tag \u0027ux500-dma40\u0027 of //git.linaro.org/people/fabiobaltieri/linux.git\n\nPull ste_dma40 fixes from Fabio\n\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "77bcc497c60ec62dbb84abc809a6e218d53409e9", "tree": "6d0f491d55b316010f352934a23b4ecd5d01e118", "parents": [ "5be10f349bc0a2f3dd2ab6417ffe29746403984c" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Fri Jan 18 14:14:15 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sun Jan 20 20:49:21 2013 -0800" }, "message": "dw_dmac: move soft LLP code from tasklet to dwc_scan_descriptors\n\nThe proper place for the main logic of the soft LLP mode is\ndwc_scan_descriptors. It prevents to get the transfer unexpectedly aborted in\ncase the user calls dwc_tx_status.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "5be10f349bc0a2f3dd2ab6417ffe29746403984c", "tree": "47da236d7cb05c6a7288313c5c0cfc803119de49", "parents": [ "f8122a82d2eae8ef42de48829deed0ca9d9e1f17" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 17 10:03:01 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sun Jan 20 20:49:21 2013 -0800" }, "message": "dw_dmac: don\u0027t exceed AHB master number in dwc_get_data_width\n\nThe driver assumes that hardware has two AHB masters which might not be always\ntrue. In such cases we must not exceed number of the AHB masters present in the\nhardware. In the proposed scheme in this patch, we would choose the master with\nhighest possible number whenever we exceed max AHB masters.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f8122a82d2eae8ef42de48829deed0ca9d9e1f17", "tree": "ade059660ab99a330c93dffa90e7e4f4972270af", "parents": [ "855372c013bbad8369223f7c75242bd3c94f9345" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Wed Jan 16 15:48:50 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sun Jan 20 20:49:21 2013 -0800" }, "message": "dw_dmac: allocate dma descriptors from DMA_COHERENT memory\n\nCurrently descriptors are allocated from normal cacheable memory and that slows\ndown filling the descriptors, as we need to call cache_coherency routines\nafterwards. It would be better to allocate memory for these descriptors from\nDMA_COHERENT memory. This would make code much cleaner too.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nTested-by: Mika Westerberg \u003cmika.westerberg@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "855372c013bbad8369223f7c75242bd3c94f9345", "tree": "93ae6496fe982c599e0b67a1506fe71227c54626", "parents": [ "ed30933e6f3dbeaaab1de91e1bec25f42d5d32df" ], "author": { "name": "Cong Ding", "email": "dinggnu@gmail.com", "time": "Tue Jan 15 01:23:48 2013 +0100" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sun Jan 20 05:49:40 2013 -0800" }, "message": "dma: sh/shdma-base.c: remove unnecessary null pointer check\n\nthe variable chan is dereferenced in line 635, so it is no reason to check\nnull again in line 641.\n\nSigned-off-by: Cong Ding \u003cdinggnu@gmail.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "ed30933e6f3dbeaaab1de91e1bec25f42d5d32df", "tree": "f4953c62c1a7a5dfa0cf21ecce89d35d0a55906c", "parents": [ "661f7cb55c61fa7491e0caf21e55f59e5bc49abe" ], "author": { "name": "Cong Ding", "email": "dinggnu@gmail.com", "time": "Tue Jan 15 01:19:48 2013 +0100" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sun Jan 20 05:49:40 2013 -0800" }, "message": "dma: remove unnecessary null pointer check in mmp_pdma.c\n\nthe pointer cfg is dereferenced in line 594, so it\u0027s no reason to check null\nagain in line 620.\n\nSigned-off-by: Cong Ding \u003cdinggnu@gmail.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "661f7cb55c61fa7491e0caf21e55f59e5bc49abe", "tree": "285511be3d5676f321392e9fe8683564d6ab646a", "parents": [ "3a95b9fbba893ebfa9b83de105707539e0228e0c" ], "author": { "name": "Matt Porter", "email": "mporter@ti.com", "time": "Thu Jan 10 13:41:04 2013 -0500" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sun Jan 20 04:04:29 2013 -0800" }, "message": "dma: edma: fix slave config dependency on direction\n\nThe edma_slave_config() implementation depends on the\ndirection field such that it will not properly configure\na slave channel when called without direction set.\n\nThis fixes the implementation so that the slave config\nis copied as is and prep_slave_sg() handles the\ndirection dependent handling. spi-omap2-mcspi and\nomap_hsmmc both expose this bug as they configure the\nslave channel config from a common path with an unconfigured\ndirection field.\n\nSigned-off-by: Matt Porter \u003cmporter@ti.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "da2ac56a1bc9c6c56244aa9ca990d5c5c7574b5f", "tree": "2fc8a260096f1dc7838ea28414fbd38c4a54d942", "parents": [ "53d6d68f3c1792bce0144d8499435468e425a995" ], "author": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 07 10:58:35 2013 +0100" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:51:16 2013 +0100" }, "message": "dmaengine: set_dma40: balance clock in probe fail code\n\nClock code was changed to use clk_prepare_enable in:\n\nb707c65 dma/ste_dma40: Fixup clock usage during probe\n\nbut clk_disable on probe fail path was not updated. This patch fix this\nby using clk_disable_unprepare in place of clk_disable.\n\nAcked-by: Ulf Hansson \u003culf.hansson@linaro.org\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "53d6d68f3c1792bce0144d8499435468e425a995", "tree": "0eae17de605454927d3e69dd78741dde8c838a97", "parents": [ "7407048bec896268b50e3c43c1d012a4764dc210" ], "author": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Wed Dec 19 14:41:56 2012 +0100" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:51:12 2013 +0100" }, "message": "dmaengine: set_dma40: ignore spurious interrupts\n\nSome DMA channels may be used by other cores in the SoC. This patch\nmodifies the dma interrupt handler to ignore interrupts from unknown\nchannels.\n\nCc: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "7407048bec896268b50e3c43c1d012a4764dc210", "tree": "259a92df30b4c9e08cc0c2270bc997fa212225cb", "parents": [ "7ce529efbcf6fdcb1854e4634adf7f6a18216e81" ], "author": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Tue Dec 18 12:25:14 2012 +0100" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:51:08 2013 +0100" }, "message": "dmaengine: ste_dma40: add software lli support\n\nThis patch add support to manage LLI by SW for select phy channels.\n\nThere is a HW issue in certain controllers due to which on certain\noccassions HW LLI cannot be used on some physical channels. To avoid\nthe HW issue on a specific phy channel, the phy channel number can be\nadded to the list of soft_lli_channels and there after all the transfers\non that channel will use software LLI, for peripheral to memory\ntransfers.\n\nSoftLLI introduces relink overhead, that could impact performace for\ncertain use cases.\n\nThis is based on a previous patch of Narayanan Gopalakrishnan.\n\nCc: Shreshtha Kumar Sahu \u003cshreshthakumar.sahu@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "7ce529efbcf6fdcb1854e4634adf7f6a18216e81", "tree": "30672eebb37b815d9a7649cc9da6cef6110bb61d", "parents": [ "f26e03ad2b50be50c98f8ecb1fd9dbdf94db91ab" ], "author": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Tue Dec 18 16:59:09 2012 +0100" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:51:04 2013 +0100" }, "message": "dmaengine: ste_dma40: minor code readability fixes\n\nUse internal variables to the cycles to improve code readability, no\nfunctional changes.\n\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "f26e03ad2b50be50c98f8ecb1fd9dbdf94db91ab", "tree": "ee73368ed2a176ae6e804e02cd5f77f586ccbde9", "parents": [ "762eb33fdebed34d98943d85ee1425663d7cceaa" ], "author": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Thu Dec 13 17:12:37 2012 +0100" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:51:01 2013 +0100" }, "message": "dmaengine: ste_dma40: minor cosmetic fixes\n\nThis patch contains various non functional cosmetic fixes.\n\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "4226dd86b10ac44f8e98599f6a73e3a1b929f8eb", "tree": "236280805bf3db2b81911303e4b429f7bda79368", "parents": [ "3cb645dc85a050c8a6b5c2cbdcbe4b8f39dba1b8" ], "author": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Thu Dec 13 13:46:16 2012 +0100" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:53 2013 +0100" }, "message": "dmaengine: ste_dma40: add a done queue for completed descriptors\n\nThis is to keep the active queue for only those transfers which are\nactually active in the hardware. Descriptors will be moved to the done\nqueue after they are completed in the hardware (interrupt handler) but\nbefore all the cleanup work has been completed (tasklet).\n\nMostly based on a previous patch by Rabin Vincent.\n\nCc: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "3cb645dc85a050c8a6b5c2cbdcbe4b8f39dba1b8", "tree": "9031f1a3af3f74492e94ff057a50785c9ddc103b", "parents": [ "47db92f4a63499b1605b4c66f9347ba5479e7b19" ], "author": { "name": "Tong Liu", "email": "tong.liu@stericsson.com", "time": "Wed Sep 26 10:07:30 2012 +0000" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:48 2013 +0100" }, "message": "dmaengine: ste_dma40: support more than 128 event lines\n\nU8540 DMA controller is different from u9540 we need define new\nregisters and use them to support handling more than 128 event lines.\n\nSigned-off-by: Tong Liu \u003ctong.liu@stericsson.com\u003e\nReviewed-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "47db92f4a63499b1605b4c66f9347ba5479e7b19", "tree": "a3e9510a1b3cec21147f11641f09bd984c2afb0a", "parents": [ "f000df8c5a0e2002acc5989aad99a97d32a24718" ], "author": { "name": "Gerald Baeza", "email": "gerald.baeza@stericsson.com", "time": "Fri Sep 21 21:21:37 2012 +0200" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:44 2013 +0100" }, "message": "dmaengine: ste_dma40: physical channels number correction\n\nDMAC_ICFG[0:2]\u003dSCHNB only allows to count \u0027multiple of 4\u0027 physical\nchannels so it was ok with platforms having 8 channels but cannot be\nused for next versions (with 10 or 14 channels). This patch allows to\nprovide the number of physical channels for a DMA device via\nplatform_data, or still rely on SCHNB if platform_data announces 0\nchannel.\n\nSigned-off-by: Gerald Baeza \u003cgerald.baeza@stericsson.com\u003e\nReviewed-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "f000df8c5a0e2002acc5989aad99a97d32a24718", "tree": "c8547aa62958e7d65b39d4ec1827efb9f31954f2", "parents": [ "ccc3d6976433aa67131117fccd2b5143d82a6f48" ], "author": { "name": "Gerald Baeza", "email": "gerald.baeza@stericsson.com", "time": "Thu Nov 08 14:39:07 2012 +0100" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:40 2013 +0100" }, "message": "dmaengine: ste_dma40: support fixed physical channel allocation\n\nThis patch makes existing use_fixed_channel field (of stedma40_chan_cfg\nstructure) applicable to physical channels.\n\nSigned-off-by: Gerald Baeza \u003cgerald.baeza@stericsson.com\u003e\nTested-by: Yannick Fertre \u003cyannick.fertre@stericsson.com\u003e\nReviewed-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "ccc3d6976433aa67131117fccd2b5143d82a6f48", "tree": "5ef904efcb61988c273f4987cd2bc86c772cdec9", "parents": [ "42365cf0fa19473dde5fe226b0e7e9ab8ea18af8" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Thu May 17 13:47:38 2012 +0530" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:37 2013 +0100" }, "message": "dmaengine: ste_dma40: don\u0027t allow high priority dest event lines\n\nHardware bug: when a logical channel is triggerred by a high priority\ndestination event line, an extra packet transaction is generated in case\nof important data write response latency on previous logical channel A\nand if the source transfer of current logical channel B is already\ncompleted and if no other channel with a higher priority than B is\nwaiting for execution.\n\nSoftware workaround: do not set the high priority level for the\ndestination event lines that trigger logical channels.\n\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nReviewed-by: Shreshtha Kumar Sahu \u003cshreshthakumar.sahu@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "42365cf0fa19473dde5fe226b0e7e9ab8ea18af8", "tree": "a0ee91453a5fcced002ddf724bd16ca921fd05cb", "parents": [ "92bb6cdb5302a4b0b3c6b6cfc0854aaed882c4bc" ], "author": { "name": "Narayanan G", "email": "narayanan.gopalakrishnan@stericsson.com", "time": "Fri Jan 20 13:56:14 2012 +0530" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:32 2013 +0100" }, "message": "dmaengine: ste_dma40: don\u0027t check for pm_runtime_suspended()\n\nThe check for runtime suspend is not needed during a regular suspend, as\nthe framework takes care of this. This fixes the issue of DMA driver\nnot letting the system to go to deepsleep in the first attempt.\n\nSigned-off-by: Narayanan G \u003cnarayanan.gopalakrishnan@stericsson.com\u003e\nReviewed-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "92bb6cdb5302a4b0b3c6b6cfc0854aaed882c4bc", "tree": "cad01bad6f27e959d94e8261499fb72fb9544173", "parents": [ "b96710e5b22609aa6e4ba5c3936ea7f026a7c427" ], "author": { "name": "Per Forlin", "email": "per.forlin@stericsson.com", "time": "Thu Oct 13 12:11:36 2011 +0200" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:27 2013 +0100" }, "message": "dmaengine: ste_dma40: limit burst size to 16\n\nThe client is not aware of the maximum burst size in the dma driver. If\nthe size exceeds 16 set max to 16.\n\nSigned-off-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "b96710e5b22609aa6e4ba5c3936ea7f026a7c427", "tree": "c738ab582345c0b88c2bbc5310d0e799c3a082b2", "parents": [ "8a5d2039ab9050a8a2e649eaf3ca4e372a7709f1" ], "author": { "name": "Per Forlin", "email": "per.forlin@stericsson.com", "time": "Tue Oct 18 18:39:47 2011 +0200" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:18 2013 +0100" }, "message": "dmaengine: ste_dma40: set dma max seg size\n\nMaximum DMA seg size is (0xffff x data_width). If max seg\nsize is not set it deafults to 64k. This results in failure\nif transferring 64k in byte mode.\nLarge seg sizes may be supported by splitting large transfer.\n\nSigned-off-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "8a5d2039ab9050a8a2e649eaf3ca4e372a7709f1", "tree": "8b597cd23c8a58c6a0ff33da85a9bb4b7553c8da", "parents": [ "0fd602235dd702d16722857da748d15c26b81ed1" ], "author": { "name": "Per Forlin", "email": "per.forlin@stericsson.com", "time": "Wed Sep 28 09:32:20 2011 +0200" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:15 2013 +0100" }, "message": "dmaengine: ste_dma40: use writel_relaxed for lcxa\n\nlcpa and lcla are written often and the cache_sync() overhead in writel\nis costly, especially for wlan where every single network packet (in RX\nmode) corresponds to a separate DMA transfer.\n\nSigned-off-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nReviewed-by: Narayanan Gopalakrishnan \u003cnarayanan.gopalakrishnan@stericsson.com\u003e\nReviewed-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "0fd602235dd702d16722857da748d15c26b81ed1", "tree": "ee767fd8fdfcddb785629c755866271aca08227c", "parents": [ "d1c3ed669a2d452cacfb48c2d171a1f364dae2ed" ], "author": { "name": "Narayanan", "email": "narayanan.gopalakrishnan@stericsson.com", "time": "Tue Sep 13 17:00:22 2011 +0530" }, "committer": { "name": "Fabio Baltieri", "email": "fabio.baltieri@linaro.org", "time": "Mon Jan 14 10:50:09 2013 +0100" }, "message": "dmaengine: ste_dma40: reset priority bit for logical channels\n\nThis patch sets the SSCFG/SDCFG bit[7] PRI only for physical channel\nrequests with high priority. For logical channels, this bit will be\nzero.\n\nSigned-off-by: Narayanan G \u003cnarayanan.gopalakrishnan@stericsson.com\u003e\nReviewed-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Fabio Baltieri \u003cfabio.baltieri@linaro.org\u003e\n" }, { "commit": "3a95b9fbba893ebfa9b83de105707539e0228e0c", "tree": "c2d2d725e2962c26ed7233099c63544e0b21c2ad", "parents": [ "a5dbff111cacecd2e79843a51cc86d21d3648af5" ], "author": { "name": "Alessandro Rubini", "email": "rubini@gnudd.com", "time": "Sat Nov 24 00:22:56 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sun Jan 13 05:19:45 2013 -0800" }, "message": "pl080.h: moved from arm/include/asm/hardware to include/linux/amba/\n\nThe header is used by drivers/dma/amba-pl08x.c, which can be compiled\nunder x86, where PL080 exists under a PCI-to-AMBA bridge. This patche\nmoves it where it can be accessed by other architectures, and fixes\nall users.\n\nSigned-off-by: Alessandro Rubini \u003crubini@gnudd.com\u003e\nAcked-by: Giancarlo Asnaghi \u003cgiancarlo.asnaghi@st.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a5dbff111cacecd2e79843a51cc86d21d3648af5", "tree": "8bc05b8c9dcf742f5e4977a92567c58cc82d3a10", "parents": [ "23d5f4ec9de43dbc73a42f1483d9339b907c3dff" ], "author": { "name": "Heikki Krogerus", "email": "heikki.krogerus@linux.intel.com", "time": "Thu Jan 10 10:53:06 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:23 2013 -0800" }, "message": "dma: dw_dmac: clear suspend bit during termination\n\nThe DMA transfer could not be established if previously it was paused and\nterminated. In that case the channel\u0027s suspend bit remains set that prevents to\ntransfer anything until channel is resumed.\n\nThe patch adds the dwc_chan_resume() call instead of a plain flag assignment.\nThat clears the DWC_CFGL_CH_SUSP bit as well during termination.\n\nSigned-off-by: Heikki Krogerus \u003cheikki.krogerus@linux.intel.com\u003e\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "23d5f4ec9de43dbc73a42f1483d9339b907c3dff", "tree": "fa19bbfd959291a624433b6f328017160b1dc0d9", "parents": [ "495aea4b571d1b7f77883f87754247b115627f68" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:53:05 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:23 2013 -0800" }, "message": "dw_dmac: backlink to dw_dma in dw_dma_chan is superfluous\n\nThe same information could be extracted from the struct dma_chan.\nThe patch introduces helper function dwc_get_data_width() as well.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "495aea4b571d1b7f77883f87754247b115627f68", "tree": "2209fcd7f743d707bdd28bd9cf01b80580285a5f", "parents": [ "0fdb567fc72da906e230ce7e2aae2feba260a6be" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 11:11:41 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:23 2013 -0800" }, "message": "dw_dmac: make usage of dw_dma_slave optional\n\nThe driver requires a custom slave configuration to be present to be able to\nmake the slave transfers. Nevertheless, in some cases we need only the request\nline as an additional information to the generic slave configuration. The\nrequest line is provided by slave_id parameter of the dma_slave_config\nstructure. That\u0027s why the custom slave configuration could be optional for such\ncases.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "0fdb567fc72da906e230ce7e2aae2feba260a6be", "tree": "6aa11e21c5e79b248100e439c5273326f0feb7ac", "parents": [ "01126856ff4f7d4cc5899c208fd4d3c7d0a2b83a" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:53:03 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:23 2013 -0800" }, "message": "dw_dmac: store direction in the custom channel structure\n\nCurrently the direction value comes from the generic slave configuration\nstructure and explicitly as a preparation function parameter. The first one is\nkinda obsoleted. Thus, we have to store the value passed to the preparation\nfunction somewhere in our structures to be able to use it later. The best\ncandidate to provide the storage is a custom channel structure. Until now we\nstill keep and check the direction field of the slave config structure as well.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "01126856ff4f7d4cc5899c208fd4d3c7d0a2b83a", "tree": "1254d60ed83826b4a4dd7db2c7c7c4de44b4d2bb", "parents": [ "a725dcc0342b4d9ffc6ae4aedc2973d902aabeb1" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:53:02 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:22 2013 -0800" }, "message": "dw_dmac: call .probe after we have a device in place\n\nIf we don\u0027t yet have the platform device for the driver when it is being loaded\nwe fail to probe the driver. So instead of calling probe() directly we call\nplatform_driver_register(). It will call the probe() immediately if we have the\ndevice but also makes the driver to work on platforms where the platform device\nis created later.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a725dcc0342b4d9ffc6ae4aedc2973d902aabeb1", "tree": "dab15167734ab5adfcd4847e2bcaf87951e783ef", "parents": [ "5127c4f8a314b798459985d93f7829cf9cf9bbc3" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:53:01 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:22 2013 -0800" }, "message": "dma: ste_dma40: reuse is_slave_direction helper\n\nThe is_slave_direction helps to check if the transfer type is slave.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nReviewed-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nReviewed-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "5127c4f8a314b798459985d93f7829cf9cf9bbc3", "tree": "26437fd105e41f0b94ac9cbe039544d829a89c27", "parents": [ "0efcdb20f4a83967c99da3d3bef9018f86532fae" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:53:00 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:22 2013 -0800" }, "message": "dma: ipu_idmac: reuse is_slave_direction helper\n\nThe is_slave_direction helps to check if the transfer type is slave.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nReviewed-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nCc: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "0efcdb20f4a83967c99da3d3bef9018f86532fae", "tree": "f60970a3ed460f8fb3b6190fbcb8c1b35b691fe6", "parents": [ "f44b92f4dd2f6caf326b149e0b9636a1d4e50184" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:52:59 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:22 2013 -0800" }, "message": "dma: ep93xx_dma: reuse is_slave_direction helper\n\nThe is_slave_direction helps to check if the transfer type is slave.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nReviewed-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nAcked-by: Mika Westerberg \u003cmika.westerberg@linux.intel.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f44b92f4dd2f6caf326b149e0b9636a1d4e50184", "tree": "500c283c06fdcb6194f5ec8c4347875a0cdff441", "parents": [ "0e7264cc79a2d5c0ffa32c08d8f1cf84b2ec4fef" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:52:58 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:21 2013 -0800" }, "message": "dma: dw_dmac: check direction properly in dw_dma_cyclic_prep\n\ndma_transfer_direction is a normal enum. It means we can\u0027t usually use the\nvalues as bit fields. Let\u0027s adjust this check and move it above the usage of\nthe direction parameter, due to the nature of the following usage of it.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "0e7264cc79a2d5c0ffa32c08d8f1cf84b2ec4fef", "tree": "a43173aaa8ae902adb9e2ed66055f2b6d38f6b5a", "parents": [ "61cc13a51bcff737ce02d2047834171c0365b00d" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Jan 10 10:52:57 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Jan 12 05:07:21 2013 -0800" }, "message": "dma: at_hdmac: check direction properly for cyclic transfers\n\ndma_transfer_direction is a normal enum. It means we can\u0027t usually use the\nvalues as bit fields. Let\u0027s adjust this check and move it above the usage of\nthe direction parameter, due to the nature of the following usage of it.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nReviewed-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nAcked-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "be1f94812c2cc0aaf696d39fe23104763ea52b5b", "tree": "2f9789af80ad91ad976a824548c0c2aa4d9b591f", "parents": [ "a6cf912c6047077a6eb860ed8dbfa342376ee395" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Fri Jan 11 11:24:19 2013 -0800" }, "committer": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Fri Jan 11 11:24:19 2013 -0800" }, "message": "ARM: OMAP: Fix dmaengine init for multiplatform\n\nOtherwise omap dmaengine will initialized when booted\non other SoCs. Fix this by initializing the platform\ndevice in arch/arm/*omap*/dma.c instead.\n\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Dan Williams \u003cdjbw@fb.com\u003e\nCc: Vinod Koul \u003cvinod.koul@intel.com\u003e\nTested-by: Ezequiel Garcia \u003cezequiel.garcia@free-electrons.com\u003e\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\n" }, { "commit": "21fe3c5245647d200a7ba25d42b80d21c578a8dc", "tree": "2a79b7236dc49b3475558cb530d8f0844a6bf067", "parents": [ "f5c6a7df35b04db906577e90fa5e133e56433bcf" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Wed Jan 09 10:17:14 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Jan 09 06:30:59 2013 -0800" }, "message": "dma: dw_dmac: add dwc_chan_pause and dwc_chan_resume\n\nWe will use at least the dwc_chan_resume() later.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f5c6a7df35b04db906577e90fa5e133e56433bcf", "tree": "dd444985a0c76cf282e4142331506731e8bf2555", "parents": [ "21e93c1e7dae0e8b1914a522c331f0f7763fa89d" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Wed Jan 09 10:17:13 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Jan 09 06:30:59 2013 -0800" }, "message": "dw_dmac: update tx_node_active in dwc_do_single_block\n\nThe \"else\" keyword in the dw_dma_tasklet is removed as well. All together\nsimplifies the logic of the code and understanding of what is happening there.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "21e93c1e7dae0e8b1914a522c331f0f7763fa89d", "tree": "d61a15466afc06cc098908de1486ebae77e6d3e3", "parents": [ "cbd65312ba6b508e994d40729e84a51301870bcc" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Wed Jan 09 10:17:12 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Jan 09 06:30:59 2013 -0800" }, "message": "dw_dmac: remove redundant check\n\nThere is no need to check the callback_required parameter, due to we check the\ncallback pointer to be a non-NULL.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "cbd65312ba6b508e994d40729e84a51301870bcc", "tree": "c41f95b7232b93b70df91d96e81c8ed5c85f242b", "parents": [ "123de543414bce42da9729071962d4a9512612c8" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Wed Jan 09 10:17:11 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Jan 09 06:30:59 2013 -0800" }, "message": "dw_dmac: check for mapping errors\n\nOtherwise we get a warning in case of CONFIG_DMA_API_DEBUG\u003dy\n\n[ 45.775943] WARNING: at lib/dma-debug.c:933 check_unmap+0x5d6/0x6ac()\n[ 45.782369] dw_dmac dw_dmac.0: DMA-API: device driver failed to check map error[device address\u003d0x00000000356efcc0] [size\u003d28 bytes] [mapped as single]\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "123de543414bce42da9729071962d4a9512612c8", "tree": "c29ba393677ad8255b41b47e11f2d1c8650f0d7d", "parents": [ "f2ad6992546674e5915a34a1bc36dcdd8fb29bd2" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Wed Jan 09 10:17:01 2013 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Jan 09 06:30:34 2013 -0800" }, "message": "dw_dmac: absence of pdata isn\u0027t critical when autocfg is set\n\nThe patch allows to probe the device when platform data is absent and hardware\nauto configuration is enabled. In that case the default platform data is used\nwhere the channel allocation order is set to ascending, channel priority is set\nto ascending, and private property is set to true.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "b9bb37f5486ba05d2b557dbf1aeb754fef618985", "tree": "25abbffc56fbe2ebe2fc843f97d53f06aa08e54d", "parents": [ "bef2a8d3f6cb91bc8743bdd63d3eb6a37bf27b12" ], "author": { "name": "Laxman Dewangan", "email": "ldewangan@nvidia.com", "time": "Wed Jan 09 15:26:22 2013 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Jan 09 06:13:32 2013 -0800" }, "message": "dma: tegra: implement flags parameters for cyclic transfer\n\nThe flag parameter is added in the cyclic transfer request.\nUse the flag option of:\n- DMA_PREP_INTERRUPT for enabling interrupt.\n- DMA_CTRL_ACK for deciding whether ack is requred or not for\n descriptor.\n\nSigned-off-by: Laxman Dewangan \u003cldewangan@nvidia.com\u003e\nCC: \u003cstable@vger.kernel.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "974b33586b4bbbdab33c666417f9ba9ef50b62c3", "tree": "0ee18a21c5d9fba897903e8505b606793cb8fb27", "parents": [ "ca5c8a4c2aba577b4cd2f4c3c72a768a80830294", "434fec16948cf5afa3cba31dcb00359bdbf24758" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 08 18:53:56 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 08 18:53:56 2013 -0800" }, "message": "Merge tag \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc\n\nPull ARM SoC fixes from Olof Johansson:\n \"People are back from the holiday breaks, and it shows. Here are a\n bunch of fixes for a number of platforms:\n - A couple of small fixes for Nomadik\n - A larger set of changes for kirkwood/mvebu\n - uart driver selection, dt clocks, gpio-poweroff fixups, a few\n __init annotation fixes and some error handling improvement in\n their xor dma driver.\n - i.MX had a couple of minor fixes (and a critical one for flexcan2\n clock setup)\n - MXS has a small board fix and a framebuffer bugfix\n - A set of fixes for Samsung Exynos, fixing default bootargs and some\n Exynos5440 clock issues\n - A set of OMAP changes including PM fixes and a few sparse warning\n fixups\n\n All in all a bit more positive code delta than we\u0027d ideally want to\n see here, mostly from the OMAP PM changes, but nothing overly crazy.\"\n\n* tag \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)\n ARM: clps711x: Fix bad merge of clockevents setup\n ARM: highbank: save and restore L2 cache and GIC on suspend\n ARM: highbank: add a power request clear\n ARM: highbank: fix secondary boot and hotplug\n ARM: highbank: fix typos with hignbank in power request functions\n ARM: dts: fix highbank cpu mpidr values\n ARM: dts: add device_type prop to cpu nodes on Calxeda platforms\n ARM: mx5: Fix MX53 flexcan2 clock\n ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array\n pinctrl: mvebu: make pdma clock on dove mandatory\n ARM: Dove: Add pinctrl clock to DT\n dma: mv_xor: fix error handling for clocks\n dma: mv_xor: fix error handling of mv_xor_channel_add()\n arm: mvebu: Add missing ; for cpu node.\n arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces\n arm: mvebu: Armada XP MV78230 has two cores, not one\n clk: mvebu: Remove inappropriate __init tagging\n ARM: Kirkwood: Use fixed-regulator instead of board gpio call\n ARM: Kirkwood: Fix missing sdio clock\n ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers\n ...\n" }, { "commit": "bef2a8d3f6cb91bc8743bdd63d3eb6a37bf27b12", "tree": "42f3b88674d7d7c836c88cd7ef0e9d352bb2cecf", "parents": [ "ac4989874af56435c308bdde9ad9c837a26f8b23" ], "author": { "name": "Javier Martin", "email": "javier.martin@vista-silicon.com", "time": "Tue Oct 30 15:58:50 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Tue Jan 08 07:44:56 2013 -0800" }, "message": "dmaengine: imx-dma: Disable use of hw_chain to fix sg_dma transfers.\n\nHW chaining is currently broken in imx-dma. It can be easily reproduced doing\nintensive accesses to a external MMC card and checking how the file system\nis corrupted.\n\nPreventing the driver to use HW chaining solves these issues.\n\nSigned-off-by: Javier Martin \u003cjavier.martin@vista-silicon.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f2ad6992546674e5915a34a1bc36dcdd8fb29bd2", "tree": "3649fc43d17476c251db2ffbd547f73eb8f03f52", "parents": [ "5ea7caf30debefc1c4319f77146288fd5e92a803" ], "author": { "name": "Fabio Estevam", "email": "fabio.estevam@freescale.com", "time": "Mon Jan 07 23:48:39 2013 -0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Tue Jan 08 07:35:27 2013 -0800" }, "message": "dma: mxs-dma: Fix build warnings with W\u003d1\n\nFix the following warnings when building with W\u003d1 option:\n\ndrivers/dma/mxs-dma.c: In function \u0027mxs_dma_alloc_chan_resources\u0027:\ndrivers/dma/mxs-dma.c:368:25: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]\ndrivers/dma/mxs-dma.c: In function \u0027mxs_dma_prep_slave_sg\u0027:\ndrivers/dma/mxs-dma.c:481:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]\ndrivers/dma/mxs-dma.c:494:3: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]\ndrivers/dma/mxs-dma.c:515:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]\ndrivers/dma/mxs-dma.c: In function \u0027mxs_dma_prep_dma_cyclic\u0027:\ndrivers/dma/mxs-dma.c:563:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]\n\nSigned-off-by: Fabio Estevam \u003cfabio.estevam@freescale.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "5ea7caf30debefc1c4319f77146288fd5e92a803", "tree": "0ce202f3d64bd81ed975231f8f56fcd8d9416427", "parents": [ "1b140908c4cda43c653bb080c244d112e619008f" ], "author": { "name": "Laxman Dewangan", "email": "ldewangan@nvidia.com", "time": "Sun Jan 06 21:52:03 2013 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Tue Jan 08 02:53:29 2013 -0800" }, "message": "dma: tegra: add support for Tegra114 SoC\n\nNVIDIA\u0027s Tegra114 has APB DMA controller which has 32 dma channels\nand support support channel wise pause control.\n\nAdd support for Tegra114 which uses the channel wise pause control\nhardware feature.\n\nSigned-off-by: Laxman Dewangan \u003cldewangan@nvidia.com\u003e\nReviewed-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "1b140908c4cda43c653bb080c244d112e619008f", "tree": "4ee653ced926928937db65f029bf19c6d42b7048", "parents": [ "e65f32ca21faed30ce37cd6480271697fe671f74" ], "author": { "name": "Laxman Dewangan", "email": "ldewangan@nvidia.com", "time": "Sun Jan 06 21:52:02 2013 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Tue Jan 08 02:53:05 2013 -0800" }, "message": "dma: tegra: add support for channel wise pause\n\nNVIDIA\u0027s some SoCs like Tegra114 support the channel wise pause control\ninplace of global pause which pauses all DMA channels. When SoCs support\nthe channel wise pause control then it uses the global pause for clock\ngating for register access as well as all DMA channel pause. Hence DMA\nregisters are not accessible if DMAs are globally paused on these new SoCs.\n\nAdd support for channel wise pause feature if SoCs support it.\n\nSigned-off-by: Laxman Dewangan \u003cldewangan@nvidia.com\u003e\nReviewed-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "e65f32ca21faed30ce37cd6480271697fe671f74", "tree": "0a90dc63bce62a03c75cf972a47f92e3bd9fd9e0", "parents": [ "c419fcfd071cf34ba00f9f65282583772d2655e7" ], "author": { "name": "Jean Delvare", "email": "khali@linux-fr.org", "time": "Thu Sep 06 09:19:35 2012 +0200" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:15 2013 -0800" }, "message": "dma: ipu: Drop unused spinlock\n\nI was checking why this spinlock was never initialized, but it turns\nout it\u0027s not used anywhere, so we can drop it.\n\nSigned-off-by: Jean Delvare \u003ckhali@linux-fr.org\u003e\nCc: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdjbw@fb.com\u003e\n" }, { "commit": "6decffd5f6afaf55722d9c85b8739621dca63d0f", "tree": "42125cf2b650a00117c8d4354622898f6412bba0", "parents": [ "1a363068dcc2269931daef360ed14d2a262f19f7" ], "author": { "name": "Dave Jiang", "email": "dave.jiang@intel.com", "time": "Tue Nov 27 15:16:08 2012 -0700" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:13 2013 -0800" }, "message": "ioat: remove chanerr mask setting for IOAT v3.x\n\nThe existing code set a value in the PCI_CHANERRMSK_INT register\nfor a workaround to address a pre-silicon bug on the Intel 5520 IO hub that\nhas been fixed when the hardware was released. There is no need for this\ncode.\n\nSigned-off-by: Dave Jiang \u003cdave.jiang@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdjbw@fb.com\u003e\n" }, { "commit": "1a363068dcc2269931daef360ed14d2a262f19f7", "tree": "63893a7519328cd7312ba8d14251f5a9e3ceb605", "parents": [ "7d283397ade3c9e51de644676a6593e1f724ac00" ], "author": { "name": "Dave Jiang", "email": "dave.jiang@intel.com", "time": "Mon Dec 03 16:08:37 2012 -0700" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:13 2013 -0800" }, "message": "ioat: Add alignment workaround for IVB platforms\n\nThe PCI IDs for IvyBridge IOAT DMA needs to go into a header file since\ndma_v3.c looks them up for certain hardware workarounds. Need to add to the\nalignment workaround for IOAT 3.2 since it wasn\u0027t fixed in IVB.\n\nSigned-off-by: Dave Jiang \u003cdave.jiang@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdjbw@fb.com\u003e\n" }, { "commit": "2cbe7feba1ac521b5668609c35b94536bbbcd52f", "tree": "70373963c3c6f3ee91ad073a5f987d36de4e8175", "parents": [ "e239345f642e6a255d0ba1e3d92c2f9ec5a44fbe" ], "author": { "name": "Bartlomiej Zolnierkiewicz", "email": "b.zolnierkie@samsung.com", "time": "Thu Nov 08 10:02:07 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:11 2013 -0800" }, "message": "dmaengine: add cpu_relax() to busy-loop in dma_sync_wait()\n\nRemoval of the busy-loop from dma_sync_wait() is not a trivial\ntask so just add cpu_relax() to the loop for now.\n\nCc: Vinod Koul \u003cvinod.koul@intel.com\u003e\nCc: Tomasz Figa \u003ct.figa@samsung.com\u003e\nSigned-off-by: Bartlomiej Zolnierkiewicz \u003cb.zolnierkie@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Dan Williams \u003cdjbw@fb.com\u003e\n" }, { "commit": "7369f56e3e7193583576ec705d95647b04838b05", "tree": "d6fade0f7097f11c38f9074a00aebf0f1f300419", "parents": [ "5e034f7b659be9d94e64aaaa985ab530dd847fdb" ], "author": { "name": "Bartlomiej Zolnierkiewicz", "email": "b.zolnierkie@samsung.com", "time": "Mon Nov 05 10:00:19 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:08 2013 -0800" }, "message": "ioat3: add missing DMA unmap to ioat_xor_val_self_test()\n\nMake ioat_xor_val_self_test() do DMA unmapping itself and fix handling\nof failure cases.\n\nCc: Dan Williams \u003cdjbw@fb.com\u003e\nCc: Tomasz Figa \u003ct.figa@samsung.com\u003e\nSigned-off-by: Bartlomiej Zolnierkiewicz \u003cb.zolnierkie@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Dan Williams \u003cdjbw@fb.com\u003e\n" }, { "commit": "5e034f7b659be9d94e64aaaa985ab530dd847fdb", "tree": "2d26d8d83035a199d8f773f9bc66562713387133", "parents": [ "7c1119bdd650fa58dad8157bc75c5fcf6ed97843" ], "author": { "name": "Shiraz Hashim", "email": "shiraz.hashim@st.com", "time": "Fri Nov 09 15:26:29 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:07 2013 -0800" }, "message": "dmaengine/dmatest: terminate transfers only in case of errors\n\ndmatest erroneously terminated transfers in normal cases also leading to\ntest failures for multiple threads over a channel. Fix this and\nterminate transfers only in case of errors.\n\nSigned-off-by: Shiraz Hashim \u003cshiraz.hashim@st.com\u003e\nSigned-off-by: Deepak Sikri \u003cdeepak.sikri@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "7c1119bdd650fa58dad8157bc75c5fcf6ed97843", "tree": "f0694e33203d6c7f8db1f0904702a66480c3779b", "parents": [ "944ea4dd38b8575e30a5699633c81945bff1864d" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed Nov 28 06:49:47 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:06 2013 -0800" }, "message": "dma: sh: Don\u0027t use ENODEV for failing slave lookup\n\nIf dmaengine driver\u0027s .device_alloc_chan_resources() method returns -ENODEV,\ndma_request_channel() will decide, that the driver has been removed and will\nremove the device from its list. To prevent this use ENXIO if a slave lookup\nfails.\n\nReported-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: stable@vger.kernel.org\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "944ea4dd38b8575e30a5699633c81945bff1864d", "tree": "7883205efd57c7c1e95ad2cb2bed59bde165ecc8", "parents": [ "e4d43c1764bc3ee1150f24e530db2b5b23e91425" ], "author": { "name": "Jon Mason", "email": "jon.mason@intel.com", "time": "Sun Nov 11 23:03:20 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:05 2013 -0800" }, "message": "dmatest: Fix NULL pointer dereference on ioat\n\ndevice_control is an optional and not implemented in all DMA drivers.\nAny calls to these will result in a NULL pointer dereference. dmatest\nmakes two of these calls when completing the kernel thread and removing\nthe module. These are corrected by calling the dmaengine_device_control\nwrapper and checking for a non-existant device_control function pointer\nthere.\n\nSigned-off-by: Jon Mason \u003cjon.mason@intel.com\u003e\nCC: Vinod Koul \u003cvinod.koul@intel.com\u003e\nCC: Dan Williams \u003cdjbw@fb.com\u003e\nReviewed-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "e4d43c1764bc3ee1150f24e530db2b5b23e91425", "tree": "92ee9654e05cbf0760eccbe13d4663f31a16ce58", "parents": [ "a14acb4ac2a1486f6633c55eb7f7ded07f3ec9fc" ], "author": { "name": "Sachin Kamat", "email": "sachin.kamat@linaro.org", "time": "Thu Nov 15 06:27:50 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:04 2013 -0800" }, "message": "DMA: PL330: Use devm_* functions\n\ndevm_* functions are device managed and make the code and error\nhandling a bit simpler.\n\nCc: Jassi Brar \u003cjassisinghbrar@gmail.com\u003e\nSigned-off-by: Sachin Kamat \u003csachin.kamat@linaro.org\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "f7d935dcc34fae9ad4a39f2cf8e2a96199c48948", "tree": "900ccbbe1963162bcdb3009e60ad596d75db3e40", "parents": [ "91f8aecc501e456c97a6f49f7ea3797e874d5d89" ], "author": { "name": "Barry Song", "email": "Baohua.Song@csr.com", "time": "Thu Nov 01 22:54:43 2012 +0800" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:05:03 2013 -0800" }, "message": "dmaengine: sirf: enable the driver support new SiRFmarco SoC\n\nThe driver supports old up SiRFprimaII SoCs, this patch makes it support\nthe new SiRFmarco as well.\nSiRFmarco, as a SMP SoC, adds new DMA_INT_EN_CLR and DMA_CH_LOOP_CTRL_CLR\nregisters, to disable IRQ/Channel, we should write 1 to the corresponding\nbit in the two CLEAR register.\n\nTested on SiRFmarco using SPI driver:\n $ /mnt/spidev-sirftest -D /dev/spidev32766.0\n spi mode: 0\n bits per word: 8\n max speed: 500000 Hz (500 KHz)\n\n 00 00 00 00 00 00\n 00 00 00 00 00 00\n 00 00 00 00 00 00\n 00 00 00 00 00 00\n 00 00 00 00 00 00\n 00 00 00 00 00 00\n 00 00 00 00\n\n $ cat /proc/interrupts\n CPU0 CPU1\n 32: 1593 0 GIC sirfsoc_timer0\n 33: 0 3533 GIC sirfsoc_timer1\n 44: 0 0 GIC sirfsoc_dma\n 45: 16 0 GIC sirfsoc_dma\n 47: 6 0 GIC sirfsoc_spi\n 50: 5654 0 GIC sirfsoc-uart\n ...\n\nSigned-off-by: Barry Song \u003cBaohua.Song@csr.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "522d974451743abcf674cbebd7c29d44fbd63586", "tree": "0d0d6340a7ae7739132cbb916804118943d226a0", "parents": [ "35fa4dbc8c877c69144736cfe144a95a1e7ccc1a" ], "author": { "name": "Bartlomiej Zolnierkiewicz", "email": "b.zolnierkie@samsung.com", "time": "Mon Nov 05 10:00:13 2012 +0000" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:04:58 2013 -0800" }, "message": "ioat: add missing DMA unmap to ioat_dma_self_test()\n\nMake ioat_dma_self_test() do DMA unmapping itself and fix handling\nof failure cases.\n\nCc: Dan Williams \u003cdjbw@fb.com\u003e\nCc: Tomasz Figa \u003ct.figa@samsung.com\u003e\nSigned-off-by: Bartlomiej Zolnierkiewicz \u003cb.zolnierkie@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Dan Williams \u003cdjbw@fb.com\u003e\n" }, { "commit": "1ba151cdf5ac120fc829ee6524fefedc6828947f", "tree": "484c216fddcdaa8916cd12fc9419619ffb842bde", "parents": [ "8be9e32b310cd8c4302991c8ff6692689c7d9d76" ], "author": { "name": "Joe Perches", "email": "joe@perches.com", "time": "Sun Oct 28 01:05:44 2012 -0700" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:04:56 2013 -0800" }, "message": "dma: Convert dev_printk(KERN_\u003cLEVEL\u003e to dev_\u003clevel\u003e(\n\ndev_\u003clevel\u003e calls take less code than dev_printk(KERN_\u003cLEVEL\u003e\nand reducing object size is good.\nCoalesce formats for easier grep.\n\nSigned-off-by: Joe Perches \u003cjoe@perches.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "8be9e32b310cd8c4302991c8ff6692689c7d9d76", "tree": "7d2ae649564d9cab6d7228e1cb0c8f4dfbe965be", "parents": [ "91998261dd0d5aefb56d87cef84f7810c32f6194" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Sun Oct 28 00:49:32 2012 +0900" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:04:55 2013 -0800" }, "message": "dmatest: adjust invalid module parameters for number of source buffers\n\nDMA Engine test module has module parameters to set the number of source\nbuffers for xor and pq operations. We can set these values larger than the\nmaximum number of sources that the device can support. These values are\nnot adjusted and the unsupported number of source buffers are passed to the\ndevice. But most drivers don\u0027t check it, so unexpected results will happen.\n\nThis makes an appropriate adjustment for these module parameters before use.\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: Vinod Koul \u003cvinod.koul@intel.com\u003e\nCc: Dan Williams \u003cdjbw@fb.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "91998261dd0d5aefb56d87cef84f7810c32f6194", "tree": "cde4ac255948455dfa756007bf29dde89ae10d83", "parents": [ "e5a087fdc1ebe5bba40bcecb53c28a0af70e3b47" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Sun Oct 28 00:49:31 2012 +0900" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:04:54 2013 -0800" }, "message": "dma: amba-pl08x: use vchan_dma_desc_free_list\n\nvchan_dma_desc_free_list() iterates through each virt_dma_desc in the\nspecified list_head and calls vchan-\u003edesc_free().\n\nWe can use it instead of repeated execution of pl08x_desc_free() for each\nvirt_dma_desc in the list_head. Because vchan-\u003edesc_free callback is set\nas pl08x_desc_free() for amba-pl08x driver.\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: Vinod Koul \u003cvinod.koul@intel.com\u003e\nCc: Dan Williams \u003cdjbw@fb.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "e63a47a361e03eaf79e0f2f6cdaca8e7679d1867", "tree": "0cbd9b8403484048fbf97f5d4efa3a6df1d53274", "parents": [ "ba84bd7146b9244de0ce04cdc668521a73f5336f" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Oct 18 17:34:12 2012 +0300" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:04:52 2013 -0800" }, "message": "dw_dmac: introduce to_dw_desc() macro\n\nThe to_dw_desc() macro helps to retrieve the dw_desc node from the\ncorresponding list_head structure.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nReviewed-by: Felipe Balbi \u003cbalbi@ti.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" }, { "commit": "ba84bd7146b9244de0ce04cdc668521a73f5336f", "tree": "ebeed6c0fa714c7efdba2e72c2f5f4a3f8ed6d21", "parents": [ "6168d5670bd764557b5e06b1842964a44cf34a45" ], "author": { "name": "Andy Shevchenko", "email": "andriy.shevchenko@linux.intel.com", "time": "Thu Oct 18 17:34:11 2012 +0300" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Jan 07 22:04:52 2013 -0800" }, "message": "dw_dmac: change dev_crit to dev_WARN in dwc_handle_error\n\nIn case of handling a bad descriptor the dwc_handle_error() will dump a stack\nas well. It\u0027s a lot more verbose and more likely to get user\u0027s attention.\n\nSigned-off-by: Andy Shevchenko \u003candriy.shevchenko@linux.intel.com\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@linaro.org\u003e\nReviewed-by: Felipe Balbi \u003cbalbi@ti.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n" } ], "next": "6168d5670bd764557b5e06b1842964a44cf34a45" }