)]}' { "log": [ { "commit": "556f12f602ac0a18a82ca83e9f8e8547688fc633", "tree": "d4051f6dd57968c8e8e660ad117c5bedc2aa7e8e", "parents": [ "fffddfd6c8e0c10c42c6e2cc54ba880fcc36ebbb", "018ba0a6efada61b9bc17500101d81c3d35807c2" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Feb 25 21:18:18 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Feb 25 21:18:18 2013 -0800" }, "message": "Merge tag \u0027pci-v3.9-changes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci\n\nPull PCI changes from Bjorn Helgaas:\n \"Host bridge hotplug\n - Major overhaul of ACPI host bridge add/start (Rafael Wysocki, Yinghai Lu)\n - Major overhaul of PCI/ACPI binding (Rafael Wysocki, Yinghai Lu)\n - Split out ACPI host bridge and ACPI PCI device hotplug (Yinghai Lu)\n - Stop caching _PRT and make independent of bus numbers (Yinghai Lu)\n\n PCI device hotplug\n - Clean up cpqphp dead code (Sasha Levin)\n - Disable ARI unless device and upstream bridge support it (Yijing Wang)\n - Initialize all hot-added devices (not functions 0-7) (Yijing Wang)\n\n Power management\n - Don\u0027t touch ASPM if disabled (Joe Lawrence)\n - Fix ASPM link state management (Myron Stowe)\n\n Miscellaneous\n - Fix PCI_EXP_FLAGS accessor (Alex Williamson)\n - Disable Bus Master in pci_device_shutdown (Konstantin Khlebnikov)\n - Document hotplug resource and MPS parameters (Yijing Wang)\n - Add accessor for PCIe capabilities (Myron Stowe)\n - Drop pciehp suspend/resume messages (Paul Bolle)\n - Make pci_slot built-in only (not a module) (Jiang Liu)\n - Remove unused PCI/ACPI bind ops (Jiang Liu)\n - Removed used pci_root_bus (Bjorn Helgaas)\"\n\n* tag \u0027pci-v3.9-changes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (51 commits)\n PCI/ACPI: Don\u0027t cache _PRT, and don\u0027t associate them with bus numbers\n PCI: Fix PCI Express Capability accessors for PCI_EXP_FLAGS\n ACPI / PCI: Make pci_slot built-in only, not a module\n PCI/PM: Clear state_saved during suspend\n PCI: Use atomic_inc_return() rather than atomic_add_return()\n PCI: Catch attempts to disable already-disabled devices\n PCI: Disable Bus Master unconditionally in pci_device_shutdown()\n PCI: acpiphp: Remove dead code for PCI host bridge hotplug\n PCI: acpiphp: Create companion ACPI devices before creating PCI devices\n PCI: Remove unused \"rc\" in virtfn_add_bus()\n PCI: pciehp: Drop suspend/resume ENTRY messages\n PCI/ASPM: Don\u0027t touch ASPM if forcibly disabled\n PCI/ASPM: Deallocate upstream link state even if device is not PCIe\n PCI: Document MPS parameters pci\u003dpcie_bus_safe, pci\u003dpcie_bus_perf, etc\n PCI: Document hpiosize\u003d and hpmemsize\u003d resource reservation parameters\n PCI: Use PCI Express Capability accessor\n PCI: Introduce accessor to retrieve PCIe Capabilities Register\n PCI: Put pci_dev in device tree as early as possible\n PCI: Skip attaching driver in device_add()\n PCI: acpiphp: Keep driver loaded even if no slots found\n ...\n" }, { "commit": "f2dfcde4ccd101fa3ba8f6c27273a0e359ea9c9c", "tree": "2920a8164d5243bc4c6a5e0eb006f1256ccecf66", "parents": [ "ecb87e6609d3a559eacf7a61f5b4e088a797d07c", "775c739e0b08fbffb791595a4708460fc978b5b6" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Feb 02 14:35:57 2013 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Feb 02 14:35:57 2013 -0700" }, "message": "Merge branch \u0027pci/misc\u0027 into next\n\n* pci/misc:\n PCI: pciehp: Drop suspend/resume ENTRY messages\n PCI: Document MPS parameters pci\u003dpcie_bus_safe, pci\u003dpcie_bus_perf, etc\n PCI: Document hpiosize\u003d and hpmemsize\u003d resource reservation parameters\n PCI: Use PCI Express Capability accessor\n PCI: Introduce accessor to retrieve PCIe Capabilities Register\n PCI: Kill pci_is_reassigndev()\n" }, { "commit": "1c531d82ee1a220ae7132ba0eb31edaf186b56d1", "tree": "67736581bd5f36192ef9f2f27a1c28ec9b61e330", "parents": [ "7c9c003c68de51fb8712a01e904444ef40c742f5" ], "author": { "name": "Myron Stowe", "email": "myron.stowe@redhat.com", "time": "Fri Jan 25 17:55:45 2013 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jan 30 21:24:39 2013 -0700" }, "message": "PCI: Use PCI Express Capability accessor\n\nUse PCI Express Capability access functions to simplify device\nCapabilities Register usages.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "7c9c003c68de51fb8712a01e904444ef40c742f5", "tree": "b552544c5c2d59b8e94199ccc75fd782c5a68ee8", "parents": [ "10c463a7a3b96285133c37e230781a1274abbd31" ], "author": { "name": "Myron Stowe", "email": "myron.stowe@redhat.com", "time": "Fri Jan 25 17:55:39 2013 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jan 30 21:24:05 2013 -0700" }, "message": "PCI: Introduce accessor to retrieve PCIe Capabilities Register\n\nProvide an accessor to retrieve the PCI Express device\u0027s Capabilities\nRegister.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "939de1d69c5fb0da0cfe05a1a7c981421cf876f7", "tree": "3ca1c6457e1c1ae4c11adab60e94d666841983aa", "parents": [ "fb455792d91469fe556b68f1baa9ff5493432be8", "4f535093cf8f6da8cfda7c36c2c1ecd2e9586ee4" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Jan 26 17:35:58 2013 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Jan 26 17:35:58 2013 -0700" }, "message": "Merge branch \u0027pci/yinghai-root-bus-hotplug\u0027 into next\n\n* pci/yinghai-root-bus-hotplug:\n PCI: Put pci_dev in device tree as early as possible\n PCI: Skip attaching driver in device_add()\n PCI: acpiphp: Keep driver loaded even if no slots found\n PCI/ACPI: Print info if host bridge notify handler installation fails\n PCI: acpiphp: Move host bridge hotplug to pci_root.c\n PCI/ACPI: acpiphp: Rename alloc_acpiphp_hp_work() to alloc_acpi_hp_work()\n PCI: Make device create/destroy logic symmetric\n PCI: Fix reference count leak in pci_dev_present()\n PCI: Set pci_dev dev_node early so IOAPIC irq_descs are allocated locally\n PCI: Add root bus children dev\u0027s res to fail list\n PCI: acpiphp: Add is_hotplug_bridge detection\n\nConflicts:\n\tdrivers/pci/pci.h\n" }, { "commit": "58d9a38f6facb28e935ec2747f6d9e9bf4684118", "tree": "252899cd333ccc3c23c2435acd3f377512092aa0", "parents": [ "d59f53bc9bd80ee62072dea590fc623c67cb84a8" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Mon Jan 21 13:20:51 2013 -0800" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Jan 25 15:10:12 2013 -0700" }, "message": "PCI: Skip attaching driver in device_add()\n\nWe want to add PCI devices to the device tree as early as possible but\ndelay attaching drivers.\n\ndevice_add() adds a device to the device hierarchy and (via\ndevice_attach()) attaches a matching driver and calls its .probe() method.\nWe want to separate adding the device to the hierarchy from attaching the\ndriver.\n\nThis patch does that by adding \"match_driver\" in struct pci_dev. When\nfalse, we return failure from pci_bus_match(), which makes device_attach()\nbelieve there\u0027s no matching driver.\n\nLater, we set \"match_driver \u003d true\" and call device_attach() again, which\nnow attaches the driver and calls its .probe() method.\n\n[bhelgaas: changelog, explicitly init dev-\u003ematch_driver,\nfold device_attach() call into pci_bus_add_device()]\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nAcked-by: Rafael J. Wysocki \u003crafael.j.wysocki@intel.com\u003e" }, { "commit": "08261d87f7d1b6253ab3223756625a5c74532293", "tree": "c0025a8e4593564bf356f1f185c21a137a96cb8a", "parents": [ "51906e779f2b13b38f8153774c4c7163d412ffd9" ], "author": { "name": "Alexander Gordeev", "email": "agordeev@redhat.com", "time": "Mon Nov 19 16:02:10 2012 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@kernel.org", "time": "Thu Jan 24 17:25:13 2013 +0100" }, "message": "PCI/MSI: Enable multiple MSIs with pci_enable_msi_block_auto()\n\nThe new function pci_enable_msi_block_auto() tries to allocate\nmaximum possible number of MSIs up to the number the device\nsupports. It generalizes a pattern when pci_enable_msi_block()\nis contiguously called until it succeeds or fails.\n\nOpposite to pci_enable_msi_block() which takes the number of\nMSIs to allocate as a input parameter,\npci_enable_msi_block_auto() could be used by device drivers to\nobtain the number of assigned MSIs and the number of MSIs the\ndevice supports.\n\nSigned-off-by: Alexander Gordeev \u003cagordeev@redhat.com\u003e\nAcked-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nCc: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nCc: Jeff Garzik \u003cjgarzik@pobox.com\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nLink: http://lkml.kernel.org/r/c3de2419df94a0f95ca1a6f755afc421486455e6.1353324359.git.agordeev@redhat.com\nSigned-off-by: Ingo Molnar \u003cmingo@kernel.org\u003e\n" }, { "commit": "6c0cc950ae670403a362bdcbf3cde0df33744928", "tree": "45c438f12c5af1ea66aae56c03ac9e53f80899fa", "parents": [ "295a7f6235bfa21be3454aebc1bea1eaf0b74fb7" ], "author": { "name": "Rafael J. Wysocki", "email": "rafael.j.wysocki@intel.com", "time": "Wed Jan 09 22:33:37 2013 +0100" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sun Jan 13 17:14:28 2013 -0700" }, "message": "ACPI / PCI: Set root bridge ACPI handle in advance\n\nThe ACPI handles of PCI root bridges need to be known to\nacpi_bind_one(), so that it can create the appropriate\n\"firmware_node\" and \"physical_node\" files for them, but currently\nthe way it gets to know those handles is not exactly straightforward\n(to put it lightly).\n\nThis is how it works, roughly:\n\n 1. acpi_bus_scan() finds the handle of a PCI root bridge,\n creates a struct acpi_device object for it and passes that\n object to acpi_pci_root_add().\n\n 2. acpi_pci_root_add() creates a struct acpi_pci_root object,\n populates its \"device\" field with its argument\u0027s address\n (device-\u003ehandle is the ACPI handle found in step 1).\n\n 3. The struct acpi_pci_root object created in step 2 is passed\n to pci_acpi_scan_root() and used to get resources that are\n passed to pci_create_root_bus().\n\n 4. pci_create_root_bus() creates a struct pci_host_bridge object\n and passes its \"dev\" member to device_register().\n\n 5. platform_notify(), which for systems with ACPI is set to\n acpi_platform_notify(), is called.\n\nSo far, so good. Now it starts to be \"interesting\".\n\n 6. acpi_find_bridge_device() is used to find the ACPI handle of\n the given device (which is the PCI root bridge) and executes\n acpi_pci_find_root_bridge(), among other things, for the\n given device object.\n\n 7. acpi_pci_find_root_bridge() uses the name (sic!) of the given\n device object to extract the segment and bus numbers of the PCI\n root bridge and passes them to acpi_get_pci_rootbridge_handle().\n\n 8. acpi_get_pci_rootbridge_handle() browses the list of ACPI PCI\n root bridges and finds the one that matches the given segment\n and bus numbers. Its handle is then used to initialize the\n ACPI handle of the PCI root bridge\u0027s device object by\n acpi_bind_one(). However, this is *exactly* the ACPI handle we\n started with in step 1.\n\nNeedless to say, this is quite embarassing, but it may be avoided\nthanks to commit f3fd0c8 (ACPI: Allow ACPI handles of devices to be\ninitialized in advance), which makes it possible to initialize the\nACPI handle of a device before passing it to device_register().\n\nAccordingly, add a new __weak routine, pcibios_root_bridge_prepare(),\ndefaulting to an empty implementation that can be replaced by the\ninterested architecutres (x86 and ia64 at the moment) with functions\nthat will set the root bridge\u0027s ACPI handle before its dev member is\npassed to device_register(). Make both x86 and ia64 provide such\nimplementations of pcibios_root_bridge_prepare() and remove\nacpi_pci_find_root_bridge() and acpi_get_pci_rootbridge_handle() that\naren\u0027t necessary any more.\n\nIncluded is a fix for breakage on systems with non-ACPI PCI host\nbridges from Bjorn Helgaas.\n\nSigned-off-by: Rafael J. Wysocki \u003crafael.j.wysocki@intel.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "3c449ed0075994b3f3371f8254560428ba787efc", "tree": "d4ed374d484cc1818c47b66fb71c1955ee277ae9", "parents": [ "b95168e010a405add13aa010d7c45b55dc4026c7" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Nov 03 21:39:31 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jan 07 15:58:48 2013 -0700" }, "message": "PCI/ACPI: Reserve firmware-allocated resources for hot-added root buses\n\nFirmware may have assigned PCI BARs for hot-added devices, so reserve\nthose resources before trying to allocate more.\n\n[bhelgaas: move empty weak definition here]\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "193c0d682525987db59ac3a24531a77e4947aa95", "tree": "7b58346171c4d07e2c2ee6c3c469c325495149a4", "parents": [ "8b0cab14951fbf8126795ab301835a8f8126a988", "1cb73f8c479e66541fefd3f7fa547b1fa56cdc54" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 13 12:14:47 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 13 12:14:47 2012 -0800" }, "message": "Merge tag \u0027for-3.8\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci\n\nPull PCI update from Bjorn Helgaas:\n \"Host bridge hotplug:\n - Untangle _PRT from struct pci_bus (Bjorn Helgaas)\n - Request _OSC control before scanning root bus (Taku Izumi)\n - Assign resources when adding host bridge (Yinghai Lu)\n - Remove root bus when removing host bridge (Yinghai Lu)\n - Remove _PRT during hot remove (Yinghai Lu)\n\n SRIOV\n - Add sysfs knobs to control numVFs (Don Dutile)\n\n Power management\n - Notify devices when power resource turned on (Huang Ying)\n\n Bug fixes\n - Work around broken _SEG on HP xw9300 (Bjorn Helgaas)\n - Keep runtime PM enabled for unbound PCI devices (Huang Ying)\n - Fix Optimus dual-GPU runtime D3 suspend issue (Dave Airlie)\n - Fix xen frontend shutdown issue (David Vrabel)\n - Work around PLX PCI 9050 BAR alignment erratum (Ian Abbott)\n\n Miscellaneous\n - Add GPL license for drivers/pci/ioapic (Andrew Cooks)\n - Add standard PCI-X, PCIe ASPM register #defines (Bjorn Helgaas)\n - NumaChip remote PCI support (Daniel Blueman)\n - Fix PCIe Link Capabilities Supported Link Speed definition (Jingoo\n Han)\n - Convert dev_printk() to dev_info(), etc (Joe Perches)\n - Add support for non PCI BAR ROM data (Matthew Garrett)\n - Add x86 support for host bridge translation offset (Mike Yoknis)\n - Report success only when every driver supports AER (Vijay\n Pandarathil)\"\n\nFix up trivial conflicts.\n\n* tag \u0027for-3.8\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits)\n PCI: Use phys_addr_t for physical ROM address\n x86/PCI: Add NumaChip remote PCI support\n ath9k: Use standard #defines for PCIe Capability ASPM fields\n iwlwifi: Use standard #defines for PCIe Capability ASPM fields\n iwlwifi: collapse wrapper for pcie_capability_read_word()\n iwlegacy: Use standard #defines for PCIe Capability ASPM fields\n iwlegacy: collapse wrapper for pcie_capability_read_word()\n cxgb3: Use standard #defines for PCIe Capability ASPM fields\n PCI: Add standard PCIe Capability Link ASPM field names\n PCI/portdrv: Use PCI Express Capability accessors\n PCI: Use standard PCIe Capability Link register field names\n x86: Use PCI setup data\n PCI: Add support for non-BAR ROMs\n PCI: Add pcibios_add_device\n EFI: Stash ROMs if they\u0027re not in the PCI BAR\n PCI: Add and use standard PCI-X Capability register names\n PCI/PM: Keep runtime PM enabled for unbound PCI devices\n xen-pcifront: Handle backend CLOSED without CLOSING\n PCI: SRIOV control and status via sysfs (documentation)\n PCI/AER: Report success only when every device has AER-aware driver\n ...\n" }, { "commit": "6be35c700f742e911ecedd07fcc43d4439922334", "tree": "ca9f37214d204465fcc2d79c82efd291e357c53c", "parents": [ "e37aa63e87bd581f9be5555ed0ba83f5295c92fc", "520dfe3a3645257bf83660f672c47f8558f3d4c4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 12 18:07:07 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 12 18:07:07 2012 -0800" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next\n\nPull networking changes from David Miller:\n\n1) Allow to dump, monitor, and change the bridge multicast database\n using netlink. From Cong Wang.\n\n2) RFC 5961 TCP blind data injection attack mitigation, from Eric\n Dumazet.\n\n3) Networking user namespace support from Eric W. Biederman.\n\n4) tuntap/virtio-net multiqueue support by Jason Wang.\n\n5) Support for checksum offload of encapsulated packets (basically,\n tunneled traffic can still be checksummed by HW). From Joseph\n Gasparakis.\n\n6) Allow BPF filter access to VLAN tags, from Eric Dumazet and\n Daniel Borkmann.\n\n7) Bridge port parameters over netlink and BPDU blocking support\n from Stephen Hemminger.\n\n8) Improve data access patterns during inet socket demux by rearranging\n socket layout, from Eric Dumazet.\n\n9) TIPC protocol updates and cleanups from Ying Xue, Paul Gortmaker, and\n Jon Maloy.\n\n10) Update TCP socket hash sizing to be more in line with current day\n realities. The existing heurstics were choosen a decade ago.\n From Eric Dumazet.\n\n11) Fix races, queue bloat, and excessive wakeups in ATM and\n associated drivers, from Krzysztof Mazur and David Woodhouse.\n\n12) Support DOVE (Distributed Overlay Virtual Ethernet) extensions\n in VXLAN driver, from David Stevens.\n\n13) Add \"oops_only\" mode to netconsole, from Amerigo Wang.\n\n14) Support set and query of VEB/VEPA bridge mode via PF_BRIDGE, also\n allow DCB netlink to work on namespaces other than the initial\n namespace. From John Fastabend.\n\n15) Support PTP in the Tigon3 driver, from Matt Carlson.\n\n16) tun/vhost zero copy fixes and improvements, plus turn it on\n by default, from Michael S. Tsirkin.\n\n17) Support per-association statistics in SCTP, from Michele\n Baldessari.\n\nAnd many, many, driver updates, cleanups, and improvements. Too\nnumerous to mention individually.\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1722 commits)\n net/mlx4_en: Add support for destination MAC in steering rules\n net/mlx4_en: Use generic etherdevice.h functions.\n net: ethtool: Add destination MAC address to flow steering API\n bridge: add support of adding and deleting mdb entries\n bridge: notify mdb changes via netlink\n ndisc: Unexport ndisc_{build,send}_skb().\n uapi: add missing netconf.h to export list\n pkt_sched: avoid requeues if possible\n solos-pci: fix double-free of TX skb in DMA mode\n bnx2: Fix accidental reversions.\n bna: Driver Version Updated to 3.1.2.1\n bna: Firmware update\n bna: Add RX State\n bna: Rx Page Based Allocation\n bna: TX Intr Coalescing Fix\n bna: Tx and Rx Optimizations\n bna: Code Cleanup and Enhancements\n ath9k: check pdata variable before dereferencing it\n ath5k: RX timestamp is reported at end of frame\n ath9k_htc: RX timestamp is reported at end of frame\n ...\n" }, { "commit": "1cb73f8c479e66541fefd3f7fa547b1fa56cdc54", "tree": "662259b3d602db1ba4fe203346cc73dff826b2fa", "parents": [ "3ced69f8bba1b766d6c1ea8f26c32a9b3e6fe75c", "dbd3fc3345390a989a033427aa915a0dfb62149f" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Dec 10 16:20:12 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Dec 10 16:20:12 2012 -0700" }, "message": "Merge branch \u0027pci/mjg-pci-roms-from-efi\u0027 into next\n\n* pci/mjg-pci-roms-from-efi:\n PCI: Use phys_addr_t for physical ROM address\n" }, { "commit": "dbd3fc3345390a989a033427aa915a0dfb62149f", "tree": "ec8c03902652acc7d298a0bd51517d853fb86cde", "parents": [ "f9a37be0f02a943d63e3346b19f9c9d8d91826cb" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Dec 10 11:24:42 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Dec 10 11:24:42 2012 -0700" }, "message": "PCI: Use phys_addr_t for physical ROM address\n\nUse phys_addr_t rather than \"void *\" for physical memory address.\nThis removes casts and fixes a \"cast from pointer to integer of different\nsize\" warning on ppc44x_defconfig.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "72e1e868ca8f14ef34c95e0e8b73f64b6acf5934", "tree": "d3bc99f121693ab8f09c03ea555254c9314ff98d", "parents": [ "edb1daab8e91338b7e2a6c41faec695891ccda35", "f9a37be0f02a943d63e3346b19f9c9d8d91826cb" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Dec 06 14:37:32 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Dec 06 14:37:32 2012 -0700" }, "message": "Merge branch \u0027pci/mjg-pci-roms-from-efi\u0027 into next\n\n* pci/mjg-pci-roms-from-efi:\n x86: Use PCI setup data\n PCI: Add support for non-BAR ROMs\n PCI: Add pcibios_add_device\n EFI: Stash ROMs if they\u0027re not in the PCI BAR\n" }, { "commit": "84c1b80e32638f881c17390dfe88143e5cd3f583", "tree": "64310c48ed0dce9d830bd60d280ac0fb59ee28a1", "parents": [ "eca0d4676d8e29c209ddce0c0c1755472ffc70a6" ], "author": { "name": "Matthew Garrett", "email": "mjg@redhat.com", "time": "Wed Dec 05 14:33:27 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Dec 05 14:38:26 2012 -0700" }, "message": "PCI: Add support for non-BAR ROMs\n\nPlatforms may provide their own mechanisms for obtaining ROMs. Add support\nfor using data provided by the platform in that case.\n\nSigned-off-by: Matthew Garrett \u003cmjg@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nTested-by: Seth Forshee \u003cseth.forshee@canonical.com\u003e" }, { "commit": "eca0d4676d8e29c209ddce0c0c1755472ffc70a6", "tree": "0455ac26c96f0a383665fe353d28dbeaa3e1f14b", "parents": [ "dd5fc854de5fd37adfcef8a366cd21a55aa01d3d" ], "author": { "name": "Matthew Garrett", "email": "mjg@redhat.com", "time": "Wed Dec 05 14:33:27 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Dec 05 14:38:26 2012 -0700" }, "message": "PCI: Add pcibios_add_device\n\nPlatforms may want to provide architecture-specific functionality during\nPCI enumeration. Add a pcibios_add_device() call that architectures can\noverride to do so.\n\nSigned-off-by: Matthew Garrett \u003cmjg@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nTested-by: Seth Forshee \u003cseth.forshee@canonical.com\u003e" }, { "commit": "15856ad50bf5ea02a5ee22399c036d49e7e1124d", "tree": "1b57e34523f94ed8b2e9f71dc17197ee2b8c7a4a", "parents": [ "7dc30303342562685392c8c7aa5194e98fd27625" ], "author": { "name": "Bill Pemberton", "email": "wfp5p@virginia.edu", "time": "Wed Nov 21 15:35:00 2012 -0500" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@linuxfoundation.org", "time": "Wed Nov 28 13:16:47 2012 -0800" }, "message": "PCI: Remove __dev* markings\n\nCONFIG_HOTPLUG is going away as an option so __devexit_p, __devint,\n__devinitdata, __devinitconst, and _devexit are no longer needed.\n\nSigned-off-by: Bill Pemberton \u003cwfp5p@virginia.edu\u003e\nAcked-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@linuxfoundation.org\u003e\n" }, { "commit": "b40b97ae736cad3084b13d2969b10c474572de89", "tree": "dd2a4e0a95c1da764a3b17056b5be1a4d631c18d", "parents": [ "8c610c120fb6ea279e8d01ce7aa555da29e59374" ], "author": { "name": "Bill Pemberton", "email": "wfp5p@virginia.edu", "time": "Wed Nov 21 15:34:57 2012 -0500" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@linuxfoundation.org", "time": "Wed Nov 28 12:53:46 2012 -0800" }, "message": "PCI: Remove CONFIG_HOTPLUG ifdefs\n\nRemove conditional code based on CONFIG_HOTPLUG being false. It\u0027s\nalways on now in preparation of it going away as an option.\n\nSigned-off-by: Bill Pemberton \u003cwfp5p@virginia.edu\u003e\nAcked-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@linuxfoundation.org\u003e\n" }, { "commit": "3c282db1656733c1267e6af4c22179bb04faf2ef", "tree": "141669ad06cfc2459ec93aeb9d86237328faa61d", "parents": [ "d3fe3988fb24e5ed13b2243b789a652882d3b26c", "918b4053184c0ca22236e70e299c5343eea35304" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Nov 28 11:39:19 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Nov 28 11:39:19 2012 -0700" }, "message": "Merge branch \u0027pci/misc\u0027 into next\n\n* pci/misc:\n PCI/AER: Report success only when every device has AER-aware driver\n\nConflicts:\n\tdrivers/pci/pcie/aer/aerdrv_core.c\n" }, { "commit": "918b4053184c0ca22236e70e299c5343eea35304", "tree": "7597202f834b5e8c7a42c226894215cbeeb9ef91", "parents": [ "71fbad6c9a28629b6af40b0ff48f36c6610a1394" ], "author": { "name": "Vijay Mohan Pandarathil", "email": "vijaymohan.pandarathil@hp.com", "time": "Sat Nov 17 11:47:18 2012 +0000" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Nov 26 14:46:28 2012 -0700" }, "message": "PCI/AER: Report success only when every device has AER-aware driver\n\nWhen an error is detected on a PCIe device which does not have an\nAER-aware driver, prevent AER infrastructure from reporting\nsuccessful error recovery.\n\nThis is because the report_error_detected() function that gets\ncalled in the first phase of recovery process allows forward\nprogress even when the driver for the device does not have AER\ncapabilities. It seems that all callbacks (in pci_error_handlers\nstructure) registered by drivers that gets called during error\nrecovery are not mandatory. So the intention of the infrastructure\ndesign seems to be to allow forward progress even when a specific\ncallback has not been registered by a driver. However, if error\nhandler structure itself has not been registered, it doesn\u0027t make\nsense to allow forward progress.\n\nAs a result of the current design, in the case of a single device\nhaving an AER-unaware driver or in the case of any function in a\nmulti-function card having an AER-unaware driver, a successful\nrecovery is reported.\n\nTypical scenario this happens is when a PCI device is detached\nfrom a KVM host and the pci-stub driver on the host claims the\ndevice. The pci-stub driver does not have error handling capabilities\nbut the AER infrastructure still reports that the device recovered\nsuccessfully.\n\nThe changes proposed here leaves the device(s)in an unrecovered state\nif the driver for the device or for any device in the subtree\ndoes not have error handler structure registered. This reflects\nthe true state of the device and prevents any partial recovery (or no\nrecovery at all) reported as successful.\n\n[bhelgaas: changelog]\nSigned-off-by: Vijay Mohan Pandarathil \u003cvijaymohan.pandarathil@hp.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nReviewed-by: Linas Vepstas \u003clinasvepstas@gmail.com\u003e\nReviewed-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e" }, { "commit": "3d567e0e291c4ffd041cf653aea3c38a1d5f4620", "tree": "254bcf81a4d14eae666ea18f05f19458f81bb372", "parents": [ "f37234160233561f2a2e3332272ae5b3725b620b" ], "author": { "name": "Nithin Nayak Sujir", "email": "nsujir@broadcom.com", "time": "Wed Nov 14 14:44:26 2012 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Nov 14 22:04:28 2012 -0500" }, "message": "tg3: Set 10_100_ONLY flag for additional 10/100 Mbps devices\n\n- Also refactor the conditional to use the existing tg3_pci_tbl array.\n- Set flags in the driver_data field of the pci_device_id structure to\nidentify these devices.\n- Add PCI_DEVICE_SUB() to pci.h to declare PCI 4-part IDs to match these\ndevices.\n\nSigned-off-by: Nithin Nayak Sujir \u003cnsujir@broadcom.com\u003e\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f9c15b429a5c82e613d59a32d4f49cea6e9d64eb", "tree": "b0862edccf51627ed70b6beaf06baaf2134844ea", "parents": [ "0dcccc5c53c55565a6b1061e1b15894495c7c9b9", "1452cd76a97bf7b93a015586dcabc73fd935e692" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Nov 13 14:33:32 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Nov 13 14:33:32 2012 -0700" }, "message": "Merge branch \u0027pci/don-sriov\u0027 into next\n\n* pci/don-sriov:\n PCI: Remove useless \"!dev\" tests\n PCI: Use spec names for SR-IOV capability fields\n PCI: Provide method to reduce the number of total VFs supported\n PCI: SRIOV control and status via sysfs\n PCI: Use is_visible() with boot_vga attribute for pci_dev\n PCI: Add pci_device_type to pdev\u0027s device struct\n" }, { "commit": "bff73156d3ad661655e6d9ef04c2284cf3abb0f1", "tree": "a26dc79db184a6977919909c3cc2dd653efe83f3", "parents": [ "1789382a72a537447d65ea4131d8bcc1ad85ce7b" ], "author": { "name": "Donald Dutile", "email": "ddutile@redhat.com", "time": "Mon Nov 05 15:20:37 2012 -0500" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Nov 09 21:37:39 2012 -0700" }, "message": "PCI: Provide method to reduce the number of total VFs supported\n\nSome implementations of SRIOV provide a capability structure\nvalue of TotalVFs that is greater than what the software can support.\nProvide a method to reduce the capability structure reported value\nto the value the driver can support.\nThis ensures sysfs reports the current capability of the system,\nhardware and software.\nExample for its use: igb \u0026 ixgbe -- report 8 \u0026 64 as TotalVFs,\nbut drivers only support 7 \u0026 63 maximum.\n\nSigned-off-by: Donald Dutile \u003cddutile@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "1789382a72a537447d65ea4131d8bcc1ad85ce7b", "tree": "a22142cf3882ccf95e9be73642d3738fb5a72af1", "parents": [ "625e1d59a89f50bace376f429d8cf50347af75f7" ], "author": { "name": "Donald Dutile", "email": "ddutile@redhat.com", "time": "Mon Nov 05 15:20:36 2012 -0500" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Nov 09 20:10:39 2012 -0700" }, "message": "PCI: SRIOV control and status via sysfs\n\nProvide files under sysfs to determine the maximum number of VFs\nan SR-IOV-capable PCIe device supports, and methods to enable and\ndisable the VFs on a per-device basis.\n\nCurrently, VF enablement by SR-IOV-capable PCIe devices is done\nvia driver-specific module parameters. If not setup in modprobe files,\nit requires admin to unload \u0026 reload PF drivers with number of desired\nVFs to enable. Additionally, the enablement is system wide: all\ndevices controlled by the same driver have the same number of VFs\nenabled. Although the latter is probably desired, there are PCI\nconfigurations setup by system BIOS that may not enable that to occur.\n\nTwo files are created for the PF of PCIe devices with SR-IOV support:\n\n sriov_totalvfs\tContains the maximum number of VFs the device\n\t\t\tcould support as reported by the TotalVFs register\n\t\t\tin the SR-IOV extended capability.\n\n sriov_numvfs\tContains the number of VFs currently enabled on\n\t\t\tthis device as reported by the NumVFs register in\n\t\t\tthe SR-IOV extended capability.\n\n\t\t\tWriting zero to this file disables all VFs.\n\n\t\t\tWriting a positive number to this file enables that\n\t\t\tnumber of VFs.\n\nThese files are readable for all SR-IOV PF devices. Writes to the\nsriov_numvfs file are effective only if a driver that supports the\nsriov_configure() method is attached.\n\nSigned-off-by: Donald Dutile \u003cddutile@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "642c92da36ae0bed3c31fdd408411ab95f4e326b", "tree": "28519422f156133241851c29dac86ed451e00018", "parents": [ "d4761ba2d6adbe24c792ec6223a5884ae4e82430" ], "author": { "name": "Taku Izumi", "email": "izumi.taku@jp.fujitsu.com", "time": "Tue Oct 30 15:26:18 2012 +0900" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Nov 07 09:43:28 2012 -0700" }, "message": "PCI: Don\u0027t pass pci_dev to pci_ext_cfg_avail()\n\npci_ext_cfg_avail() doesn\u0027t use the \"struct pci_dev *\" passed to\nit, and there\u0027s no requirement that a host bridge even be represented\nby a pci_dev. This drops the pci_ext_cfg_avail() parameter.\n\n[bhelgaas: changelog]\nSigned-off-by: Taku Izumi \u003cizumi.taku@jp.fujitsu.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "cdfcc572be0a8b423cecfb4ab5fd735fafe9c54a", "tree": "df188f735b592a2a359969d451ed3dc51ac6e55a", "parents": [ "62a08c5a3173c4462239804b959c0d29dc74493b" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Tue Oct 30 14:31:38 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Nov 03 16:26:37 2012 -0600" }, "message": "PCI: Add pci_stop_and_remove_root_bus()\n\nIt supports both PCI root bus and PCI bus under PCI bridge.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "1778794031aae75d4464904319d320edc3e77d39", "tree": "b5157865ab7a86f320ec7fc8128b62ddbb7d0a16", "parents": [ "8f0d8163b50e01f398b14bcd4dc039ac5ab18d64" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Tue Oct 30 14:31:10 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Oct 30 14:31:10 2012 -0600" }, "message": "PCI: Separate out pci_assign_unassigned_bus_resources()\n\nIt is main portion of pci_rescan_bus().\n\nSeparate it out and prepare to use it for PCI root bus hot add later.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "607ca46e97a1b6594b29647d98a32d545c24bdff", "tree": "30f4c0784bfddb57332cdc0678bd06d1e77fa185", "parents": [ "08cce05c5a91f5017f4edc9866cf026908c73f9f" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Sat Oct 13 10:46:48 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Sat Oct 13 10:46:48 2012 +0100" }, "message": "UAPI: (Scripted) Disintegrate include/linux\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Michael Kerrisk \u003cmtk.manpages@gmail.com\u003e\nAcked-by: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\nAcked-by: Dave Jones \u003cdavej@redhat.com\u003e\n" }, { "commit": "6dabee73d46bfafb8c588b21b14606914de97ee6", "tree": "140f679ec718d022e9946d8534af5cd7646340c6", "parents": [ "78890b5989d96ddce989cde929c45ceeded0fcaf", "769ae543dc8d5745e1ade88cbcf1271a96276fd2" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Sep 13 09:08:02 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Sep 13 09:08:02 2012 -0600" }, "message": "Merge branch \u0027pci/trivial\u0027 into next\n\n* pci/trivial:\n PCI: Drop duplicate const in DECLARE_PCI_FIXUP_SECTION\n PCI: Drop bogus default from ARCH_SUPPORTS_MSI\n PCI: cpqphp: Remove unreachable path\n PCI: Remove bus number resource debug messages\n PCI/AER: Print completion message at KERN_INFO to match starting message\n PCI: Fix drivers/pci/pci.c kernel-doc warnings\n" }, { "commit": "1959ec5f82acbdf91425b41600f119ebecb5f6a8", "tree": "b54bc758f10632e991a3a80a94b05f3940b6651c", "parents": [ "a63ab613ff48c593f4e9ace2d111978e35a202e4", "1d3520357df99baf4ad89f86268ac96cd38092d9" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Sep 12 13:54:10 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Sep 12 13:54:10 2012 -0600" }, "message": "Merge branch \u0027pci/stephen-const\u0027 into next\n\n* pci/stephen-const:\n make drivers with pci error handlers const\n scsi: make pci error handlers const\n netdev: make pci_error_handlers const\n PCI: Make pci_error_handlers const\n" }, { "commit": "a63ab613ff48c593f4e9ace2d111978e35a202e4", "tree": "067f8172d1a72625458e31869bb587eae5279b80", "parents": [ "a690a4cbf09f70723f9721ca96ab8b2b472b3391", "271fd03a3013b106ccc178d54219c1be0c9759b7" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Sep 11 17:01:54 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Sep 11 17:01:54 2012 -0600" }, "message": "Merge branch \u0027pci/gavin-window-alignment\u0027 into next\n\n* pci/gavin-window-alignment:\n powerpc/powernv: I/O and memory alignment for P2P bridges\n powerpc/PCI: Override pcibios_window_alignment()\n PCI: Refactor pbus_size_mem()\n PCI: Align P2P windows using pcibios_window_alignment()\n PCI: Add weak pcibios_window_alignment() interface\n" }, { "commit": "ac5ad93e92c3ffca4c7ba386aaa34244e27b7759", "tree": "53709126d79c3718c85fbca2ec5542aec88d4bd1", "parents": [ "479e0d485eaab452cf248cd1a9520015023b35b2" ], "author": { "name": "Gavin Shan", "email": "shangw@linux.vnet.ibm.com", "time": "Tue Sep 11 16:59:45 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Sep 11 16:59:45 2012 -0600" }, "message": "PCI: Add weak pcibios_window_alignment() interface\n\nThis patch implements a weak function to return the default I/O or memory\nwindow alignment for a P2P bridge. By default, I/O windows are aligned to\n4KiB or 1KiB and memory windows are aligned to 4MiB. Some platforms, e.g.,\npowernv, have special alignment requirements and can override\npcibios_window_alignment().\n\n[bhelgaas: changelog]\nSigned-off-by: Gavin Shan \u003cshangw@linux.vnet.ibm.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "769ae543dc8d5745e1ade88cbcf1271a96276fd2", "tree": "dfe49ee8a6064ad7effd4fdbcf2fc22cb1ebf71b", "parents": [ "67de07a77eed3970c39653a0e4d636b46ddfd83a" ], "author": { "name": "Mathias Krause", "email": "minipli@googlemail.com", "time": "Sun Sep 02 23:37:24 2012 +0200" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Sep 10 18:06:30 2012 -0600" }, "message": "PCI: Drop duplicate const in DECLARE_PCI_FIXUP_SECTION\n\nIt\u0027s redundant and makes sparse complain about it.\n\nSigned-off-by: Mathias Krause \u003cminipli@googlemail.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "494530284f16298050ab99f54b7b12dd7d1418a1", "tree": "c9f89874141cb81f17e06113add2b1019c3df17d", "parents": [ "0d7614f09c1ebdbaa1599a5aba7593f147bf96ee" ], "author": { "name": "Stephen Hemminger", "email": "shemminger@vyatta.com", "time": "Fri Sep 07 09:33:14 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Sep 07 16:24:59 2012 -0600" }, "message": "PCI: Make pci_error_handlers const\n\nSince pci_error_handlers is just a function table make it const.\n\nSigned-off-by: Stephen Hemminger \u003cshemminger@vyatta.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nAcked-by: Linas Vepstas \u003clinasvepstas@gmail.com\u003e" }, { "commit": "7bf79d8a9904ee1ed354e7e655f8045afda67fd6", "tree": "fde1ddd5e0743b9585bef508ff0baf7a8d90288f", "parents": [ "a28afda8cc6a45b2c5a4f98cf8fcddd877597701", "c29aabe22eafb4914aecebab6e99623894d81564" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Aug 23 18:36:10 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Aug 23 18:36:10 2012 -0600" }, "message": "Merge branch \u0027pci/bjorn-cleanup-remove\u0027 into next\n\n* pci/bjorn-cleanup-remove:\n PCI: Remove unused pci_dev_b()\n sgi-agp: Use list_for_each_entry() for bus-\u003edevices traversal\n parisc/PCI: Use list_for_each_entry() for bus-\u003edevices traversal\n parisc/PCI: Enable PERR/SERR on all devices\n frv/PCI: Use list_for_each_entry() for bus-\u003edevices traversal\n PCI: Leave normal LIST_POISON in deleted list entries\n PCI: Rename local variables to conventional names\n PCI: Remove unused, commented-out, code\n PCI: Stop and remove devices in one pass\n PCI: Fold stop and remove helpers into their callers\n PCI: Use list_for_each_entry() for bus-\u003edevices traversal\n PCI: Remove pci_stop_and_remove_behind_bridge()\n PCI: Don\u0027t export stop_bus_device and remove_bus_device interfaces\n pcmcia: Use common pci_stop_and_remove_bus_device()\n PCI: acpiphp: Use common pci_stop_and_remove_bus_device()\n PCI: acpiphp: Stop disabling bridges on remove\n" }, { "commit": "a28afda8cc6a45b2c5a4f98cf8fcddd877597701", "tree": "2ad4d76e22ddb294fcf31d06b79e7464c70c653a", "parents": [ "e1c171b86baaccab983ded5dfa1663c0981d2520", "defb9446fe417f72855bc8bf97aa5d8af076bdf8" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Aug 23 18:32:36 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Aug 23 18:32:36 2012 -0600" }, "message": "Merge branch \u0027pci/bjorn-find-next-ext-cap\u0027 into next\n\n* pci/bjorn-find-next-ext-cap:\n PCI: Add Vendor-Specific Extended Capability header info\n PCI: Add pci_find_next_ext_capability()\n\nConflicts:\n\tdrivers/pci/pci.c\n" }, { "commit": "8c0d3a02c1309eb6112d2e7c8172e8ceb26ecfca", "tree": "2fc4d3ef417623384d44b5feb9321dd483408186", "parents": [ "b2ef39be5744d4d3575474444345e71bd95013ba" ], "author": { "name": "Jiang Liu", "email": "jiang.liu@huawei.com", "time": "Tue Jul 24 17:20:05 2012 +0800" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Aug 23 09:41:20 2012 -0600" }, "message": "PCI: Add accessors for PCI Express Capability\n\nThe PCI Express Capability (PCIe spec r3.0, sec 7.8) comes in two\nversions, v1 and v2. In v1 Capability structures (PCIe spec r1.0 and\nr1.1), some fields are optional, so the structure size depends on the\ndevice type.\n\nThis patch adds functions to access this capability so drivers don\u0027t\nhave to be aware of the differences between v1 and v2. Note that these\nnew functions apply only to the \"PCI Express Capability,\" not to any of\nthe other \"PCI Express Extended Capabilities\" (AER, VC, ACS, MFVC, etc.)\n\nFunction pcie_capability_read_word/dword() reads the PCIe Capabilities\nregister and returns the value in the reference parameter \"val\". If\nthe PCIe Capabilities register is not implemented on the PCIe device,\n\"val\" is set to 0.\n\nFunction pcie_capability_write_word/dword() writes the value to the\nspecified PCIe Capability register.\n\nFunction pcie_capability_clear_and_set_word/dword() sets and/or clears bits\nof a PCIe Capability register.\n\n[bhelgaas: changelog, drop \"pci_\" prefixes, don\u0027t export\npcie_capability_reg_implemented()]\nSigned-off-by: Jiang Liu \u003cjiang.liu@huawei.com\u003e\nSigned-off-by: Yijing Wang \u003cwangyijing@huawei.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "b2ef39be5744d4d3575474444345e71bd95013ba", "tree": "1669c64868f78396da4f651d69da6afb43ce6052", "parents": [ "62f87c0e31d646d5501edf4f7feb07d0ad689d80" ], "author": { "name": "Yijing Wang", "email": "wangyijing@huawei.com", "time": "Tue Jul 24 17:20:04 2012 +0800" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Aug 23 09:41:05 2012 -0600" }, "message": "PCI: Remove unused field pcie_type from struct pci_dev\n\nWith introduction of pci_pcie_type(), pci_dev-\u003epcie_type field becomes\nredundant, so remove it.\n\nSigned-off-by: Yijing Wang \u003cwangyijing@huawei.com\u003e\nSigned-off-by: Jiang Liu \u003cjiang.liu@huawei.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "44a9a36f6be43636ac2342c06d9feb60db77826a", "tree": "3ff1b3d23d6416454599aa5712a081fdbe5aaaa0", "parents": [ "0d7614f09c1ebdbaa1599a5aba7593f147bf96ee" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Jul 13 14:24:59 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Aug 22 13:47:27 2012 -0600" }, "message": "PCI: Add pci_find_next_ext_capability()\n\nSome extended capabilities, e.g., the vendor-specific capability, can\noccur several times. The existing pci_find_ext_capability() only finds\nthe first occurrence. This adds pci_find_next_ext_capability(), which\ncan iterate through all of them.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "c29aabe22eafb4914aecebab6e99623894d81564", "tree": "ca5f6b17942c97de40e073390ac5732454de9097", "parents": [ "0a4af1473a7d81fc90e195fb5b241ab5fcf933ca" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Aug 16 17:13:00 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Aug 22 11:34:38 2012 -0600" }, "message": "PCI: Remove unused pci_dev_b()\n\nAll uses of pci_dev_b() have been replaced by list_for_each_entry(), so\nremove it.\n\nTested-by: Yijing Wang \u003cwangyijing@huawei.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nAcked-by: Yinghai Lu \u003cyinghai@kernel.org\u003e" }, { "commit": "125e14bb35e65b1ddfb7252fa8f6e3c50dbb6db2", "tree": "98e1e0489b613fc0b2a1bb4871609ed189c5c4b1", "parents": [ "657c2077a2dab228fcf28a708df1b1bcf4195803" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Aug 17 11:07:49 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Aug 22 11:31:32 2012 -0600" }, "message": "PCI: Remove pci_stop_and_remove_behind_bridge()\n\nThe PCMCIA CardBus driver was the only user of\npci_stop_and_remove_behind_bridge(), and it now uses\npci_stop_and_remove_bus_device() instead, so remove this interface.\n\nThis removes exported symbol pci_stop_and_remove_behind_bridge.\n\nTested-by: Yijing Wang \u003cwangyijing@huawei.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nAcked-by: Yinghai Lu \u003cyinghai@kernel.org\u003e" }, { "commit": "657c2077a2dab228fcf28a708df1b1bcf4195803", "tree": "61af7ec744b731078db943088a83b285be2d7845", "parents": [ "0a140577316268b3263fd169d339188ad1636af3" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Aug 17 10:07:00 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Aug 22 11:31:26 2012 -0600" }, "message": "PCI: Don\u0027t export stop_bus_device and remove_bus_device interfaces\n\nThe acpiphp hotplug driver was the only user of pci_stop_bus_device() and\n__pci_remove_bus_device(), and it now uses pci_stop_and_remove_bus_device()\ninstead, so stop exposing these interfaces.\n\nThis removes these exported symbols:\n\n __pci_remove_bus_device\n pci_stop_bus_device\n\nTested-by: Yijing Wang \u003cwangyijing@huawei.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nAcked-by: Yinghai Lu \u003cyinghai@kernel.org\u003e" }, { "commit": "786e22885d9959fda0473ace5a61cb11620fba9b", "tree": "bfd70885b7d52deaef338ee212bf66ac682f8e42", "parents": [ "0d7614f09c1ebdbaa1599a5aba7593f147bf96ee" ], "author": { "name": "Yijing Wang", "email": "wangyijing@huawei.com", "time": "Tue Jul 24 17:20:02 2012 +0800" }, "committer": { "name": "Jiang Liu", "email": "liuj97@gmail.com", "time": "Mon Aug 20 22:32:20 2012 +0800" }, "message": "PCI: Add pcie_flags_reg to cache PCIe capabilities register\n\nSince PCI Express Capabilities Register is read only, cache its value\ninto struct pci_dev to avoid repeatedly calling pci_read_config_*().\n\nSigned-off-by: Yijing Wang \u003cwangyijing@huawei.com\u003e\nSigned-off-by: Jiang Liu \u003cjiang.liu@huawei.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "6ee53f4c38e70ba34777ad38807a50c1812ff36f", "tree": "8a4eeef5923d28c2e4ab14f4559e686cc1fce455", "parents": [ "d68e70c6e59ad08feca291c2790164d3231c425e", "1c975931128c1128892981095a64fb8eabf240eb" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Jul 10 08:36:09 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Jul 10 08:36:09 2012 -0600" }, "message": "Merge branch \u0027pci/bjorn-p2p-bridge-windows\u0027 into next\n\n* pci/bjorn-p2p-bridge-windows:\n sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases()\n PCI: support sizing P2P bridge I/O windows with 1K granularity\n PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2)\n PCI: allow P2P bridge windows starting at PCI bus address zero\n\nConflicts:\n\tdrivers/pci/probe.c\n\tinclude/linux/pci.h\n" }, { "commit": "2b28ae1912e5ce5bb0527e352ae6ff04e76183d1", "tree": "f8fb930ee1277c1e59c3db8bb802867e2c2d9a59", "parents": [ "5dde383e2ef5e22fe7db689dc38c1aabfb801449" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jul 09 13:38:57 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jul 09 19:52:04 2012 -0600" }, "message": "PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2)\n\n9d265124d051 and 15a260d53f7c added quirks for P2P bridges that support\nI/O windows that start/end at 1K boundaries, not just the 4K boundaries\ndefined by the PCI spec. For details, see the IOBL_ADR register and the\nEN1K bit in the CNF register in the Intel 82870P2 (P64H2).\n\nThese quirks complicate the code that reads P2P bridge windows\n(pci_read_bridge_io() and pci_cfg_fake_ranges()) because the bridge\nI/O resource is updated in the HEADER quirk, in pci_read_bridge_io(),\nin pci_setup_bridge(), and again in the FINAL quirk. This is confusing\nand makes it impossible to reassign the bridge windows after FINAL\nquirks are run.\n\nThis patch adds support for 1K windows in the generic paths, so the\nHEADER quirk only has to enable this support. The FINAL quirk, which\nused to undo damage done by pci_setup_bridge(), is no longer needed.\n\nThis removes \"if (!res-\u003estart) res-\u003estart \u003d ...\" from pci_read_bridge_io();\nthat was part of 9d265124d051 to avoid overwriting the resource filled in\nby the quirk. Since pci_read_bridge_io() itself now knows about\ngranularity, the quirk no longer updates the resource and this test is no\nlonger needed.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "85a00dd391d2de1e177c5ad8db5672428934ac20", "tree": "1dbf69da98dd2e4f6d5dfc75f8dacc00d1664f89", "parents": [ "35e7f73c32ad44a931d918d04e317a7fb0c63e6e", "29e8d7bff2f52dd5464a9fb24ece608bbf8fd5ae" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Jul 05 15:31:05 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Jul 05 15:31:05 2012 -0600" }, "message": "Merge branch \u0027pci/myron-pcibios_setup\u0027 into next\n\n* pci/myron-pcibios_setup:\n xtensa/PCI: factor out pcibios_setup()\n x86/PCI: adjust section annotations for pcibios_setup()\n unicore32/PCI: adjust section annotations for pcibios_setup()\n tile/PCI: factor out pcibios_setup()\n sparc/PCI: factor out pcibios_setup()\n sh/PCI: adjust section annotations for pcibios_setup()\n sh/PCI: factor out pcibios_setup()\n powerpc/PCI: factor out pcibios_setup()\n parisc/PCI: factor out pcibios_setup()\n MIPS/PCI: adjust section annotations for pcibios_setup()\n MIPS/PCI: factor out pcibios_setup()\n microblaze/PCI: factor out pcibios_setup()\n ia64/PCI: factor out pcibios_setup()\n cris/PCI: factor out pcibios_setup()\n alpha/PCI: factor out pcibios_setup()\n PCI: pull pcibios_setup() up into core\n" }, { "commit": "2b6f2c3520124e8bad4bffa71f5b98e602b9cf03", "tree": "f99110de830ffaa0e592d9d66294293ca0c3dd3e", "parents": [ "cfaf025112d3856637ff34a767ef785ef5cf2ca9" ], "author": { "name": "Myron Stowe", "email": "myron.stowe@redhat.com", "time": "Mon Jun 25 21:30:57 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Jun 26 06:22:31 2012 -0600" }, "message": "PCI: pull pcibios_setup() up into core\n\nCurrently, all of the architectures implement their own pcibios_setup()\nroutine. Most of the implementations do nothing so this patch introduces\na generic (__weak) routine in the core that can be used by all\narchitectures as a default. If necessary, it can be overridden by\narchitecture-specific code.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "35e7f73c32ad44a931d918d04e317a7fb0c63e6e", "tree": "e3cb8c89c8230aaa45a0f1b101decdc3b9831938", "parents": [ "e5028b52e46eb1379d78d136bd0890705f331183", "448bd857d48e69b33ef323739dc6d8ca20d4cda7" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Jun 23 11:59:43 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Jun 23 11:59:43 2012 -0600" }, "message": "Merge branch \u0027topic/huang-d3cold-v7\u0027 into next\n\n* topic/huang-d3cold-v7:\n PCI/PM: add PCIe runtime D3cold support\n PCI: do not call pci_set_power_state with PCI_D3cold\n PCI/PM: add runtime PM support to PCIe port\n ACPI/PM: specify lowest allowed state for device sleep state\n" }, { "commit": "448bd857d48e69b33ef323739dc6d8ca20d4cda7", "tree": "4c1178f9c7dd2d78af2ac1ed26b214b04be1554a", "parents": [ "8497f696686ae1ab3f01e5956046d59844b9f500" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Sat Jun 23 10:23:51 2012 +0800" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Jun 23 10:50:59 2012 -0600" }, "message": "PCI/PM: add PCIe runtime D3cold support\n\nThis patch adds runtime D3cold support and corresponding ACPI platform\nsupport. This patch only enables runtime D3cold support; it does not\nenable D3cold support during system suspend/hibernate.\n\nD3cold is the deepest power saving state for a PCIe device, where its main\npower is removed. While it is in D3cold, you can\u0027t access the device at\nall, not even its configuration space (which is still accessible in D3hot).\nTherefore the PCI PM registers can not be used to transition into/out of\nthe D3cold state; that must be done by platform logic such as ACPI _PR3.\n\nTo support wakeup from D3cold, a system may provide auxiliary power, which\nallows a device to request wakeup using a Beacon or the sideband WAKE#\nsignal. WAKE# is usually connected to platform logic such as ACPI GPE.\nThis is quite different from other power saving states, where devices\nrequest wakeup via a PME message on the PCIe link.\n\nSome devices, such as those in plug-in slots, have no direct platform\nlogic. For example, there is usually no ACPI _PR3 for them. D3cold\nsupport for these devices can be done via the PCIe Downstream Port leading\nto the device. When the PCIe port is powered on/off, the device is powered\non/off too. Wakeup events from the device will be notified to the\ncorresponding PCIe port.\n\nFor more information about PCIe D3cold and corresponding ACPI support,\nplease refer to:\n\n- PCI Express Base Specification Revision 2.0\n- Advanced Configuration and Power Interface Specification Revision 5.0\n\n[bhelgaas: changelog]\nReviewed-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nOriginally-by: Zheng Yan \u003czheng.z.yan@intel.com\u003e\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "140217ae3fbabc7b718b5595fd251ce2afcb3bc1", "tree": "1c3d1a367c04203a88b4677376cbd6c8e08d1c65", "parents": [ "e822a007047fb84cd068bfa35a682015e0fe19b9", "0bdb3b213ac64f9a16e59d57660174543eaa01f0" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jun 18 12:14:16 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jun 18 12:14:16 2012 -0600" }, "message": "Merge branch \u0027topic/jan-intx-masking\u0027 into next\n\n* topic/jan-intx-masking:\n PCI: add Ralink RT2800 broken INTx masking quirk\n PCI: add Chelsio T310 10GbE NIC broken INTx masking quirk\n PCI: add infrastructure for devices with broken INTx masking\n" }, { "commit": "47fcb6da65e9e74f71f4ec68f1245fc600bec711", "tree": "6ef869c8f5768d8804ace7c36bbd6d493f995ad1", "parents": [ "cc2fa3fa320d5f40a12713c104bbe5d3da4636e4", "9cb604ed45a31419bab3877472691a5da15a3c47" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jun 18 12:10:39 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jun 18 12:10:39 2012 -0600" }, "message": "Merge branch \u0027topic/stowe-cap-cleanup\u0027 into next\n\n* topic/stowe-cap-cleanup:\n PCI: remove redundant capabilities checking in pci_{save, restore}_pcie_state\n PCI: add pci_pcie_cap2() check for PCIe feature capabilities \u003e\u003d v2\n PCI: remove redundant checking in PCI Express capability routines\n PCI: make pci_ltr_supported() static\n" }, { "commit": "fbebb9fd22581b6422d60669c4ff86ce99d6cdba", "tree": "f7063ec22814ee7782d1ccdb6f8653404d6714c8", "parents": [ "cfaf025112d3856637ff34a767ef785ef5cf2ca9" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Jun 16 14:40:22 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Sat Jun 16 14:40:22 2012 -0600" }, "message": "PCI: add infrastructure for devices with broken INTx masking\n\npci_intx_mask_supported() assumes INTx masking is supported if the\nPCI_COMMAND_INTX_DISABLE bit is writable. But when that bit is set,\nsome devices don\u0027t actually mask INTx or update PCI_STATUS_INTERRUPT\nas we expect.\n\nThis patch adds a way for quirks to identify these broken devices.\n\n[bhelgaas: split out from Chelsio quirk addition]\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "cc2fa3fa320d5f40a12713c104bbe5d3da4636e4", "tree": "342445a784c566116505ab8c9e7a24803a6e70c4", "parents": [ "10c480933d0ad2ea27630cbaa723a5d33dbece00", "a0dee2ed0cdc666b5622f1fc74979355a6b36850" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 17:04:54 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 17:04:54 2012 -0600" }, "message": "Merge branch \u0027topic/alex-vfio-prep\u0027 into next\n\n* topic/alex-vfio-prep:\n PCI: misc pci_reg additions\n PCI: create common pcibios_err_to_errno\n PCI: export pci_user functions for use by other drivers\n PCI: add ACS validation utility\n PCI: add PCI DMA source ID quirk\n" }, { "commit": "10c480933d0ad2ea27630cbaa723a5d33dbece00", "tree": "6938c675ca99e1204d701b4fb60af89d381beeff", "parents": [ "a187177ae047e005a7b40229555837a529a9c2cc", "505cf30b7f4ef64c6db36f34adbe4a7ad9081fd3" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 17:04:51 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 17:04:51 2012 -0600" }, "message": "Merge branch \u0027topic/bjorn-remove-unused\u0027 into next\n\n* topic/bjorn-remove-unused:\n PCI/AER: use pci_is_pcie() instead of obsolete pci_dev.is_pcie\n PCI: remove pci_max_busnr() (was already commented out)\n PCI: remove pci_bus_find_ext_capability() (unused)\n" }, { "commit": "67cdc827286366acb6c60c821013c1185ee00b36", "tree": "4d485a56df676726a40f4b9913a9f5362f2c1f2a", "parents": [ "4d99f524234c2e772eea68ad019ec9c805991f23" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu May 17 18:51:12 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 15:42:23 2012 -0600" }, "message": "PCI: add default busn_resource\n\nWe need to put into the resources list for legacy system.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "98a3583107ed587ed3cfe2a1d8e5347421de5a80", "tree": "402af5b2aee4af6f6ffaefb0f856b33f70e4a9b5", "parents": [ "82ec90eac304e81b1389175b4dded7abecc678ef" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri May 18 11:35:50 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 15:42:22 2012 -0600" }, "message": "PCI: add busn_res operation functions\n\nWill use them insert/update busn res in pci_bus struct.\n\n[bhelgaas: print conflicting entry if insertion fails]\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "3527ed81ca01bbaf09df952e68528377a9cd092f", "tree": "1d1665facc89962f6b5454bedec3b296c05b344d", "parents": [ "b918c62e086b2130a7bae44110ca516ef10bfe5a" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu May 17 18:51:11 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 15:42:22 2012 -0600" }, "message": "PCI: remove secondary/subordinate in struct pci_bus\n\nThe pci_bus secondary/subordinate members are now unused, so remove them.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "92f02430934ca1c1e991a1ab3541880575042697", "tree": "03cf0dd66d4d9108f7ea54ebaf10eb2810b0c6b0", "parents": [ "cfaf025112d3856637ff34a767ef785ef5cf2ca9" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu May 17 18:51:11 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Wed Jun 13 15:42:21 2012 -0600" }, "message": "PCI: add busn_res in struct pci_bus\n\nThis adds a busn_res resource in struct pci_bus. This will replace the\nsecondary/subordinate members and will be used to build a bus number\nresource tree to help with bus number allocation.\n\n[bhelgaas: changelog]\nCC: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "a6961651408afa9387d6df43c4a1dc4fd35dcb1b", "tree": "3ee93b9316123567ebfc65804cb8cc1be95be1e2", "parents": [ "c63587d7f5b9db84e71daf5962dc0394eb657da2" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Mon Jun 11 05:27:33 2012 +0000" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Jun 12 09:21:42 2012 -0600" }, "message": "PCI: create common pcibios_err_to_errno\n\nFor returning errors out to non-PCI code. Re-name xen\u0027s version.\n\nAcked-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "c63587d7f5b9db84e71daf5962dc0394eb657da2", "tree": "215aace1e4365938c497e2329b5c48614e01188d", "parents": [ "ad805758c0eb25bce7b2e3b298d63dc62a1bc71c" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Mon Jun 11 05:27:19 2012 +0000" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Jun 12 09:21:42 2012 -0600" }, "message": "PCI: export pci_user functions for use by other drivers\n\nVFIO PCI support will make use of these for user-initiated\nPCI config accesses.\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "ad805758c0eb25bce7b2e3b298d63dc62a1bc71c", "tree": "031c42d1537e9ee25b7392a652a7799c3914c972", "parents": [ "12ea6cad1c7d046e21decc18b0e2170c6794dc51" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Mon Jun 11 05:27:07 2012 +0000" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Tue Jun 12 09:21:42 2012 -0600" }, "message": "PCI: add ACS validation utility\n\nIn a PCI environment, transactions aren\u0027t always required to reach\nthe root bus before being re-routed. Intermediate switches between\nan endpoint and the root bus can redirect DMA back downstream before\nthings like IOMMUs have a chance to intervene. Legacy PCI is always\nsusceptible to this as it operates on a shared bus. PCIe added a\nnew capability to describe and control this behavior, Access Control\nServices, or ACS.\n\nThe utility function pci_acs_enabled() allows us to test the ACS\ncapabilities of an individual devices against a set of flags while\npci_acs_path_enabled() tests a complete path from a given downstream\ndevice up to the specified upstream device. We also include the\nability to add device specific tests as it\u0027s likely we\u0027ll see\ndevices that do not implement ACS, but want to indicate support\nfor various capabilities in this space.\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "c32823f82b42abc1f08b365085862fd1d57c0b61", "tree": "16b70021da6ad1fbf60cede873ed3a4b96525577", "parents": [ "cfaf025112d3856637ff34a767ef785ef5cf2ca9" ], "author": { "name": "Myron Stowe", "email": "myron.stowe@redhat.com", "time": "Fri Jun 01 15:16:25 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jun 11 19:33:03 2012 -0600" }, "message": "PCI: make pci_ltr_supported() static\n\nThe PCI Express Latency Tolerance Reporting (LTR) feature\u0027s\npci_ltr_supported() routine is currently only used within\ndrivers/pci/pci.c so make it static.\n\nAcked-by: Donald Dutile \u003cddutile@redhat.com\u003e\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "12ea6cad1c7d046e21decc18b0e2170c6794dc51", "tree": "d72a1034cd7436c4b705e86f3cfc83dad03b3574", "parents": [ "cfaf025112d3856637ff34a767ef785ef5cf2ca9" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Mon Jun 11 05:26:55 2012 +0000" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jun 11 18:37:43 2012 -0600" }, "message": "PCI: add PCI DMA source ID quirk\n\nDMA transactions are tagged with the source ID of the device making\nthe request. Occasionally hardware screws this up and uses the\nsource ID of a different device (often the wrong function number of\na multifunction device). A specific Ricoh multifunction device is\na prime example of this problem and included in this patch.\n\nGiven a pci_dev, this function returns the pci_dev to use as the\nsource ID for DMA. When hardware works correctly, this returns\nthe input device. For the components of the Ricoh multifunction\ndevice, it returns the pci_dev for function 0.\n\nThis will be used by IOMMU drivers for determining the boundaries\nof IOMMU groups as multiple devices using the same source ID must\nbe contained within the same group. This can also be used by\nexisting streaming DMA paths for the same purpose.\n\n[bhelgaas: fold in pci_dev_get() for !CONFIG_PCI]\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "109cdbc223f6e2d6c80f8371f22415b50c18a366", "tree": "e27b74808a648a1f98b07a0d93fee9e17e5c5471", "parents": [ "cfaf025112d3856637ff34a767ef785ef5cf2ca9" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri May 18 16:52:19 2012 -0600" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Jun 11 11:23:23 2012 -0600" }, "message": "PCI: remove pci_bus_find_ext_capability() (unused)\n\npci_bus_find_ext_capability() is unused, and this patch removes it.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "7e5b2db77b05746613516599c916a8cc2e321077", "tree": "c3ec333ff7b77bcc8e456a3a3d19bf20f5c651b8", "parents": [ "227d1e4319ffd8729781941d92f4ae4d85beecd9", "c819baf31f5f91fbb06b2c93de2d5b8c8d096f3f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 29 18:27:19 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 29 18:27:19 2012 -0700" }, "message": "Merge branch \u0027upstream\u0027 of git://git.linux-mips.org/pub/scm/ralf/upstream-linus\n\nPull MIPS updates from Ralf Baechle:\n \"The whole series has been sitting in -next for quite a while with no\n complaints. The last change to the series was before the weekend the\n removal of an SPI patch which Grant - even though previously acked by\n himself - appeared to raise objections. So I removed it until the\n situation is clarified. Other than that all the patches have the acks\n from their respective maintainers, all MIPS and x86 defconfigs are\n building fine and I\u0027m not aware of any problems introduced by this\n series.\n\n Among the key features for this patch series is a sizable patchset for\n Lantiq which among other things introduces support for Lantiq\u0027s\n flagship product, the FALCON SOC. It also means that the opensource\n developers behind this patchset have overtaken Lantiq\u0027s competing\n inhouse development team that was working behind closed doors.\n\n Less noteworthy the ath79 patchset which adds support for a few more\n chip variants, cleanups and fixes. Finally the usual dose of tweaking\n of generic code.\"\n\nFix up trivial conflicts in arch/mips/lantiq/xway/gpio_{ebu,stp}.c where\nprintk spelling fixes clashed with file move and eventual removal of the\nprintk.\n\n* \u0027upstream\u0027 of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (81 commits)\n MIPS: lantiq: remove orphaned code\n MIPS: Remove all -Wall and almost all -Werror usage from arch/mips.\n MIPS: lantiq: implement support for FALCON soc\n MTD: MIPS: lantiq: verify that the NOR interface is available on falcon soc\n MTD: MIPS: lantiq: implement OF support\n watchdog: MIPS: lantiq: implement OF support and minor fixes\n SERIAL: MIPS: lantiq: implement OF support\n GPIO: MIPS: lantiq: convert gpio-stp-xway to OF\n GPIO: MIPS: lantiq: convert gpio-mm-lantiq to OF and of_mm_gpio\n GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder\n MIPS: pci: convert lantiq driver to OF\n MIPS: lantiq: convert dma to platform driver\n MIPS: lantiq: implement support for clkdev api\n MIPS: lantiq: drop ltq_gpio_request() and gpio_to_irq()\n OF: MIPS: lantiq: implement irq_domain support\n OF: MIPS: lantiq: implement OF support\n MIPS: lantiq: drop mips_machine support\n OF: PCI: const usage needed by MIPS\n MIPS: Cavium: Remove smp_reserve_lock.\n MIPS: Move cache setup to setup_arch().\n ...\n" }, { "commit": "3df425f316fb5c5e90236ff22b6e6616b3516af0", "tree": "317262c260132ed136c57a28662f0b8cbd4c4075", "parents": [ "6697c6933048aabe94f0049070f7ec09cd52baa8" ], "author": { "name": "John Crispin", "email": "blogic@openwrt.org", "time": "Thu Apr 12 17:33:07 2012 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon May 21 14:31:48 2012 +0100" }, "message": "OF: PCI: const usage needed by MIPS\n\nOn MIPS we want to call of_irq_map_pci from inside\n\narch/mips/include/asm/pci.h:extern int pcibios_map_irq(\n\t\t\t\tconst struct pci_dev *dev, u8 slot, u8 pin);\nFor this to work we need to change several functions to const usage.\n\nSigned-off-by: John Crispin \u003cblogic@openwrt.org\u003e\nCc: linux-pci@vger.kernel.org\nCc: devicetree-discuss@lists.ozlabs.org\nCc: linux-mips@linux-mips.org\nAcked-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nAcked-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/3710/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4fa2649a01a4357a82dcc60ef8fb7b8c441e64ed", "tree": "dfe8dd728396fd3034f20de91bb610422a9bc4e6", "parents": [ "7b54366358008241f88228f02cc80ab352265eac" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Mon Apr 02 18:31:53 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Apr 30 14:52:43 2012 -0600" }, "message": "PCI: add host bridge release support\n\nWe need a hook to release host bridge resources allocated when creating\nroot bus.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "7b54366358008241f88228f02cc80ab352265eac", "tree": "4de6ae8ce83afabf1b4405cba6895b09d1bc790d", "parents": [ "459f58ce51e2e11235b7bb4b1732ebf3c17d86f7" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Mon Apr 02 18:31:53 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Mon Apr 30 13:53:42 2012 -0600" }, "message": "PCI: add generic device into pci_host_bridge struct\n\nUse that device for pci_root_bus bridge pointer.\n\nUse pci_release_bus_bridge_dev() to release allocated pci_host_bridge in\nremove path.\n\nUse root bus bridge pointer to get host bridge pointer instead of searching\nhost bridge list. That leaves the host bridge list unused, so remove it.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e" }, { "commit": "475c77edf826333aa61625f49d6a2bec26ecb5a6", "tree": "8e1c6c319e347cd3c649fdb0b3ab45971c6b19e7", "parents": [ "934e18b5cb4531cc6e81865bf54115cfd21d1ac6", "1488d5158dcd612fcdaf6b642451b026ee8bbcbb" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 23 14:02:12 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 23 14:02:12 2012 -0700" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci\n\nPull PCI changes (including maintainer change) from Jesse Barnes:\n \"This pull has some good cleanups from Bjorn and Yinghai, as well as\n some more code from Yinghai to better handle resource re-allocation\n when enabled.\n\n There\u0027s also a new initcall_debug feature from Arjan which will print\n out quirk timing information to help identify slow quirks for fixing\n or refinement (Yinghai sent in a few patches to do just that once the\n new debug code landed).\n\n Beyond that, I\u0027m handing off PCI maintainership to Bjorn Helgaas.\n He\u0027s been a core PCI and Linux contributor for some time now, and has\n kindly volunteered to take over. I just don\u0027t feel I have the time\n for PCI review and work that it deserves lately (I\u0027ve taken on some\n other projects), and haven\u0027t been as responsive lately as I\u0027d like, so\n I approached Bjorn asking if he\u0027d like to manage things. He\u0027s going\n to give it a try, and I\u0027m confident he\u0027ll do at least as well as I\n have in keeping the tree managed, patches flowing, and keeping things\n stable.\"\n\nFix up some fairly trivial conflicts due to other cleanups (mips device\nresource fixup cleanups clashing with list handling cleanup, ppc iseries\nremoval clashing with pci_probe_only cleanup etc)\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (112 commits)\n PCI: Bjorn gets PCI hotplug too\n PCI: hand PCI maintenance over to Bjorn Helgaas\n unicore32/PCI: move \u003casm-generic/pci-bridge.h\u003e include to asm/pci.h\n sparc/PCI: convert devtree and arch-probed bus addresses to resource\n powerpc/PCI: allow reallocation on PA Semi\n powerpc/PCI: convert devtree bus addresses to resource\n powerpc/PCI: compute I/O space bus-to-resource offset consistently\n arm/PCI: don\u0027t export pci_flags\n PCI: fix bridge I/O window bus-to-resource conversion\n x86/PCI: add spinlock held check to \u0027pcibios_fwaddrmap_lookup()\u0027\n PCI / PCIe: Introduce command line option to disable ARI\n PCI: make acpihp use __pci_remove_bus_device instead\n PCI: export __pci_remove_bus_device\n PCI: Rename pci_remove_behind_bridge to pci_stop_and_remove_behind_bridge\n PCI: Rename pci_remove_bus_device to pci_stop_and_remove_bus_device\n PCI: print out PCI device info along with duration\n PCI: Move \"pci reassigndev resource alignment\" out of quirks.c\n PCI: Use class for quirk for usb host controller fixup\n PCI: Use class for quirk for ti816x class fixup\n PCI: Use class for quirk for intel e100 interrupt fixup\n ...\n" }, { "commit": "d4c6fa73fe984e504d52f3d6bba291fd76fe49f7", "tree": "47842ddebb2a48cc1513b36fba18835678e2b94e", "parents": [ "aab008db8063364dc3c8ccf4981c21124866b395", "4bc25af79ec54b79266148f8c1b84bb1e7ff2621" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 22 19:59:19 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 22 20:16:14 2012 -0700" }, "message": "Merge tag \u0027stable/for-linus-3.4-tag\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen\n\nPull xen updates from Konrad Rzeszutek Wilk:\n \"which has three neat features:\n\n - PV multiconsole support, so that there can be hvc1, hvc2, etc; This\n can be used in HVM and in PV mode.\n\n - P-state and C-state power management driver that uploads said power\n management data to the hypervisor. It also inhibits cpufreq\n scaling drivers to load so that only the hypervisor can make power\n management decisions - fixing a weird perf bug.\n\n There is one thing in the Kconfig that you won\u0027t like: \"default y\n if (X86_ACPI_CPUFREQ \u003d y || X86_POWERNOW_K8 \u003d y)\" (note, that it\n all depends on CONFIG_XEN which depends on CONFIG_PARAVIRT which by\n default is off). I\u0027ve a fix to convert that boolean expression\n into \"default m\" which I am going to post after the cpufreq git\n pull - as the two patches to make this work depend on a fix in Dave\n Jones\u0027s tree.\n\n - Function Level Reset (FLR) support in the Xen PCI backend.\n\n Fixes:\n\n - Kconfig dependencies for Xen PV keyboard and video\n - Compile warnings and constify fixes\n - Change over to use percpu_xxx instead of this_cpu_xxx\"\n\nFix up trivial conflicts in drivers/tty/hvc/hvc_xen.c due to changes to\na removed commit.\n\n* tag \u0027stable/for-linus-3.4-tag\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:\n xen kconfig: relax INPUT_XEN_KBDDEV_FRONTEND deps\n xen/acpi-processor: C and P-state driver that uploads said data to hypervisor.\n xen: constify all instances of \"struct attribute_group\"\n xen/xenbus: ignore console/0\n hvc_xen: introduce HVC_XEN_FRONTEND\n hvc_xen: implement multiconsole support\n hvc_xen: support PV on HVM consoles\n xenbus: don\u0027t free other end details too early\n xen/enlighten: Expose MWAIT and MWAIT_LEAF if hypervisor OKs it.\n xen/setup/pm/acpi: Remove the call to boot_option_idle_override.\n xenbus: address compiler warnings\n xen: use this_cpu_xxx replace percpu_xxx funcs\n xen/pciback: Support pci_reset_function, aka FLR or D3 support.\n pci: Introduce __pci_reset_function_locked to be used when holding device_lock.\n xen: Utilize the restore_msi_irqs hook.\n" }, { "commit": "5375871d432ae9fc581014ac117b96aaee3cd0c7", "tree": "be98e8255b0f927fb920fb532a598b93fa140dbe", "parents": [ "b57cb7231b2ce52d3dda14a7b417ae125fb2eb97", "dfbc2d75c1bd47c3186fa91f1655ea2f3825b0ec" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 21 18:55:10 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 21 18:55:10 2012 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\nPull powerpc merge from Benjamin Herrenschmidt:\n \"Here\u0027s the powerpc batch for this merge window. It is going to be a\n bit more nasty than usual as in touching things outside of\n arch/powerpc mostly due to the big iSeriesectomy :-) We finally got\n rid of the bugger (legacy iSeries support) which was a PITA to\n maintain and that nobody really used anymore.\n\n Here are some of the highlights:\n\n - Legacy iSeries is gone. Thanks Stephen ! There\u0027s still some bits\n and pieces remaining if you do a grep -ir series arch/powerpc but\n they are harmless and will be removed in the next few weeks\n hopefully.\n\n - The \u0027fadump\u0027 functionality (Firmware Assisted Dump) replaces the\n previous (equivalent) \"pHyp assisted dump\"... it\u0027s a rewrite of a\n mechanism to get the hypervisor to do crash dumps on pSeries, the\n new implementation hopefully being much more reliable. Thanks\n Mahesh Salgaonkar.\n\n - The \"EEH\" code (pSeries PCI error handling \u0026 recovery) got a big\n spring cleaning, motivated by the need to be able to implement a\n new backend for it on top of some new different type of firwmare.\n\n The work isn\u0027t complete yet, but a good chunk of the cleanups is\n there. Note that this adds a field to struct device_node which is\n not very nice and which Grant objects to. I will have a patch soon\n that moves that to a powerpc private data structure (hopefully\n before rc1) and we\u0027ll improve things further later on (hopefully\n getting rid of the need for that pointer completely). Thanks Gavin\n Shan.\n\n - I dug into our exception \u0026 interrupt handling code to improve the\n way we do lazy interrupt handling (and make it work properly with\n \"edge\" triggered interrupt sources), and while at it found \u0026 fixed\n a wagon of issues in those areas, including adding support for page\n fault retry \u0026 fatal signals on page faults.\n\n - Your usual random batch of small fixes \u0026 updates, including a bunch\n of new embedded boards, both Freescale and APM based ones, etc...\"\n\nI fixed up some conflicts with the generalized irq-domain changes from\nGrant Likely, hopefully correctly.\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (141 commits)\n powerpc/ps3: Do not adjust the wrapper load address\n powerpc: Remove the rest of the legacy iSeries include files\n powerpc: Remove the remaining CONFIG_PPC_ISERIES pieces\n init: Remove CONFIG_PPC_ISERIES\n powerpc: Remove FW_FEATURE ISERIES from arch code\n tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable\n powerpc/spufs: Fix double unlocks\n powerpc/5200: convert mpc5200 to use of_platform_populate()\n powerpc/mpc5200: add options to mpc5200_defconfig\n powerpc/mpc52xx: add a4m072 board support\n powerpc/mpc5200: update mpc5200_defconfig to fit for charon board\n Documentation/powerpc/mpc52xx.txt: Checkpatch cleanup\n powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board\n powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board\n MAINTAINERS: Update PowerPC 4xx tree\n powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board\n powerpc: document the FSL MPIC message register binding\n powerpc: add support for MPIC message register API\n powerpc/fsl: Added aliased MSIIR register address to MSI node in dts\n powerpc/85xx: mpc8548cds - add 36-bit dts\n ...\n" }, { "commit": "69a7aebcf019ab3ff5764525ad6858fbe23bb86d", "tree": "7211df5704b743a7667159748c670a9744164482", "parents": [ "d464c92b5234227c1698862a1906827e2e398ae0", "f1f996b66cc3908a8f5ffccc2ff41840e92f3b10" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 20 21:12:50 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 20 21:12:50 2012 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\nPull trivial tree from Jiri Kosina:\n \"It\u0027s indeed trivial -- mostly documentation updates and a bunch of\n typo fixes from Masanari.\n\n There are also several linux/version.h include removals from Jesper.\"\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (101 commits)\n kcore: fix spelling in read_kcore() comment\n constify struct pci_dev * in obvious cases\n Revert \"char: Fix typo in viotape.c\"\n init: fix wording error in mm_init comment\n usb: gadget: Kconfig: fix typo for \u0027different\u0027\n Revert \"power, max8998: Include linux/module.h just once in drivers/power/max8998_charger.c\"\n writeback: fix fn name in writeback_inodes_sb_nr_if_idle() comment header\n writeback: fix typo in the writeback_control comment\n Documentation: Fix multiple typo in Documentation\n tpm_tis: fix tis_lock with respect to RCU\n Revert \"media: Fix typo in mixer_drv.c and hdmi_drv.c\"\n Doc: Update numastat.txt\n qla4xxx: Add missing spaces to error messages\n compiler.h: Fix typo\n security: struct security_operations kerneldoc fix\n Documentation: broken URL in libata.tmpl\n Documentation: broken URL in filesystems.tmpl\n mtd: simplify return logic in do_map_probe()\n mm: fix comment typo of truncate_inode_pages_range\n power: bq27x00: Fix typos in comment\n ...\n" }, { "commit": "bf362f750bea1372aff3b5c405b50560a1b28981", "tree": "abd00c8eede4e3b32f5e1ef0f14f2668fcd02a2a", "parents": [ "adfe39cd9195c35811e062578c4107db49d75436" ], "author": { "name": "Al Viro", "email": "viro@ZenIV.linux.org.uk", "time": "Mon Mar 19 00:01:09 2012 +0000" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Tue Mar 20 00:20:37 2012 +0100" }, "message": "constify struct pci_dev * in obvious cases\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "eb740b5f3e6559a8f1c22e2505914d07f9632881", "tree": "6e463d4ba852359d82b33a61040e240430280fa6", "parents": [ "def9d83da4f8587dbad5ea57c57d91e53a51006a" ], "author": { "name": "Gavin Shan", "email": "shangw@linux.vnet.ibm.com", "time": "Mon Feb 27 20:04:04 2012 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Mar 09 11:39:29 2012 +1100" }, "message": "powerpc/eeh: Introduce EEH device\n\nOriginal EEH implementation depends on struct pci_dn heavily. However,\nEEH shouldn\u0027t depend on that actually because EEH needn\u0027t share much\ninformation with other PCI components. That\u0027s to say, EEH should have\nworked independently.\n\nThe patch introduces struct eeh_dev so that EEH core components needn\u0027t\nbe working based on struct pci_dn in future. Also, struct pci_dn, struct\neeh_dev instances are created in dynamic fasion and the binding with EEH\ndevice, OF node, PCI device is implemented as well.\n\nThe EEH devices are created after PHBs are detected and initialized, but\nPCI emunation hasn\u0027t started yet. Apart from that, PHB might be created\ndynamically through DLPAR component and the EEH devices should be creatd\nas well. Another case might be OF node is created dynamically by DR\n(Dynamic Reconfiguration), which has been defined by PAPR. For those OF\nnodes created by DR, EEH devices should be also created accordingly. The\nbinding between EEH device and OF node is done while the EEH device is\ninitially created.\n\nThe binding between EEH device and PCI device should be done after PCI\nemunation is done. Besides, PCI hotplug also needs the binding so that\nthe EEH devices could be traced from the newly coming PCI buses or PCI\ndevices.\n\nSigned-off-by: Gavin Shan \u003cshangw@linux.vnet.ibm.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "6b22cf3f35fd332e4cc2c1b27056920b3643667a", "tree": "81bdab1c27126f91340fcafb4619519dda003490", "parents": [ "6754b9e9c33502223db066de50dda8a876f70c2c" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Feb 25 13:54:21 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 27 12:16:55 2012 -0800" }, "message": "PCI: export __pci_remove_bus_device\n\nDon\u0027t switch to pci_remove_bus_device yet, keep the __ prefix for now\n(the behavior is still the same: remove without stopping first).\n\nThis allows other out of tree users or pending patches to get notified\nfrom compiler warning.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6754b9e9c33502223db066de50dda8a876f70c2c", "tree": "ee7b1a9328bd01675f907c9d247ee9b2f4bad21f", "parents": [ "210647af897af8ef2d00828aa2a6b1b42206aae6" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Feb 25 13:54:22 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 27 12:14:55 2012 -0800" }, "message": "PCI: Rename pci_remove_behind_bridge to pci_stop_and_remove_behind_bridge\n\nThe old pci_remove_behind_bridge actually do stop and remove.\n\nMake the name reflect that to reduce confusion.\n\nSuggested-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "210647af897af8ef2d00828aa2a6b1b42206aae6", "tree": "bdb048c8fc7db6fb7b84134c1a6127c52da60ed3", "parents": [ "3cf8b64380af6fd515740b010606ada4637818c5" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Feb 25 13:54:20 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 27 12:12:18 2012 -0800" }, "message": "PCI: Rename pci_remove_bus_device to pci_stop_and_remove_bus_device\n\nThe old pci_remove_bus_device actually did stop and remove.\n\nMake the name reflect that to reduce confusion.\n\nThis patch is done by sed scripts and changes back some incorrect\n__pci_remove_bus_device changes.\n\nSuggested-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "f4ca5c6a56278ca5421bc2e40422e4155b6735d8", "tree": "53be4f61e4da75deae8cbcd4948d6d3b47404d79", "parents": [ "ecd58d667a6ac4350d2f67b9accaadf575bae4b0" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Feb 23 23:46:49 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Feb 24 14:34:40 2012 -0800" }, "message": "PCI: Add class support in quirk handling\n\nRecently added support to allow quirks to report duration also make the\nboot log very crowded when initcall_debug is specified.\n\nOne thing we can to do mitigate this is to not call quirks unnecessarily\nby adding a new quirk declaration macro that takes a class argument.\n\nThe new macro takes a class value and a class shift value (since it can\nvary) so that quirks will be limited to certain device classes, greatly\nreducing the number we call on every PCI device addition.\n\n-v2: fix v1 that left over of sparated patch.\n-v3: according to Jesse, change cls to class, cls_shift, to class_shift.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "36a66cd6fd0a70ac6848d740d9cf7a4360b5776a", "tree": "7cc903ad9f63e9bd1065b6d722fb86f4196dceea", "parents": [ "5bfa14ed9f3ca21fcecbcfbf4a848c002b740c41" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:19:00 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:19:00 2012 -0700" }, "message": "PCI: add generic pcibios_resource_to_bus()\n\nThis replaces the generic versions of pcibios_resource_to_bus() and\npcibios_bus_to_resource() in asm-generic/pci.h with versions that use\npci_resource_to_bus() and pci_bus_to_resource().\n\nThe replacements are equivalent except that they can apply host\nbridge window offsets when the arch has supplied them by using\npci_add_resource_offset().\n\nEach arch can convert to using pci_add_resource_offset() individually by\nremoving its device resource fixups from pcibios_fixup_bus() and supplying\nARCH_HAS_GENERIC_PCI_OFFSETS. ARCH_HAS_GENERIC_PCI_OFFSETS can be removed\nafter all have converted.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "0efd5aab41e18a1175f72641696cfda154ba6c87", "tree": "2480b5ade8937d18104c5ecc1423ca1eac1b154e", "parents": [ "5a21d70dbd33d20713fb735ad9381711b0ae2c9b" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:19:00 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:19:00 2012 -0700" }, "message": "PCI: add struct pci_host_bridge_window with CPU/bus address offset\n\nSome PCI host bridges apply an address offset, so bus addresses on PCI are\ndifferent from CPU addresses. This patch adds a way for architectures to\ntell the PCI core about this offset. For example:\n\n LIST_HEAD(resources);\n pci_add_resource_offset(\u0026resources, host-\u003eio_space, host-\u003eio_offset);\n pci_add_resource_offset(\u0026resources, host-\u003emem_space, host-\u003emem_offset);\n pci_scan_root_bus(parent, bus, ops, sysdata, \u0026resources);\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "5a21d70dbd33d20713fb735ad9381711b0ae2c9b", "tree": "f3c6c65295f1356f62389fafad777d7be047aca5", "parents": [ "a5390aa6dc3646b08bed421944cef0daf78ab994" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:18:59 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:18:59 2012 -0700" }, "message": "PCI: add struct pci_host_bridge and a list of all bridges found\n\nThis adds a list of all PCI host bridges we find and a way to look up\nthe host bridge from a pci_dev.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "34a4876e3071ddebf3c98c99ba01c14b059a1361", "tree": "e1450472300e41f407c5cfec49b157450d8d85d8", "parents": [ "f796841e49fe086176e27ed0e1f3f7a1123a4a6b" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Feb 11 00:18:41 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Feb 23 12:27:11 2012 -0800" }, "message": "PCI: move pci_find_saved_cap out of linux/pci.h\n\nOnly one user in driver/pci/pci.c, so we don\u0027t need to put it in global\npci.h\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "78c3b329b9dd7097781cb900146e503e499cccfe", "tree": "0e7648baae8ac6f17b34108f5793aa1e3d4f23f8", "parents": [ "19aa7ee432cec00b647443719eb5c055b69a5e8e" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:25 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:54 2012 -0800" }, "message": "PCI: Move pdev_sort_resources() to setup-bus.c\n\nThis allows us to move the definition of struct resource_list to\nsetup_bus.c and later convert resource_list to a regular list.\n\nSuggested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2f320521a0d2d11fb857be09d05e2fbbf3ef8c13", "tree": "9b8d91f3d64f383405511c33fd4d9c5d4aaa20c2", "parents": [ "8424d7592eab8245b51051ee458e598213bca3b2" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Jan 21 02:08:22 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:53 2012 -0800" }, "message": "PCI: Make rescan bus increase bridge resource size if needed\n\nCurrent rescan will not touch bridge MMIO and IO.\n\nTry to reuse pci_assign_unassigned_bridge_resources(bridge) to update bridge\nresources, if child devices need more resources.\n\nOnly do that for bridges whose children are all removed already; i.e. don\u0027t\nrelease resources that could already be in use by drivers on child devices.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6fbf9e7a90862988c278462d85ce9684605a52b2", "tree": "ccc79061bac41537c37f5edc73bdc5bc59005c8a", "parents": [ "8f0cdddcd3f270901765fc909c3aee37a2091e78" ], "author": { "name": "Konrad Rzeszutek Wilk", "email": "konrad.wilk@oracle.com", "time": "Thu Jan 12 12:06:46 2012 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:48 2012 -0800" }, "message": "PCI: Introduce __pci_reset_function_locked to be used when holding device_lock.\n\nThe use case of this is when a driver wants to call FLR when a device\nis attached to it using the SysFS \"bind\" or \"unbind\" functionality.\n\nThe call chain when a user does \"bind\" looks as so:\n\n echo \"0000:01.07.0\" \u003e /sys/bus/pci/drivers/XXXX/bind\n\nand ends up calling:\n driver_bind:\n device_lock(dev); \u003c\u003d\u003d\u003d TAKES LOCK\n XXXX_probe:\n .. pci_enable_device()\n ...__pci_reset_function(), which calls\n pci_dev_reset(dev, 0):\n if (!0) {\n device_lock(dev) \u003c\u003d\u003d\u003d\u003d DEADLOCK\n\nThe __pci_reset_function_locked function allows the the drivers\n\u0027probe\u0027 function to call the \"pci_reset_function\" while still holding\nthe driver mutex lock.\n\nSigned-off-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6535943fbf25c8e9419a6b20ca992633baa0bf99", "tree": "ad7eab22b1a193b37a47b804f49451bd7405833d", "parents": [ "925845bd49c6de437dfab3bf8dc654ea3ae21d74" ], "author": { "name": "Myron Stowe", "email": "mstowe@redhat.com", "time": "Mon Nov 21 11:54:19 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:46 2012 -0800" }, "message": "x86/PCI: Convert maintaining FW-assigned BIOS BAR values to use a list\n\nThis patch converts the underlying maintenance aspects of FW-assigned\nBIOS BAR values from a statically allocated array within struct pci_dev\nto a list of temporary, stand alone, entries.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "925845bd49c6de437dfab3bf8dc654ea3ae21d74", "tree": "55d91a9f5335e50571fefa64b10651c38316d314", "parents": [ "351fc6d1a5175d587d4f2b00ec7bff79b13ec48a" ], "author": { "name": "Myron Stowe", "email": "mstowe@redhat.com", "time": "Mon Nov 21 11:54:13 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 14 08:44:46 2012 -0800" }, "message": "x86/PCI: Infrastructure to maintain a list of FW-assigned BIOS BAR values\n\nCommit 58c84eda075 introduced functionality to try and reinstate the\noriginal BIOS BAR addresses of a PCI device when normal resource\nassignment attempts fail. To keep track of the BIOS BAR addresses,\nstruct pci_dev was augmented with an array to hold the BAR addresses\nof the PCI device: \u0027resource_size_t fw_addr[DEVICE_COUNT_RESOURCE]\u0027.\n\nThe reinstatement of BAR addresses is an uncommon event leaving the\n\u0027fw_addr\u0027 array unused under normal circumstances. This functionality\nis also currently architecture specific with an implementation limited\nto x86. As the use of struct pci_dev is so prevalent, having the\n\u0027fw_addr\u0027 array residing within such seems somewhat wasteful.\n\nThis patch introduces a stand alone data structure and interfacing\nroutines for maintaining a list of FW-assigned BIOS BAR value entries.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "aad4f4000cecec9c80b5f9aff91043dc104d61a0", "tree": "26fcb531c54106ccf6548a156c2bb42f667fec9f", "parents": [ "e250b34e57888ebe829a0b89cfa8ad303ad5ae74" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Nov 18 10:12:49 2011 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@linuxfoundation.org", "time": "Thu Feb 09 08:36:05 2012 -0800" }, "message": "PCI: Add helper macro for pci_register_driver boilerplate\n\nThis patch introduces the module_pci_driver macro which is a convenience\nmacro for PCI driver modules similar to module_platform_driver. It is\nintended to be used by drivers which init/exit section does nothing but\nregister/unregister the PCI driver. By using this macro it is possible\nto eliminate a few lines of boilerplate code per PCI driver.\n\nBased on work done by Lars-Peter Clausen \u003clars@metafoo.de\u003e for other\nbusses (i2c and spi).\n\nCc: Lars-Peter Clausen \u003clars@metafoo.de\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@linuxfoundation.org\u003e\n" }, { "commit": "a96d627abaac899e8bfaf18fd0578b228c9c752f", "tree": "0ea927e4a1acb8f5a11c29642b960309c732c3a9", "parents": [ "8605c6844fb9bdf55471bb87c3ac62d44eb34e04" ], "author": { "name": "Konrad Rzeszutek Wilk", "email": "konrad.wilk@oracle.com", "time": "Wed Jan 04 14:23:56 2012 -0500" }, "committer": { "name": "Konrad Rzeszutek Wilk", "email": "konrad.wilk@oracle.com", "time": "Thu Jan 12 12:00:07 2012 -0500" }, "message": "pci: Introduce __pci_reset_function_locked to be used when holding device_lock.\n\nThe use case of this is when a driver wants to call FLR when a device\nis attached to it using the SysFS \"bind\" or \"unbind\" functionality.\n\nThe call chain when a user does \"bind\" looks as so:\n\n echo \"0000:01.07.0\" \u003e /sys/bus/pci/drivers/XXXX/bind\n\nand ends up calling:\n driver_bind:\n device_lock(dev); \u003c\u003d\u003d\u003d TAKES LOCK\n XXXX_probe:\n .. pci_enable_device()\n ...__pci_reset_function(), which calls\n pci_dev_reset(dev, 0):\n if (!0) {\n device_lock(dev) \u003c\u003d\u003d\u003d\u003d DEADLOCK\n\nThe __pci_reset_function_locked function allows the the drivers\n\u0027probe\u0027 function to call the \"pci_reset_function\" while still holding\nthe driver mutex lock.\n\nSigned-off-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\n" }, { "commit": "fb7ebfe4108e2cdfa2bb88e57148087717463dfa", "tree": "e18690b45566b6c4df7598524bdbeb71fbd80ba1", "parents": [ "cda57bf9348fdbf4b8a830d6f9eb7da81df2f486" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Wed Jan 04 15:50:02 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:15:21 2012 -0800" }, "message": "PCI: Increase resource array mask bit size in pcim_iomap_regions()\n\nDEVICE_COUNT_RESOURCE will be bigger than 16 when SRIOV supported is enabled.\n\nLet them pass with int just like pci_enable_resources().\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "cda57bf9348fdbf4b8a830d6f9eb7da81df2f486", "tree": "428e754d5064cb4da55c6896a274f9c716d27af6", "parents": [ "aecab53f45b84fbc7d6848957f9d83e1c3548b17" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Wed Jan 04 15:49:45 2012 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:15:14 2012 -0800" }, "message": "PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES\n\nSave some bytes for device resource array.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "118faafaf987f521832843d36c6be580983f9a6b", "tree": "56e9146fa7b4777f29977989884f912a68432e9f", "parents": [ "7ec303a7247a46a7a88a4f890466fd12dbdd5dc6" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Oct 28 16:28:24 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:11:15 2012 -0800" }, "message": "PCI: remove pci_create_bus()\n\nAll users of pci_create_bus() have been converted to pci_create_root_bus(),\nso remove it.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "de4b2f76d69673cea08be952dcb4df2f4c81c6e3", "tree": "c4ad7b48299c2916117367641dfe1fa09325d8e1", "parents": [ "a2ebb827958a4ab3577443f89037f229683c644a" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Oct 28 16:25:55 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:53 2012 -0800" }, "message": "PCI: convert pci_scan_bus() to use pci_create_root_bus()\n\nI plan to deprecate pci_scan_bus_parented(), so use pci_create_root_bus()\ndirectly instead. pci_scan_bus() itself will be removed as soon as all\ncallers are gone, so this is just an interim step.\n\nv2: export pci_scan_bus\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a2ebb827958a4ab3577443f89037f229683c644a", "tree": "c1e44c472315f75c8ba9d147e3712db1e9017a1e", "parents": [ "166c6370754a0a92386e2ffb0eeb06e50ac8588d" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Oct 28 16:25:50 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:52 2012 -0800" }, "message": "PCI: add pci_scan_root_bus() that accepts resource list\n\n\"Early\" and \"header\" quirks often use incorrect bus resources because they\nsee the default resources assigned by pci_create_bus(), before the\narchitecture fixes them up (typically in pcibios_fixup_bus()). Regions\nreserved by these quirks end up with the wrong parents.\n\nHere\u0027s the standard path for scanning a PCI root bus:\n\n pci_scan_bus or pci_scan_bus_parented\n pci_create_bus \u003c-- A create with default resources\n pci_scan_child_bus\n pci_scan_slot\n pci_scan_single_device\n pci_scan_device\n pci_setup_device\n pci_fixup_device(early) \u003c-- B\n pci_device_add\n pci_fixup_device(header) \u003c-- C\n pcibios_fixup_bus \u003c-- D fill in correct resources\n\nEarly and header quirks at B and C use the default (incorrect) root bus\nresources rather than those filled in at D.\n\nThis patch adds a new pci_scan_root_bus() function that sets the bus\nresources correctly from a supplied list of resources.\n\nI intend to remove pci_scan_bus() and pci_scan_bus_parented() after\nfixing all callers.\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "166c6370754a0a92386e2ffb0eeb06e50ac8588d", "tree": "c9bbbf23a0508cd93d546ecbfdb9fcd423a1e461", "parents": [ "a9d9f5276cb3fa08351e8837ab9398bfd8e69a2e" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Oct 28 16:25:45 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:51 2012 -0800" }, "message": "PCI: add pci_create_root_bus() that accepts resource list\n\npci_create_bus() assigns ioport_resource and iomem_resource as the default\nbus resources, i.e., the entire address space. Architectures fix these\nlater, typically in pcibios_fixup_bus() or after pci_scan_bus_parented()\nreturns, but code that runs in the interim sees incorrect resource\ninformation.\n\nThis patch adds a new pci_create_root_bus() that sets the bus resources\ncorrectly from a supplied list of resources.\n\nI intend to remove pci_create_bus() after changing all callers.\n\nBased on original patch by Deng-Cheng Zhu.\n\nReference: http://www.spinics.net/lists/mips/msg41654.html\nReference: https://lkml.org/lkml/2011/8/26/88\nSigned-off-by: Deng-Cheng Zhu \u003cdczhu@mips.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "45ca9e9730c5acdb482dd95799fd8ac834481897", "tree": "b73836ea44c0b3537ededd0c86653edfcfabb5c3", "parents": [ "afd24ece5c76af87f6fc477f2747b83a764f161c" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Oct 28 16:25:35 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:50 2012 -0800" }, "message": "PCI: add helpers for building PCI bus resource lists\n\nWe\u0027d like to supply a list of resources when we create a new PCI bus,\ne.g., the root bus under a PCI host bridge. These are helpers for\nconstructing that list.\n\nThese are exported because the plan is to replace this exported interface:\n pci_scan_bus_parented()\nwith this one:\n pci_add_resource(resources, ...)\n pci_scan_root_bus(..., resources)\n\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "96c5590058d7fded14f43af2ab521436cecf3125", "tree": "673577f86b1ee8886c27cc86333fdfdc6cc783ac", "parents": [ "9cdce18d6f0baae53f012fb3f50e66e7ff24c509" ], "author": { "name": "Myron Stowe", "email": "mstowe@redhat.com", "time": "Fri Oct 28 15:48:38 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:42 2012 -0800" }, "message": "PCI: Pull PCI \u0027latency timer\u0027 setup up into the core\n\nThe \u0027latency timer\u0027 of PCI devices, both Type 0 and Type 1,\nis setup in architecture-specific code [see: \u0027pcibios_set_master()\u0027].\nThere are two approaches being taken by all the architectures - check\nif the \u0027latency timer\u0027 is currently set between 16 and 255 and if not\nbring it within bounds, or, do nothing (and then there is the\ngratuitously different PA-RISC implementation).\n\nThere is nothing architecture-specific about PCI\u0027s \u0027latency timer\u0027 so\nthis patch pulls its setup functionality up into the PCI core by\ncreating a generic \u0027pcibios_set_master()\u0027 function using the \u0027__weak\u0027\nattribute which can be used by all architectures as a default which,\nif necessary, can then be over-ridden by architecture-specific code.\n\nNo functional change.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "cfce9fb808d7d25f6ea18a804eb71b08c7d777c1", "tree": "5266c63ab2a128a65ef830aee2e2ec1020aad4a4", "parents": [ "2502dbdfc878a801b5e6d0b6901c334f4051ca39" ], "author": { "name": "Myron Stowe", "email": "mstowe@redhat.com", "time": "Fri Oct 28 15:47:35 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:35 2012 -0800" }, "message": "PCI: add declaration for pcibios_set_master() to pci core\n\nCurrently, pcibios_set_master() is implemented in architecture-\nspecific code. There is nothing architecture-specific about PCI\u0027s\n\u0027latency timer\u0027.\n\nThis patch adds a declaration for pcibios_set_master() to PCI\u0027s core\nin preperation for pulling the function itself up into the core.\nWithout the addition of this declaration, subsequent patches that\nremove inline definitions of pcibios_set_master() would be removing\nthe only declaration of such.\n\nNo functional change.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a2e27787f893621c5a6b865acf6b7766f8671328", "tree": "b7398b80a56b1e25e4758dfc9ed2af2df27458f3", "parents": [ "fb51ccbf217c1c994607b6519c7d85250928553d" ], "author": { "name": "Jan Kiszka", "email": "jan.kiszka@siemens.com", "time": "Fri Nov 04 09:46:00 2011 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:34 2012 -0800" }, "message": "PCI: Introduce INTx check \u0026 mask API\n\nThese new PCI services allow to probe for 2.3-compliant INTx masking\nsupport and then use the feature from PCI interrupt handlers. The\nservices are properly synchronized with concurrent config space access\nvia sysfs or on device reset.\n\nThis enables generic PCI device drivers like uio_pci_generic or KVM\u0027s\ndevice assignment to implement the necessary kernel-side IRQ handling\nwithout any knowledge about device-specific interrupt status and control\nregisters.\n\nAcked-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "fb51ccbf217c1c994607b6519c7d85250928553d", "tree": "d08ba9a0278da0e75b6c6714e9453e46068e27b4", "parents": [ "ae5cd86455381282ece162966183d3f208c6fad7" ], "author": { "name": "Jan Kiszka", "email": "jan.kiszka@siemens.com", "time": "Fri Nov 04 09:45:59 2011 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:33 2012 -0800" }, "message": "PCI: Rework config space blocking services\n\npci_block_user_cfg_access was designed for the use case that a single\ncontext, the IPR driver, temporarily delays user space accesses to the\nconfig space via sysfs. This assumption became invalid by the time\npci_dev_reset was added as locking instance. Today, if you run two loops\nin parallel that reset the same device via sysfs, you end up with a\nkernel BUG as pci_block_user_cfg_access detect the broken assumption.\n\nThis reworks the pci_block_user_cfg_access to a sleeping service\npci_cfg_access_lock and an atomic-compatible variant called\npci_cfg_access_trylock. The former not only blocks user space access as\nbefore but also waits if access was already locked. The latter service\njust returns false in this case, allowing the caller to resolve the\nconflict instead of raising a BUG.\n\nAdaptions of the ipr driver were originally written by Brian King.\n\nAcked-by: Brian King \u003cbrking@linux.vnet.ibm.com\u003e\nAcked-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" } ], "next": "da8d1c8ba4dcb16d60be54b233deca9a7cac98dc" }