)]}' { "log": [ { "commit": "597c606f560cf7ef6029152fa7574bddbfb0252f", "tree": "0d0fcf0087de96cffea0853eac87fce048c6f00d", "parents": [ "23308ba54dcdb54481163bfb07dd8aeca76a7a2e" ], "author": { "name": "Jiri Slaby", "email": "jslaby@suse.cz", "time": "Thu Nov 04 16:20:21 2010 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Nov 16 12:50:18 2010 -0800" }, "message": "parisc: cleanup console handling\n\n* use newly added for_each_console for iterating consoles\n* add proper console locking\n* do not initialize tmp twice\n* no need to declare console_drivers, it\u0027s already done in console.h\n\nSigned-off-by: Jiri Slaby \u003cjslaby@suse.cz\u003e\nAcked-by: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nCc: Helge Deller \u003cdeller@gmx.de\u003e\nCc: \"James E.J. Bottomley\" \u003cjejb@parisc-linux.org\u003e\nCc: linux-parisc@vger.kernel.org\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "934648f0449fae00946f55d64cd998bb5587fa1f", "tree": "a8c5e55cfbfff34497f6ec873ea31725fdb849ab", "parents": [ "8be5814c45d1412c6c16cf9be73e507f5fe53c1b", "65670a1b75874cf36c81456f2fb1e5ef6c6c0a55" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Nov 08 10:54:23 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Nov 08 10:54:23 2010 -0800" }, "message": "Merge branch \u0027rmobile-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* \u0027rmobile-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:\n mmc: sh_mmcif: Convert extern inline to static inline.\n ARM: mach-shmobile: Allow GPIO chips to register IRQ mappings.\n ARM: mach-shmobile: fix sh7372 after a recent clock framework rework\n ARM: mach-shmobile: include drivers/sh/Kconfig\n ARM: mach-shmobile: ap4evb: Add HDMI sound support\n ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support\n ARM: shmobile: remove sh_timer_config clk member\n" }, { "commit": "65670a1b75874cf36c81456f2fb1e5ef6c6c0a55", "tree": "48aa7cfb7a6a5521727a272d7dcfdc7083966513", "parents": [ "151f52f09c5728ecfdd0c289da1a4b30bb416f2c", "2f6ba5792ce9e4a731baeb976ccc72e0cf43d20b" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Nov 08 09:51:41 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Nov 08 09:51:41 2010 +0900" }, "message": "Merge branch \u0027rmobile/core\u0027 into rmobile-fixes-for-linus\n" }, { "commit": "21e14266284bf448faabb4485895d72d8af1f2d8", "tree": "fb27b7cb7ddd137d12cd3a61c13a758a3e558ce8", "parents": [ "151f52f09c5728ecfdd0c289da1a4b30bb416f2c", "e2781ac2a63011dd883e94c07eb086e6f2a5f521", "edc9a958fd31ef1d89f9eaee82b2a3882c8e34c9", "a766b29790b2b6582345624a6e9e686d8015efe1", "ccedb20c6879ac0237b95b3500d69822f1e5e2ea", "20f95e0b22ea45c1798261064baab57efeb3b3bc" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Nov 08 09:42:43 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Nov 08 09:42:43 2010 +0900" }, "message": "Merge branches \u0027sh/pio-death\u0027, \u0027sh/nommu\u0027, \u0027sh/clkfwk\u0027, \u0027sh/core\u0027 and \u0027sh/intc-extension\u0027 into sh-fixes-for-linus\n" }, { "commit": "d0013c9e3bc75b3e1652bd5999a9a8d56a822ce4", "tree": "0bc50a3255a3ee37445a8183a3a530289fca70d7", "parents": [ "6af26c6c99f01e810f9944543df810e320284aa3" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Nov 04 14:14:29 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Nov 08 09:35:28 2010 +0900" }, "message": "sh: make some needlessly global sh7724 clocks static\n\nThese clocks are currently only used inside one .c file and are not\ndeclared in any headers, therefore having them global is useless.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "d4285bd6be60268ee9925b41287fb8c2a3132bde", "tree": "db61c17e7fbd10f8b31695988f9882769c193fdd", "parents": [ "c093ee4f07f46d3a835841cafa07514fa94878d2", "df8940eadf011db2d4bedecf6eb659d44494edb3" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Nov 05 17:49:22 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Nov 05 17:49:22 2010 -0700" }, "message": "Merge branch \u0027kvm-updates/2.6.37\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm\n\n* \u0027kvm-updates/2.6.37\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm:\n KVM: PPC: BookE: Load the lower half of MSR\n KVM: PPC: BookE: fix sleep with interrupts disabled\n KVM: PPC: e500: Call kvm_vcpu_uninit() before kvmppc_e500_tlb_uninit().\n PPC: KVM: Book E doesn\u0027t have __end_interrupts.\n KVM: x86: Issue smp_call_function_many with preemption disabled\n KVM: x86: fix information leak to userland\n KVM: PPC: fix information leak to userland\n KVM: MMU: fix rmap_remove on non present sptes\n KVM: Write protect memory after slot swap\n" }, { "commit": "0660a9b16ad502874de3e793875fa23eed7b038a", "tree": "d0181e31d7dd616e16defd3b1b4fcd867e26e78f", "parents": [ "65f75ace23863063aac374d1bdb302d103e89ec3", "d02db4f8d79c5841ba32b326edb75ea6acd081ca" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Nov 05 09:52:25 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Nov 05 09:52:25 2010 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n arch/tile: mark \"hardwall\" device as non-seekable\n asm-generic/stat.h: support 64-bit file time_t for stat()\n arch/tile: don\u0027t allow user code to set the PL via ptrace or signal return\n arch/tile: correct double syscall restart for nested signals\n arch/tile: avoid __must_check warning on one strict_strtol check\n arch/tile: bomb raw_local_irq_ to arch_local_irq_\n arch/tile: complete migration to new kmap_atomic scheme\n" }, { "commit": "df8940eadf011db2d4bedecf6eb659d44494edb3", "tree": "41671049697d45a1b2463f955d3bd25865920720", "parents": [ "bb59e9748f9bc95212c7fe21468ba184938c48cb" ], "author": { "name": "Scott Wood", "email": "scottwood@freescale.com", "time": "Thu Sep 30 14:31:27 2010 -0500" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:29 2010 -0200" }, "message": "KVM: PPC: BookE: Load the lower half of MSR\n\nThis was preventing the guest from setting any bits in the\nhardware MSR which aren\u0027t forced on, such as MSR[SPE].\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n" }, { "commit": "bb59e9748f9bc95212c7fe21468ba184938c48cb", "tree": "6b6bbf59969da08b63f5486ebd4f2741a8a07382", "parents": [ "f22e2f049d4643ed3c2d498ca50f894ace87962b" ], "author": { "name": "Scott Wood", "email": "scottwood@freescale.com", "time": "Thu Sep 30 14:28:50 2010 -0500" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:28 2010 -0200" }, "message": "KVM: PPC: BookE: fix sleep with interrupts disabled\n\nIt is not legal to call mutex_lock() with interrupts disabled.\nThis will assert with debug checks enabled.\n\nIf there\u0027s a real need to disable interrupts here, it could be done\nafter the mutex is acquired -- but I don\u0027t see why it\u0027s needed at all.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nReviewed-by: Christian Ehrhardt \u003cehrhardt@linux.vnet.ibm.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n" }, { "commit": "f22e2f049d4643ed3c2d498ca50f894ace87962b", "tree": "76ea2e8eb9ba6d4f9de97ddf232039ec629cc958", "parents": [ "a36be1003a80197714fc2b6e198df2f31f9eb270" ], "author": { "name": "Scott Wood", "email": "scottwood@freescale.com", "time": "Tue Oct 05 14:22:41 2010 -0500" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:28 2010 -0200" }, "message": "KVM: PPC: e500: Call kvm_vcpu_uninit() before kvmppc_e500_tlb_uninit().\n\nThe VCPU uninit calls some TLB functions, and the TLB uninit function\nfrees the memory used by them.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nAcked-by: Liu Yu \u003cyu.liu@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n" }, { "commit": "a36be1003a80197714fc2b6e198df2f31f9eb270", "tree": "8e804f7bc7b0af3e9988d540d2196088f01042d4", "parents": [ "453d9c57e27b4401bc3e98906bcac31ae8be0165" ], "author": { "name": "Scott Wood", "email": "scottwood@freescale.com", "time": "Mon Oct 18 17:35:48 2010 -0500" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:27 2010 -0200" }, "message": "PPC: KVM: Book E doesn\u0027t have __end_interrupts.\n\nFix an unresolved symbol with CONFIG_KVM_GUEST plus CONFIG_RELOCATABLE on\nBook E.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n" }, { "commit": "453d9c57e27b4401bc3e98906bcac31ae8be0165", "tree": "53f56dd0d1001b0c78ebfda795cab7d1e0469e1d", "parents": [ "97e69aa62f8b5d338d6cff49be09e37cc1262838" ], "author": { "name": "Jan Kiszka", "email": "jan.kiszka@siemens.com", "time": "Mon Nov 01 14:01:13 2010 +0100" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:27 2010 -0200" }, "message": "KVM: x86: Issue smp_call_function_many with preemption disabled\n\nsmp_call_function_many is specified to be called only with preemption\ndisabled. Fulfill this requirement.\n\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n" }, { "commit": "97e69aa62f8b5d338d6cff49be09e37cc1262838", "tree": "b16e0b5d64322f1e0d6ff6de7bbf11609fb09785", "parents": [ "d8cdddcd645766cd4d80fa222226ae6ebfb706af" ], "author": { "name": "Vasiliy Kulikov", "email": "segooon@gmail.com", "time": "Sat Oct 30 22:54:47 2010 +0400" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:27 2010 -0200" }, "message": "KVM: x86: fix information leak to userland\n\nStructures kvm_vcpu_events, kvm_debugregs, kvm_pit_state2 and\nkvm_clock_data are copied to userland with some padding and reserved\nfields unitialized. It leads to leaking of contents of kernel stack\nmemory. We have to initialize them to zero.\n\nIn patch v1 Jan Kiszka suggested to fill reserved fields with zeros\ninstead of memset\u0027ting the whole struct. It makes sense as these\nfields are explicitly marked as padding. No more fields need zeroing.\n\nKVM-Stable-Tag.\nSigned-off-by: Vasiliy Kulikov \u003csegooon@gmail.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n" }, { "commit": "d8cdddcd645766cd4d80fa222226ae6ebfb706af", "tree": "5f439c89be44bf2bcccdb745a5c37824d5a1ee67", "parents": [ "eb45fda45f915c7ca3e81e005e853cb770da2642" ], "author": { "name": "Vasiliy Kulikov", "email": "segooon@gmail.com", "time": "Sat Oct 30 13:04:24 2010 +0400" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:26 2010 -0200" }, "message": "KVM: PPC: fix information leak to userland\n\nStructure kvm_ppc_pvinfo is copied to userland with flags and\npad fields unitialized. It leads to leaking of contents of\nkernel stack memory.\n\nSigned-off-by: Vasiliy Kulikov \u003csegooon@gmail.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n" }, { "commit": "eb45fda45f915c7ca3e81e005e853cb770da2642", "tree": "9c10bbdb52a1a1752cac30343a3c6f4d79ef4a88", "parents": [ "edde99ce05290e50ce0b3495d209e54e6349ab47" ], "author": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Mon Oct 25 11:58:22 2010 -0200" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:26 2010 -0200" }, "message": "KVM: MMU: fix rmap_remove on non present sptes\n\ndrop_spte should not attempt to rmap_remove a non present shadow pte.\n\nThis fixes a BUG_ON seen on kvm-autotest.\n\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\nReported-by: Lucas Meneghel Rodrigues \u003clmr@redhat.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n" }, { "commit": "edde99ce05290e50ce0b3495d209e54e6349ab47", "tree": "efb966684a2999613ab81e5d30a9118acdb9fbef", "parents": [ "ff8b16d7e15a8ba2a6086645614a483e048e3fbf" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@redhat.com", "time": "Mon Oct 25 03:21:24 2010 +0200" }, "committer": { "name": "Marcelo Tosatti", "email": "mtosatti@redhat.com", "time": "Fri Nov 05 14:42:25 2010 -0200" }, "message": "KVM: Write protect memory after slot swap\n\nI have observed the following bug trigger:\n\n1. userspace calls GET_DIRTY_LOG\n2. kvm_mmu_slot_remove_write_access is called and makes a page ro\n3. page fault happens and makes the page writeable\n fault is logged in the bitmap appropriately\n4. kvm_vm_ioctl_get_dirty_log swaps slot pointers\n\na lot of time passes\n\n5. guest writes into the page\n6. userspace calls GET_DIRTY_LOG\n\nAt point (5), bitmap is clean and page is writeable,\nthus, guest modification of memory is not logged\nand GET_DIRTY_LOG returns an empty bitmap.\n\nThe rule is that all pages are either dirty in the current bitmap,\nor write-protected, which is violated here.\n\nIt seems that just moving kvm_mmu_slot_remove_write_access down\nto after the slot pointer swap should fix this bug.\n\nKVM-Stable-Tag.\nSigned-off-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n" }, { "commit": "ccedb20c6879ac0237b95b3500d69822f1e5e2ea", "tree": "b2cf47f54cb449c4dd7d2b874b976c3901b47c36", "parents": [ "7fe19da4ca38fc20cdbc7020fcf2eca8fc756410" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:51:08 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:51:08 2010 +0900" }, "message": "sh: Simplify phys_addr_mask()/PTE_PHYS_MASK for 29/32-bit.\n\nGiven that __in_29bit_mode() is a constant for the non-PMB case, we can\nsimply use the PMB-facing version of phys_addr_mask() and drop the other\nvariants.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "edc9a958fd31ef1d89f9eaee82b2a3882c8e34c9", "tree": "bdc96edeb6a41ab72ae87daf46d3402aba633541", "parents": [ "e2fcf74f3d3dabe8591732cd37869a0cc88ed7a5" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:46:19 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:46:19 2010 +0900" }, "message": "sh: nommu: Support building without an uncached mapping.\n\nNow that nommu selects 32BIT we run in to the situation where SH-2A\nsupports an uncached identity mapping by way of the BSC, while the SH-2\ndoes not. This provides stubs for the PC manglers and tidies up some of\nthe system*.h mess in the process.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "e2fcf74f3d3dabe8591732cd37869a0cc88ed7a5", "tree": "ccc1efdfffdf6b9ca427f46bb135faaa44e00dd4", "parents": [ "e96ce8ebfd7427c7ce335028f6619fb549f366b2" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:32:24 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:32:24 2010 +0900" }, "message": "sh: nommu: use 32-bit phys mode.\n\nThe nommu code has regressed somewhat in that 29BIT gets set for the\nSH-2/2A configs regardless of the fact that they are really 32BIT sans\nMMU or PMB. This does a bit of tidying to get nommu properly selecting\n32BIT as it was before.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "e96ce8ebfd7427c7ce335028f6619fb549f366b2", "tree": "a3b496f2ebb20d188d685becc407f4280016900e", "parents": [ "7fe19da4ca38fc20cdbc7020fcf2eca8fc756410" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:29:00 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:29:00 2010 +0900" }, "message": "sh: mach-se: Fix up SE7206 no ioport build.\n\nThere was a leftover inw() used here that really just wants to be a\n__raw_readw() instead. Convert it over.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "cad3cde3f6f2a7854489f957dc22aa9a23afb06c", "tree": "96e6da0f2d13b44384cfd88f848f954c4b550af3", "parents": [ "5c4e0f198d670338daf296e95b7536fdb3489590" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:19:11 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 04 12:19:11 2010 +0900" }, "message": "ARM: mach-shmobile: Allow GPIO chips to register IRQ mappings.\n\nAs non-PFC chips are added that may support IRQs, pass through to the\ngeneric helper. This follows the the SH change.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "ed35f654e4f0e08d39036353cc1dfda52a5cf129", "tree": "339bb8d56f508411976a033455a319afad8c89da", "parents": [ "79c1a903ecddc52a7ecbac1e8e73f360ac6d0472" ], "author": { "name": "Philippe De Muyter", "email": "phdm@macqel.be", "time": "Thu Oct 28 14:42:58 2010 +0200" }, "committer": { "name": "Greg Ungerer", "email": "gerg@uclinux.org", "time": "Wed Nov 03 11:30:07 2010 +1000" }, "message": "m68k, m68knommu: Do not include linux/hardirq.h in asm/irqflags.h\n\nRecent changes to header files made kernel compilation for m68k/m68knommu\nfail with :\n CC arch/m68knommu/kernel/asm-offsets.s\nIn file included from /archives/linux/git/arch/m68k/include/asm/system.h:2,\n from include/linux/wait.h:25,\n from include/linux/mmzone.h:9,\n from include/linux/gfp.h:4,\n from include/linux/irq.h:20,\n from include/asm-generic/hardirq.h:12,\n from /archives/linux/git/arch/m68k/include/asm/hardirq_no.h:17,\n from /archives/linux/git/arch/m68k/include/asm/hardirq.h:2,\n from include/linux/hardirq.h:10,\n from /archives/linux/git/arch/m68k/include/asm/irqflags.h:5,\n from include/linux/irqflags.h:15,\n from include/linux/spinlock.h:53,\n from include/linux/seqlock.h:29,\n from include/linux/time.h:8,\n from include/linux/timex.h:56,\n from include/linux/sched.h:56,\n from arch/m68knommu/kernel/asm-offsets.c:12:\n/archives/linux/git/arch/m68k/include/asm/system_no.h: In function ‘__xchg’:\n/archives/linux/git/arch/m68k/include/asm/system_no.h:79: error: implicit\n+declaration of function ‘local_irq_save’\n/archives/linux/git/arch/m68k/include/asm/system_no.h:101: error: implicit\n+declaration of function ‘local_irq_restore’\n\nFix that\n\nSigned-off-by: Philippe De Muyter \u003cphdm@macqel.be\u003e\nSigned-off-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "79c1a903ecddc52a7ecbac1e8e73f360ac6d0472", "tree": "a3806cbf55aad8a4b8b55212b2c13902f5d319dd", "parents": [ "d88c0922fa0e2c021a028b310a641126c6d4b7dc" ], "author": { "name": "Greg Ungerer", "email": "gerg@uclinux.org", "time": "Tue Nov 02 17:44:22 2010 +1000" }, "committer": { "name": "Greg Ungerer", "email": "gerg@uclinux.org", "time": "Wed Nov 03 11:29:58 2010 +1000" }, "message": "m68knommu: add back in declaration of do_IRQ\n\nThe cleanup and merge of machdep should not have removed the do_IRQ\ndeclaration. It is needed by the 68328 based targets.\n\nSigned-off-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "5c4e0f198d670338daf296e95b7536fdb3489590", "tree": "f4d3de3f1a515ebcc0938f3a2750009360167fb1", "parents": [ "be8cb585d22013d87b1a123cf3bc93b474050c35" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Tue Nov 02 11:28:33 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Nov 02 11:52:37 2010 -0400" }, "message": "ARM: mach-shmobile: fix sh7372 after a recent clock framework rework\n\nThe updated sh clock framework has introduced a .nr_freqs element of struct\nclk, which has to be initialised with the number of possible frequencies.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "d02db4f8d79c5841ba32b326edb75ea6acd081ca", "tree": "ee753e0f72929c143b16ba4723ff2c1b4eaefade", "parents": [ "2c7387ef9969bb073c25ecbdcc5be30770267b16" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 12:46:10 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:42 2010 -0400" }, "message": "arch/tile: mark \"hardwall\" device as non-seekable\n\nArnd\u0027s recent patch series tagged this device with noop_llseek,\nconservatively. In fact, it should be no_llseek, which we arrange\nfor by opening the device with nonseekable_open().\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "2c7387ef9969bb073c25ecbdcc5be30770267b16", "tree": "21025658ae17a84b0df346b589eb6c986c6f599d", "parents": [ "1deb9c5dfb179819ecdbf80a1d121e26c63caab3" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 28 16:07:07 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:29 2010 -0400" }, "message": "asm-generic/stat.h: support 64-bit file time_t for stat()\n\nThe existing asm-generic/stat.h specifies st_mtime, etc., as a 32-value,\nand works well for 32-bit architectures (currently microblaze, score,\nand 32-bit tile). However, for 64-bit architectures it isn\u0027t sufficient\nto return 32 bits of time_t; this isn\u0027t good insurance against the 2037\nrollover. (It also makes glibc support less convenient, since we can\u0027t\nuse glibc\u0027s handy STAT_IS_KERNEL_STAT mode.)\n\nThis change extends the two \"timespec\" fields for each of the three atime,\nmtime, and ctime fields from \"int\" to \"long\". As a result, on 32-bit\nplatforms nothing changes, and 64-bit platforms will now work as expected.\n\nThe only wrinkle is 32-bit userspace under 64-bit kernels taking advantage\nof COMPAT mode. For these, we leave the \"struct stat64\" definitions with\nthe \"int\" versions of the time_t and nsec fields, so that architectures\ncan implement compat_sys_stat64() and friends with sys_stat64(), etc.,\nand get the expected 32-bit structure layout. This requires a\nfield-by-field copy in the kernel, implemented by the code guarded\nunder __ARCH_WANT_STAT64.\n\nThis does mean that the shape of the \"struct stat\" and \"struct stat64\"\nstructures is different on a 64-bit kernel, but only one of the two\nstructures should ever be used by any given process: \"struct stat\"\nis meant for 64-bit userspace only, and \"struct stat64\" for 32-bit\nuserspace only. (On a 32-bit kernel the two structures continue to have\nthe same shape, since \"long\" is 32 bits.)\n\nThe alternative is keeping the two structures the same shape on 64-bit\nkernels, which means a 64-bit time_t in \"struct stat64\" for 32-bit\nprocesses. This is a little unnatural since 32-bit userspace can\u0027t\ndo anything with 64 bits of time_t information, since time_t is just\n\"long\", not \"int64_t\"; and in any case 32-bit userspace might expect\nto be running under a 32-bit kernel, which can\u0027t provide the high 32\nbits anyway. In the case of a 32-bit kernel we\u0027d then be extending the\nkernel\u0027s 32-bit time_t to 64 bits, then truncating it back to 32 bits\nagain in userspace, for no particular reason. And, as mentioned above,\nif we have 64-bit time_t for 32-bit processes we can\u0027t easily use glibc\u0027s\nSTAT_IS_KERNEL_STAT, since glibc\u0027s stat structure requires an embedded\n\"struct timespec\", which is a pair of \"long\" (32-bit) values in a 32-bit\nuserspace. \"Inventive\" solutions are possible, but are pretty hacky.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "1deb9c5dfb179819ecdbf80a1d121e26c63caab3", "tree": "c6f6ec6030eb22f094a65c07e63312758d079794", "parents": [ "34a89d26bdc4ba46a406fa3842239e921c493d44" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 28 15:47:06 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:17 2010 -0400" }, "message": "arch/tile: don\u0027t allow user code to set the PL via ptrace or signal return\n\nThe kernel was allowing any component of the pt_regs to be updated either\nby signal handlers writing to the stack, or by processes writing via\nPTRACE_POKEUSR or PTRACE_SETREGS, which meant they could set their PL\nup from 0 to 1 and get access to kernel code and data (or, in practice,\ncause a kernel panic). We now always reset the ex1 field, allowing the\nuser to set their ICS bit only.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "34a89d26bdc4ba46a406fa3842239e921c493d44", "tree": "bbfc0dcd4376f6f6337cc199fa785f53243b36cb", "parents": [ "d59e609d6568ba5ab23c256f412ac5ec360722c1" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 28 15:03:30 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:04 2010 -0400" }, "message": "arch/tile: correct double syscall restart for nested signals\n\nThis change is modelled on similar fixes for other architectures.\nThe pt_regs \"faultnum\" member is set to the trap (fault) number that\ncaused us to enter the kernel, and is INT_SWINT_1 for the syscall software\ninterrupt. We already supported a pseudo value, INT_SWINT_1_SIGRETURN,\nthat we used for the rt_sigreturn syscall; it avoided the case where\none signal was handled, then we \"tail-called\" to another handler.\n\nThis change avoids the similar case where we start to call one handler,\nthen are preempted into another handler when we start trying to run\nthe first handler. We clear -\u003efaultnum after calling handle_signal(),\nand to be paranoid also in the case where there was no signal to deliver.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d59e609d6568ba5ab23c256f412ac5ec360722c1", "tree": "2caad01eb530fc5ab31d189c8b9749021a596934", "parents": [ "5d966115de84c22cd4df029cb00be0e51fab6c10" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:25:16 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:30:53 2010 -0400" }, "message": "arch/tile: avoid __must_check warning on one strict_strtol check\n\nFor the \"initfree\" boot argument it\u0027s not that big a deal, but\nto avoid warnings in the code, we check for a valid value before\nallowing the specified argument to override the kernel default.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "5d966115de84c22cd4df029cb00be0e51fab6c10", "tree": "85095d93900f7f76a7591620651c5480065cacfb", "parents": [ "38a6f4266989c4dae68eccb1a5cb4580a48003e4" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:24:29 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:30:42 2010 -0400" }, "message": "arch/tile: bomb raw_local_irq_ to arch_local_irq_\n\nThis completes the tile migration to the new naming scheme for\nthe architecture-specific irq management code.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "38a6f4266989c4dae68eccb1a5cb4580a48003e4", "tree": "dba1fecb1c0631f4d9b3dfb9f56d11f92d905a4f", "parents": [ "c8ddb2713c624f432fa5fe3c7ecffcdda46ea0d4" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:21:35 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:30:36 2010 -0400" }, "message": "arch/tile: complete migration to new kmap_atomic scheme\n\nThis change makes KM_TYPE_NR independent of the actual deprecated\nlist of km_type values, which are no longer used in tile code anywhere.\nFor now we leave it set to 8, allowing that many nested mappings,\nand thus reserving 32MB of address space.\n\nA few remaining places using KM_* values were cleaned up as well.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "be8cb585d22013d87b1a123cf3bc93b474050c35", "tree": "f8e6f0929c06032acd21d75c80c1b9662ff045b4", "parents": [ "2669efec085bfc02006a452e1b5930f28bab959b" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Nov 01 11:38:06 2010 -0400" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Nov 01 11:38:06 2010 -0400" }, "message": "ARM: mach-shmobile: include drivers/sh/Kconfig\n\nMany of the config bit are presently duplicated between the platforms,\nwhich will gradually cleaned up through centralization. For the moment we\nexpose some new INTC features through drivers/sh/Kconfig that the ARM\nplatforms presently don\u0027t enable, so make it generally available.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "90ae83f7fc32733e5829d806306c0c590f1a383f", "tree": "5b4cd7290c70d9899ca7caa99998395218b15cab", "parents": [ "47c5ba53bc5e5f88b5d1bbb97acd25afc27f74eb", "65289d6345d93abd860e43fd2119ac176d6cc697" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Nov 01 07:50:43 2010 -0400" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Nov 01 07:50:43 2010 -0400" }, "message": "Merge branch \u0027next-spi\u0027 of git://git.secretlab.ca/git/linux-2.6\n\n* \u0027next-spi\u0027 of git://git.secretlab.ca/git/linux-2.6:\n spi/pl022: fix erroneous platform data in U300\n spi: fixed odd static string conventions in core code\n spi/bfin_spi: only request GPIO on first load\n spi/bfin_spi: handle error/status changes after data interrupts\n spi: enable spi_board_info to be registered after spi_master\n" }, { "commit": "65289d6345d93abd860e43fd2119ac176d6cc697", "tree": "54e176162e4c6ddf13dbc6098de6d5ccdde4e9fd", "parents": [ "eb288a1f45e2aa903ac8edf67dc6d59df0369fe1" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Thu Oct 21 21:05:25 2010 +0200" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Mon Nov 01 01:01:08 2010 -0400" }, "message": "spi/pl022: fix erroneous platform data in U300\n\nThis fixes an erroneous use of LSB first in the U300 machine, the\nPL022 used in U300 is a standard ARM core that doesn\u0027t support this\nbit so it should never have been set.\n\nCc: Kevin Wells \u003cwellsk40@gmail.com\u003eOA\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "2669efec085bfc02006a452e1b5930f28bab959b", "tree": "20ee1c0f5b9d19ceedd9b17f1d6f129c83d393a0", "parents": [ "f2ace4a5d754c07503326d66ec85bf65e03d729d" ], "author": { "name": "Kuninori Morimoto", "email": "kuninori.morimoto.gx@renesas.com", "time": "Sun Oct 31 10:43:14 2010 -0400" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Sun Oct 31 10:43:14 2010 -0400" }, "message": "ARM: mach-shmobile: ap4evb: Add HDMI sound support\n\nSigned-off-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "f2ace4a5d754c07503326d66ec85bf65e03d729d", "tree": "e309065e67fead6359102ae9609bcff86cd83851", "parents": [ "03ff858c09c81a659b2a90a08826bc0abdbb784c" ], "author": { "name": "Kuninori Morimoto", "email": "kuninori.morimoto.gx@renesas.com", "time": "Mon Oct 18 03:50:39 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Sun Oct 31 10:40:45 2010 -0400" }, "message": "ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support\n\nSigned-off-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "f02a38d86a14b6e544e218d806ffb0442785f62b", "tree": "84aace4aaf4b018c48f25ec2831888354baae16c", "parents": [ "925d169f5b86fe57e2f5264ea574cce9a89b719d", "169ed55bd30305b933f52bfab32a58671d44ab68", "7b79462a20826a7269322113c68ca78d5f67c0bd" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 11:43:26 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 11:43:26 2010 -0700" }, "message": "Merge branches \u0027perf-fixes-for-linus\u0027 and \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perf-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n jump label: Add work around to i386 gcc asm goto bug\n x86, ftrace: Use safe noops, drop trap test\n jump_label: Fix unaligned traps on sparc.\n jump label: Make arch_jump_label_text_poke_early() optional\n jump label: Fix error with preempt disable holding mutex\n oprofile: Remove deprecated use of flush_scheduled_work()\n oprofile: Fix the hang while taking the cpu offline\n jump label: Fix deadlock b/w jump_label_mutex vs. text_mutex\n jump label: Fix module __init section race\n\n* \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86: Check irq_remapped instead of remapping_enabled in destroy_irq()\n" }, { "commit": "79346507ad48895f41b438fa562b1965721f36b9", "tree": "5c115ce87f1fbc0b530f30db56cecf824e9f6e05", "parents": [ "706d4b12f8d7edd28d7e879a77235472da393edb", "40847437f15221b5822ba70550e8b9fcccfb9bb3" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 08:31:35 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 08:31:35 2010 -0700" }, "message": "Merge git://git.infradead.org/mtd-2.6\n\n* git://git.infradead.org/mtd-2.6: (82 commits)\n mtd: fix build error in m25p80.c\n mtd: Remove redundant mutex from mtd_blkdevs.c\n MTD: Fix wrong check register_blkdev return value\n Revert \"mtd: cleanup Kconfig dependencies\"\n mtd: cfi_cmdset_0002: make sector erase command variable\n mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chips\n mtd: cfi_util: add support for switching SST 39VF640xB chips into QRY mode\n mtd: cfi_cmdset_0001: use defined value of P_ID_INTEL_PERFORMANCE instead of hardcoded one\n block2mtd: dubious assignment\n P4080/mtd: Fix the freescale lbc issue with 36bit mode\n P4080/eLBC: Make Freescale elbc interrupt common to elbc devices\n mtd: phram: use KBUILD_MODNAME\n mtd: OneNAND: S5PC110: Fix double call suspend \u0026 resume function\n mtd: nand: fix MTD_MODE_RAW writes\n jffs2: use kmemdup\n mtd: sm_ftl: cosmetic, use bool when possible\n mtd: r852: remove useless pci powerup/down from suspend/resume routines\n mtd: blktrans: fix a race vs kthread_stop\n mtd: blktrans: kill BKL\n mtd: allow to unload the mtdtrans module if its block devices aren\u0027t open\n ...\n\nFix up trivial whitespace-introduced conflict in drivers/mtd/mtdchar.c\n" }, { "commit": "706d4b12f8d7edd28d7e879a77235472da393edb", "tree": "c9bc1ce06b1154a49da1d0d907cac544a818eb0e", "parents": [ "3af54c9bd9e6f14f896aac1bb0e8405ae0bc7a44", "9bafc74163d8bccca9810159aab39be926fb877c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 08:26:25 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 08:26:25 2010 -0700" }, "message": "Merge branch \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)\n ARM: memblock: setup lowmem mappings using memblock\n ARM: memblock: move meminfo into find_limits directly\n ARM: memblock: convert free_highpages() to use memblock\n ARM: move freeing of highmem pages out of mem_init()\n ARM: memblock: convert memory detail printing to use memblock\n ARM: memblock: use memblock to free memory into arm_bootmem_init()\n ARM: memblock: use memblock when initializing memory allocators\n ARM: ensure membank array is always sorted\n ARM: 6466/1: implement flush_icache_all for the rest of the CPUs\n ARM: 6464/2: fix spinlock recursion in adjust_pte()\n ARM: fix memblock breakage\n ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type\n ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt\n ARM: 6449/1: Fix for compiler warning of uninitialized variable.\n ARM: 6445/1: fixup TCM memory types\n ARM: imx: Add wake functionality to GPIO\n ARM: mx5: Add gpio-keys to mx51 babbage board\n ARM: imx: Add gpio-keys to plat-mxc\n mx31_3ds: Fix spi registration\n mx31_3ds: Fix the logic for detecting the debug board\n ...\n" }, { "commit": "67577927e8d7a1f4b09b4992df640eadc6aacb36", "tree": "2e9efe6b5745965faf0dcc084d4613d9356263f9", "parents": [ "6fe4c590313133ebd5dadb769031489ff178ece1", "51f00a471ce8f359627dd99aeac322947a0e491b" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Oct 30 12:35:11 2010 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Oct 30 12:35:11 2010 +0100" }, "message": "Merge branch \u0027master\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git\n\nConflicts:\n\tdrivers/mtd/mtd_blkdevs.c\n\nMerge Grant\u0027s device-tree bits so that we can apply the subsequent fixes.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "7b79462a20826a7269322113c68ca78d5f67c0bd", "tree": "ae873a15bd5fbf47c2d75e26ebe84767ab1c94be", "parents": [ "2d10d8737ccdba752d60106abbc6ed4f37404923" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sat Oct 30 01:19:29 2010 -0700" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Sat Oct 30 10:28:31 2010 +0200" }, "message": "x86: Check irq_remapped instead of remapping_enabled in destroy_irq()\n\nRuss Anderson reported:\n| There is a regression that is causing a NULL pointer dereference\n| in free_irte when shutting down xpc. git bisect narrowed it down\n| to git commit d585d06(intr_remap: Simplify the code further), which\n| changed free_irte(). Reverse applying the patch fixes the problem.\n\nWe need to use irq_remapped() for each irq instead of checking only\nintr_remapping_enabled as there might be non remapped irqs even when\nremapping is enabled.\n\n[ tglx: use cfg instead of retrieving it again. Massaged changelog ]\n\nReported-bisected-and-tested-by: Russ Anderson \u003crja@sgi.com\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c4CCBD511.40607@kernel.org\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "2d10d8737ccdba752d60106abbc6ed4f37404923", "tree": "29bbceccd926e4b9bf0d7e7e7778e6bf5c012cc1", "parents": [ "c0f62edd400115e54c52692c1dc6f5bf58ea0ba6", "404ba5d7bb958d3d788bdaa0debc0bdf60f13ffe", "0520bd8438f18f2b1b2af5fd1c4ecc070a1bf837" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 18:58:00 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 18:58:00 2010 -0700" }, "message": "Merge branches \u0027x86-fixes-for-linus\u0027 and \u0027x86-uv-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, alternative: Call stop_machine_text_poke() on all cpus\n x86-32: Restore irq stacks NUMA-aware allocations\n x86, memblock: Fix early_node_mem with big reserved region.\n\n* \u0027x86-uv-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, uv: More Westmere support on SGI UV\n x86, uv: Enable Westmere support on SGI UV\n" }, { "commit": "c0f62edd400115e54c52692c1dc6f5bf58ea0ba6", "tree": "6fc905c97653574c71e07bffee33c9a43318d7bb", "parents": [ "e4dd65496f6d09cbf4372d69b3b079848fe82ce3", "4ee7a6c2d1e8679fc557ee5af1aee96393acb1dc", "17f52ed7358dc54e5534f9ad495e90306c68cfcf" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 18:57:04 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 18:57:04 2010 -0700" }, "message": "Merge branches \u0027msm-fixes\u0027 and \u0027msm-video\u0027 of git://codeaurora.org/quic/kernel/dwalker/linux-msm\n\n* \u0027msm-fixes\u0027 of git://codeaurora.org/quic/kernel/dwalker/linux-msm:\n msm: Kconfig: drop unused config options\n msm: fix compile failure when no debug uart is selected\n msm: fix debug-macro.S build failure\n msm: timer: Decrease shift on timer clocksource\n arm: mach-msm: fix error handling in msm_iommu_probe()\n msm: fix Kconfig target board selection\n msm: fix compile failure on struct membank node member\n\n* \u0027msm-video\u0027 of git://codeaurora.org/quic/kernel/dwalker/linux-msm:\n drivers/video/msm/mddi.c: Remove multiple KERN_\u003clevel\u003e uses\n drivers: msm: video: add dev_set_name call\n drivers: video: msm: fix hang on disable_irq\n" }, { "commit": "e4dd65496f6d09cbf4372d69b3b079848fe82ce3", "tree": "529068eb53653fd2d98c9935a6ce04ff1d7da1a9", "parents": [ "44234d0c465d996145e9c821fa28a981f2e8309d", "d7b4e421a5be88f2f5b3cfe9aec638d90c62bc0f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 16:49:34 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 16:49:34 2010 -0700" }, "message": "Merge branch \u0027for-2637/s3c24xx-all\u0027 of git://git.fluff.org/bjdooks/linux\n\n* \u0027for-2637/s3c24xx-all\u0027 of git://git.fluff.org/bjdooks/linux:\n ARM: h1940: add UDA1380 to i2c devices list\n ARM: h1940: Fix backlight and LCD power functions\n ARM: S3C2440: fix boot failure introduced by recent changes in gpiolib\n ARM: S3C2440: various fixes in Kconfig file\n ARM: rx1950: Add UDA1380 to i2c devices list\n ARM: rx1950: Add LEDs support\n ARM: rx1950: Add battery device\n ARM: h1940: Implement mmc_power function\n ARM: h1940: Use gpiolib for latch access\n" }, { "commit": "d7b4e421a5be88f2f5b3cfe9aec638d90c62bc0f", "tree": "d18aa2e45a3175cd65c7d552cb94e50ff46cd7a4", "parents": [ "7c1552d196682f05abaa8e49f81c40a9b6459b67", "bdf5005b738c1542a30b41a83069329313fc61f6" ], "author": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:46:55 2010 +0100" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:46:55 2010 +0100" }, "message": "ARM: Merge for-2637/s3c24xx/misc\n" }, { "commit": "7c1552d196682f05abaa8e49f81c40a9b6459b67", "tree": "c052789b883435159c22708058e1ced9c0597113", "parents": [ "8f08bfd4777a2953d18db756938d90a5b532eb1a", "68730b451b7d44a9e85b76aac2d8c1aa751d38a4" ], "author": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:46:49 2010 +0100" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:46:49 2010 +0100" }, "message": "ARM: Merge for-2637/s3c24xx/h1940\n" }, { "commit": "8f08bfd4777a2953d18db756938d90a5b532eb1a", "tree": "e2baa815636d7e11073ffed2d4cce64ee39e8d9f", "parents": [ "b18cae4224bde7e5a332c19bc99247b2098ea232", "2cc857ffec1e7540155c5ab90e622e5acc28d136" ], "author": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:46:34 2010 +0100" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:46:34 2010 +0100" }, "message": "ARM: Merge for-2637/s3c24xx/rx1950\n" }, { "commit": "68730b451b7d44a9e85b76aac2d8c1aa751d38a4", "tree": "42cd08ee24642a67fe2659bf6285ed4684c13689", "parents": [ "53193dd3ba3c7dfdd7fdf2b068c8f92cc46a5693" ], "author": { "name": "Vasily Khoruzhick", "email": "anarsoul@gmail.com", "time": "Mon Sep 27 09:32:49 2010 +0300" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:45:35 2010 +0100" }, "message": "ARM: h1940: add UDA1380 to i2c devices list\n\nRegister UDA1380 codec during H1940 machine init\n\nSigned-off-by: Vasily Khoruzhick \u003canarsoul@gmail.com\u003e\nSigned-off-by: Ben Dooks \u003cben-linux@fluff.org\u003e\n" }, { "commit": "53193dd3ba3c7dfdd7fdf2b068c8f92cc46a5693", "tree": "9ee120b4bca209047fb37d4a4efc6a1b9ffb7df6", "parents": [ "48cd65a6a020292e1ab5d0f5ba96571c858964e6" ], "author": { "name": "Vasily Khoruzhick", "email": "anarsoul@gmail.com", "time": "Mon Sep 27 09:28:00 2010 +0300" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:45:28 2010 +0100" }, "message": "ARM: h1940: Fix backlight and LCD power functions\n\nCurrent implementation of LCD and backlight power control functions\nis not complete, as result PDA consumes power in suspend.\nFix this issue by managing state of some latch bits, just like\nWinMobile does.\n\nSigned-off-by: Vasily Khoruzhick \u003canarsoul@gmail.com\u003e\nSigned-off-by: Ben Dooks \u003cben-linux@fluff.org\u003e\n" }, { "commit": "404ba5d7bb958d3d788bdaa0debc0bdf60f13ffe", "tree": "0605498ad8f207de58bfefa5b4b62ad79f91be8f", "parents": [ "5c1eb08936693cd78c71164c8bea0b086ae72c67" ], "author": { "name": "Jason Baron", "email": "jbaron@redhat.com", "time": "Thu Oct 28 11:20:27 2010 -0400" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Oct 29 16:42:58 2010 -0700" }, "message": "x86, alternative: Call stop_machine_text_poke() on all cpus\n\nCurrently, text_poke_smp() passes a NULL as the third argument to\n__stop_machine(), which will only run stop_machine_text_poke()\non 1 cpu. Change NULL -\u003e cpu_online_mask, as stop_machine_text_poke()\nis intended to be run on all cpus.\n\nI actually didn\u0027t notice any problems with stop_machine_text_poke()\nonly being called on 1 cpu, but found this via code inspection.\n\nSigned-off-by: Jason Baron \u003cjbaron@redhat.com\u003e\nLKML-Reference: \u003c20101028152026.GB2875@redhat.com\u003e\nAcked-by: Mathieu Desnoyers \u003cmathieu.desnoyers@efficios.com\u003e\nAcked-by: Masami Hiramatsu \u003cmasami.hiramatsu.pt@hitachi.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n\n" }, { "commit": "bdf5005b738c1542a30b41a83069329313fc61f6", "tree": "c6d0245a2d9e0dec4028a059e6281e8fbc75c807", "parents": [ "e33ffd4d28a2d516e32126ebabf4d9e930254cf5" ], "author": { "name": "Abdoulaye Walsimou Gaye", "email": "awg@embtoolkit.org", "time": "Sat Oct 16 13:55:52 2010 +0200" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:21:37 2010 +0100" }, "message": "ARM: S3C2440: fix boot failure introduced by recent changes in gpiolib\n\nRecent changes in s3c gpio break mini2440 board and may be others.\nThe problem is that mach-mini2440.c: mini2440_init()\n(where we call s3c_gpio_setpull()) is called before s3c2440.c: s3c2440_init()\n(where we initialize s3c24xx_gpiocfg_default.set_pull function pointer).\nThis causes dereferencing of NULL pointer at boot time and a kernel panic.\n\nSigned-off-by: Abdoulaye Walsimou Gaye \u003cawg@embtoolkit.org\u003e\n\nCc: linux-arm-kernel@lists.infradead.org\nCc: linux-samsung-soc@vger.kernel.org\nSigned-off-by: Ben Dooks \u003cben-linux@fluff.org\u003e\n" }, { "commit": "e33ffd4d28a2d516e32126ebabf4d9e930254cf5", "tree": "45751151076bfb9291d48abbc63c069853d3520f", "parents": [ "b18cae4224bde7e5a332c19bc99247b2098ea232" ], "author": { "name": "Abdoulaye Walsimou Gaye", "email": "awg@embtoolkit.org", "time": "Sat Oct 16 13:55:51 2010 +0200" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Sat Oct 30 00:21:28 2010 +0100" }, "message": "ARM: S3C2440: various fixes in Kconfig file\n\n* kconfig symbols defined in arch/arm/mach-s3c2440/Kconfig are only available\n when ARCH_S3C2410 is selected, so no need to make some of them depend\n on ARCH_S3C2410.\n* fix CPU_S3C24405B typo in \"config S3C2440_DMA\".\n* mini2440: remove unconditionally select of SND_S3C24XX_SOC_S3C24XX_UDA134X.\nThose fixes avoid the following warnings at make time:\n\nscripts/kconfig/qconf arch/arm/Kconfig\nwarning: (MACH_MINI2440 \u0026\u0026 ARCH_S3C2410) selects SND_S3C24XX_SOC_S3C24XX_UDA134X\nwhich has unmet direct dependencies (SND_S3C24XX_SOC \u0026\u0026 ARCH_S3C2410)\nwarning: (CPU_S3C2440 \u0026\u0026 ARCH_S3C2410 \u0026\u0026 S3C2410_DMA) selects S3C2440_DMA which\nhas unmet direct dependencies (ARCH_S3C2410 \u0026\u0026 CPU_S3C24405B)\nwarning: (CPU_S3C2440 \u0026\u0026 ARCH_S3C2410 || CPU_S3C2442 \u0026\u0026 ARCH_S3C2410)\nselects CPU_S3C244X which has unmet direct dependencies (!ARCH_S3C2410)\n\nSigned-off-by: Abdoulaye Walsimou Gaye \u003cawg@embtoolkit.org\u003e\n\nCc: linux-arm-kernel@lists.infradead.org\nCc: linux-samsung-soc@vger.kernel.org\nSigned-off-by: Ben Dooks \u003cben-linux@fluff.org\u003e\n" }, { "commit": "4ee7a6c2d1e8679fc557ee5af1aee96393acb1dc", "tree": "f36c2ce21352334dae3832ace9693a38d3ff8cba", "parents": [ "06125ff051d535eaa993d83db66ab893248861af" ], "author": { "name": "Daniel Walker", "email": "dwalker@codeaurora.org", "time": "Wed Oct 27 13:10:34 2010 -0700" }, "committer": { "name": "Daniel Walker", "email": "dwalker@codeaurora.org", "time": "Fri Oct 29 15:56:17 2010 -0700" }, "message": "msm: Kconfig: drop unused config options\n\nThese two config options don\u0027t exist, and aren\u0027t ever going to.\nSo I simply delete them.\n\nSigned-off-by: Daniel Walker \u003cdwalker@codeaurora.org\u003e\n" }, { "commit": "06125ff051d535eaa993d83db66ab893248861af", "tree": "dbeca335816d398e81983976b8e3a1b552f149a8", "parents": [ "bcd72c3e0aff4b68d648d37ece423f2ccaf95337" ], "author": { "name": "Daniel Walker", "email": "dwalker@codeaurora.org", "time": "Wed Oct 27 13:04:58 2010 -0700" }, "committer": { "name": "Daniel Walker", "email": "dwalker@codeaurora.org", "time": "Fri Oct 29 15:56:16 2010 -0700" }, "message": "msm: fix compile failure when no debug uart is selected\n\nIf the board has a debug uart the user is given a choice of which\nuart to use. The user can also select NONE, which means not to use one.\nIn most of our header files when NONE is selected nothing is defined\nfor MSM_DEBUG_UART_PHYS or MSM_DEBUG_UART_BASE. This causes a compile\nfailure in debug-macro.S which expect something to be defined there.\n\nExample of the failure,\n\narch/arm/kernel/built-in.o: In function `hexbuf\u0027:\nlinux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_PHYS\u0027\nlinux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_BASE\u0027\n\nThis fixes the compile failure by adding an ifdef to debug-macro.S\nthat removes all the debug uart code in the case of NONE.\n\nSigned-off-by: Daniel Walker \u003cdwalker@codeaurora.org\u003e\n" }, { "commit": "bcd72c3e0aff4b68d648d37ece423f2ccaf95337", "tree": "0ea156dfcd502436dc91c759396086a295bf71c0", "parents": [ "6f9419619ef6de9d7781c1a312cf6099e5b44789" ], "author": { "name": "Daniel Walker", "email": "dwalker@codeaurora.org", "time": "Wed Oct 27 15:25:59 2010 -0700" }, "committer": { "name": "Daniel Walker", "email": "dwalker@codeaurora.org", "time": "Fri Oct 29 15:56:04 2010 -0700" }, "message": "msm: fix debug-macro.S build failure\n\nOriginally there was an ifdef case to handle when no debug uart\nwas selected. In commit 0ea1293009826da45e1019f45dfde1e557bb30df\nthat case was removed which causes the following build failure,\n\nlinux-2.6/arch/arm/kernel/debug.S: Assembler messages:\nlinux-2.6/arch/arm/kernel/debug.S:174: Error: bad instruction `addruart r1,r2\u0027\nlinux-2.6/arch/arm/kernel/debug.S:176: Error: bad instruction `waituart r2,r3\u0027\nlinux-2.6/arch/arm/kernel/debug.S:177: Error: bad instruction `senduart r1,r3\u0027\nlinux-2.6/arch/arm/kernel/debug.S:178: Error: bad instruction `busyuart r2,r3\u0027\nlinux-2.6/arch/arm/kernel/debug.S:190: Error: bad instruction `addruart r1,r2\u0027\n\nThis is a partial revert to add back the case which was removed with\ntwo caveats. First the API for the addruart macro was updated, and\nthe new addruart case now return 0xfff00000 so that a know IO mapping\nis created instead of a random one.\n\nCc: Jeremy Kerr \u003cjeremy.kerr@canonical.com\u003e\nCc: Lorenzo Pieralisi \u003clorenzo.pieralisi@arm.com\u003e\nCc: Jason Wang \u003cjason77.wang@gmail.com\u003e\nCc: Tony Lindgren \u003ctony@atomide.com\u003e\nCc: Nicolas Pitre \u003cnico@fluxnic.net\u003e\nCc: Russell King - ARM Linux \u003clinux@arm.linux.org.uk\u003e\nSigned-off-by: Daniel Walker \u003cdwalker@codeaurora.org\u003e\n" }, { "commit": "1e431a9d6478940c0b5fcfa1c17a336fc0683409", "tree": "ce6b454ecbad4f535b9a18ef8605f8218a409ee6", "parents": [ "75d73126fd490e26a9bdfc2338ca068e71563e0b", "ff10b88b5a05c8f1646dd15fb9f6093c1384ff6d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 11:49:38 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 11:49:38 2010 -0700" }, "message": "Merge branch \u0027for_linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb\n\n* \u0027for_linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb:\n kgdb,ppc: Individual register get/set for ppc\n kgdbts: prevent re-entry to kgdbts before it unregisters\n debug_core,x86,blackfin: Clean up hw debug disable API\n kdb: Fix early debugging crash regression\n kgdb,arm: fix register dump\n kdb: fix per_cpu command to remove supress mask\n kdb: Add kdb kernel module sample\n" }, { "commit": "45f81b1c96d9793e47ce925d257ea693ce0b193e", "tree": "2260824b11e36d3f392d1795611795541dfc89d0", "parents": [ "2d1d7126bbde53989f1d7de174816c123bb7ecb0" ], "author": { "name": "Steven Rostedt", "email": "srostedt@redhat.com", "time": "Fri Oct 29 12:33:43 2010 -0400" }, "committer": { "name": "Steven Rostedt", "email": "rostedt@goodmis.org", "time": "Fri Oct 29 14:45:29 2010 -0400" }, "message": "jump label: Add work around to i386 gcc asm goto bug\n\nOn i386 (not x86_64) early implementations of gcc would have a bug\nwith asm goto causing it to produce code like the following:\n\n(This was noticed by Peter Zijlstra)\n\n 56 pushl 0\n 67 nopl jmp 0x6f\n popl\n jmp 0x8c\n\n 6f mov\n test\n je 0x8c\n\n 8c mov\n call *(%esp)\n\nThe jump added in the asm goto skipped over the popl that matched\nthe pushl 0, which lead up to a quick crash of the system when\nthe jump was enabled. The nopl is defined in the asm goto () statement\nand when tracepoints are enabled, the nop changes to a jump to the label\nthat was specified by the asm goto. asm goto is suppose to tell gcc that\nthe code in the asm might jump to an external label. Here gcc obviously\nfails to make that work.\n\nThe bug report for gcc is here:\n\n http://gcc.gnu.org/bugzilla/show_bug.cgi?id\u003d46226\n\nThe bug only appears on x86 when not compiled with\n-maccumulate-outgoing-args. This option is always set on x86_64 and it\nis also the work around for a function graph tracer i386 bug.\n(See commit: 746357d6a526d6da9d89a2ec645b28406e959c2e)\nThis explains why the bug only showed up on i386 when function graph\ntracer was not enabled.\n\nThis patch now adds a CONFIG_JUMP_LABEL option that is default\noff instead of using jump labels by default. When jump labels are\nenabled, the -maccumulate-outgoing-args will be used (causing a\nslightly larger kernel image on i386). This option will exist\nuntil we have a way to detect if the gcc compiler in use is safe\nto use on all configurations without the work around.\n\nNote, there exists such a test, but for now we will keep the enabling\nof jump label as a manual option.\n\nArchs that know the compiler is safe with asm goto, may choose to\nselect JUMP_LABEL and enable it by default.\n\nReported-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nCause-discovered-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Jason Baron \u003cjbaron@redhat.com\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: Mathieu Desnoyers \u003cmathieu.desnoyers@efficios.com\u003e\nCc: Masami Hiramatsu \u003cmasami.hiramatsu.pt@hitachi.com\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Richard Henderson \u003crth@redhat.com\u003e\nLKML-Reference: \u003c1288028746.3673.11.camel@laptop\u003e\nSigned-off-by: Steven Rostedt \u003crostedt@goodmis.org\u003e\n" }, { "commit": "ff10b88b5a05c8f1646dd15fb9f6093c1384ff6d", "tree": "e620eda79f8062dc858a0429096ec7d0332ce760", "parents": [ "4dacd5c073150cd78dfb6004cbfa71986f0258a4" ], "author": { "name": "Dongdong Deng", "email": "dongdong.deng@windriver.com", "time": "Wed Oct 27 21:47:00 2010 -0500" }, "committer": { "name": "Jason Wessel", "email": "jason.wessel@windriver.com", "time": "Fri Oct 29 13:14:42 2010 -0500" }, "message": "kgdb,ppc: Individual register get/set for ppc\n\ncommit 534af1082329392bc29f6badf815e69ae2ae0f4c(kgdb,kdb: individual\nregister set and and get API) introduce dbg_get_reg/dbg_set_reg API\nfor individual register get and set.\n\nThis patch implement those APIs for ppc.\n\nSigned-off-by: Dongdong Deng \u003cdongdong.deng@windriver.com\u003e\nSigned-off-by: Jason Wessel \u003cjason.wessel@windriver.com\u003e\n" }, { "commit": "d7ba979d45272385ce0fdf141d922e61ff48e07b", "tree": "713ffb5f2e079c6abdeb15cd4830a014df12db9b", "parents": [ "578bd4dfcda63d2ef15f025f1d5d55c0e56b9660" ], "author": { "name": "Dongdong Deng", "email": "dongdong.deng@windriver.com", "time": "Wed Aug 18 06:02:00 2010 -0500" }, "committer": { "name": "Jason Wessel", "email": "jason.wessel@windriver.com", "time": "Fri Oct 29 13:14:41 2010 -0500" }, "message": "debug_core,x86,blackfin: Clean up hw debug disable API\n\nThe kgdb_disable_hw_debug() was an architecture specific function for\ndisabling all hardware breakpoints on a per cpu basis when entering\nthe debug core.\n\nThis patch will remove the weak function kdbg_disable_hw_debug() and\nchange it into a call back which lives with the rest of hw breakpoint\ncall backs in struct kgdb_arch.\n\nSigned-off-by: Dongdong Deng \u003cdongdong.deng@windriver.com\u003e\nSigned-off-by: Jason Wessel \u003cjason.wessel@windriver.com\u003e\n" }, { "commit": "834b2964b7ab047610da038e42d61dc8dac6339a", "tree": "8783b4c106198e4e76a75a71f415a76906819f4b", "parents": [ "931ea24819f2bd40cca2dc214558bfcc3c91549e" ], "author": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Tue Oct 26 12:49:00 2010 -0500" }, "committer": { "name": "Jason Wessel", "email": "jason.wessel@windriver.com", "time": "Fri Oct 29 13:14:40 2010 -0500" }, "message": "kgdb,arm: fix register dump\n\nDBG_MAX_REG_NUM incorrectly had the number of indices in the GDB regs\narray rather than the number of registers, leading to an oops when the\n\"rd\" command is used in KDB.\n\nCc: stable@kernel.org\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\nSigned-off-by: Jason Wessel \u003cjason.wessel@windriver.com\u003e\n" }, { "commit": "b77d643ced576bdd1e918aebda869de74696cde9", "tree": "bb5d708f4bbb48461923a28e63a8cf8bdd477dd7", "parents": [ "b4020c1b198c0f0c0b0ff0cfdd824a26b93edd6f", "64575f918f3279d8487cf670dbefa956ce16a526" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 11:13:10 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 11:13:10 2010 -0700" }, "message": "Merge branch \u0027upstream\u0027 of git://git.linux-mips.org/pub/scm/upstream-linus\n\n* \u0027upstream\u0027 of git://git.linux-mips.org/pub/scm/upstream-linus: (46 commits)\n ftrace/MIPS: Enable C Version of recordmcount\n ftrace/MIPS: Add module support for C version of recordmcount\n ftrace/MIPS: Add MIPS64 support for C version of recordmcount\n MIPS: Make TASK_SIZE reflect proper size for both 32 and 64 bit processes.\n MIPS: Allow UserLocal on MIPS_R1 processors\n MIPS: Honor L2 bypass bit\n MIPS: Add BMIPS CP0 register definitions\n MIPS: Add BMIPS processor types to Kconfig\n MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code\n MIPS: Add support for hardware performance events (mipsxx)\n MIPS: Perf-events: Add callchain support\n MIPS: add support for hardware performance events (skeleton)\n MIPS: add support for software performance events\n MIPS: define local_xchg from xchg_local to atomic_long_xchg\n MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant\n MIPS: AR7: Initialize GPIO earlier\n MIPS: Add platform device and Kconfig for Octeon USB EHCI / OHCI\n USB: Add EHCI and OHCH glue for OCTEON II SOCs.\n MIPS: Octeon: Add register definitions for EHCI / OHCI USB glue logic.\n MIPS: Octeon: Apply CN63XXP1 errata workarounds.\n ...\n" }, { "commit": "64575f918f3279d8487cf670dbefa956ce16a526", "tree": "eb870d0d7cb9adbfbb6c47ad77c0a58611d00947", "parents": [ "412910cd046c1f14f0fba9c0aec401d47e57dcd1" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Wed Oct 27 18:59:09 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:56 2010 +0100" }, "message": "ftrace/MIPS: Enable C Version of recordmcount\n\nSelects HAVE_C_RECORDMCOUNT to use the C version of the recordmcount\nintead of the old Perl Version of recordmcount.\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nLKML-Reference: \u003cbb99009a9ac79d3f55a8c8bf1c8bd2bc0e1f160e.1288176026.git.wuzhangjin@gmail.com\u003e\nSigned-off-by: Steven Rostedt \u003crostedt@goodmis.org\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "949e51bea342da838be5295628e4a7ada8bae833", "tree": "8967391768d4da3a99a2adf85e0834e0fa7a2009", "parents": [ "18d693b3598fdebdd5c65a613221793456a7ce45" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 14 11:32:33 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:53 2010 +0100" }, "message": "MIPS: Make TASK_SIZE reflect proper size for both 32 and 64 bit processes.\n\nThe TASK_SIZE macro should reflect the size of a user process virtual\naddress space. Previously for 64-bit kernels, this was not the case.\nThe immediate cause of pain was in\nhugetlbfs/inode.c:hugetlb_get_unmapped_area() where 32-bit processes\ntrying to mmap a huge page would be served a page with an address\noutside of the 32-bit address range. But there are other uses of\nTASK_SIZE in the kernel as well that would like an accurate value.\n\nThe new definition is nice because it now makes TASK_SIZE and\nTASK_SIZE_OF() yield the same value for any given process.\n\nFor 32-bit kernels there should be no change, although I did factor\nout some code in asm/processor.h that became identical for the 32-bit and\n64-bit cases.\n\n__UA_LIMIT is now set to ~((1 \u003c\u003c SEGBITS) - 1) for 64-bit kernels.\nThis should eliminate the possibility of getting a\nAddressErrorException in the kernel for addresses that pass the\naccess_ok() test.\n\nWith the patch applied, I can still run o32, n32 and n64 processes,\nand have an o32 shell fork/exec both n32 and n64 processes.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1701/\n" }, { "commit": "18d693b3598fdebdd5c65a613221793456a7ce45", "tree": "bdec7d15eb2ba774292358b2a617965ab3ff4530", "parents": [ "ea31a6b203710c03d1fc025377a19572e620588a" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Sat Oct 16 14:22:38 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:53 2010 +0100" }, "message": "MIPS: Allow UserLocal on MIPS_R1 processors\n\nSome MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate\nprograms that make extensive use of thread-local storage. Therefore,\nsetting up the HWRENA register should not depend on cpu_has_mips_r2.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\n" }, { "commit": "ea31a6b203710c03d1fc025377a19572e620588a", "tree": "b9a39c79e7080b9790936618a704439d057cb78a", "parents": [ "af231172634b5c0923fa7484a043fadcc07e899e" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Wed Oct 20 20:05:42 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:52 2010 +0100" }, "message": "MIPS: Honor L2 bypass bit\n\nOn many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates\nthat the L2 cache is disabled and therefore Linux should not attempt\nto use it.\n\n[Ralf: Moved the code added by Kevin\u0027s original patch into a separate\nfunction that can easily be replaced for platforms that need more a\ndifferent probe.]\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: linux-mips@linux-mips.org\u003e\nCc: \u003clinux-kernel@vger.kernel.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1723/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "af231172634b5c0923fa7484a043fadcc07e899e", "tree": "61116cff04ff8a8657dca176b04ec35090eac14e", "parents": [ "c1c0c461c6e5f55add64012249cd6e2c8b3e62a9" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Sat Oct 16 14:22:32 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:52 2010 +0100" }, "message": "MIPS: Add BMIPS CP0 register definitions\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: mbizon@freebox.fr\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nTested-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1708/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\n" }, { "commit": "c1c0c461c6e5f55add64012249cd6e2c8b3e62a9", "tree": "03e5a608c038f8c86da8b69d9dfef4874ba379df", "parents": [ "602977b0d672687909b0cb0542ede134ed6ef858" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Sun Oct 17 10:56:53 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:51 2010 +0100" }, "message": "MIPS: Add BMIPS processor types to Kconfig\n\n[v2: add \"VIPER\" marketing name for BMIPS4350]\n\nAdd processor feature definitions for BMIPS3300, BMIPS4350, BMIPS4380,\nand BMIPS5000.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: mbizon@freebox.fr\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nTested-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1716/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\n" }, { "commit": "602977b0d672687909b0cb0542ede134ed6ef858", "tree": "8f40b3cfbf2cc32a445a69a548837521fcdfd7d6", "parents": [ "3a9ab99e0341558e451327fbbfc39b0d3cff7e9a" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Sat Oct 16 14:22:30 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:50 2010 +0100" }, "message": "MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code\n\nBMIPS processor cores are used in 50+ different chipsets spread across\n5+ product lines. In many cases the chipsets do not share the same\nperipheral register layouts, the same register blocks, the same\ninterrupt controllers, the same memory maps, or much of anything else.\n\nBut, across radically different SoCs that share nothing more than the\nsame BMIPS CPU, a few things are still mostly constant:\n\nSMP operations\nAccess to performance counters\nDMA cache coherency quirks\nCache and memory bus configuration\n\nSo, it makes sense to treat each BMIPS processor type as a generic\n\"building block,\" rather than tying it to a specific SoC. This makes it\neasier to support a large number of BMIPS-based chipsets without\nunnecessary duplication of code, and provides the infrastructure needed\nto support BMIPS-proprietary features.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: mbizon@freebox.fr\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nTested-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1706/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\n" }, { "commit": "3a9ab99e0341558e451327fbbfc39b0d3cff7e9a", "tree": "95b25a87dac85f8633f0b31575f96c528815ddfb", "parents": [ "7e788d967c092343cca773542565c362991c87c0" ], "author": { "name": "Deng-Cheng Zhu", "email": "dengcheng.zhu@gmail.com", "time": "Tue Oct 12 19:37:24 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:49 2010 +0100" }, "message": "MIPS: Add support for hardware performance events (mipsxx)\n\nThis patch adds the mipsxx Perf-events support based on the skeleton.\nGeneric hardware events and cache events are now fully implemented for\nthe 24K/34K/74K/1004K cores. To support other cores in mipsxx (such as\nR10000/SB1), the generic hardware event tables and cache event tables\nneed to be filled out. To support other CPUs which have different PMU\nthan mipsxx, such as RM9000 and LOONGSON2, the additional files\nperf_event_$cpu.c need to be created.\n\nRaw event is an important part of Perf-events. It helps the user collect\nperformance data for events that are not listed as the generic hardware\nevents and cache events but ARE supported by the CPU\u0027s PMU.\n\nThis patch also adds this feature for mipsxx 24K/34K/74K/1004K. For how to\nuse it, please refer to processor core software user\u0027s manual and the\ncomments for mipsxx_pmu_map_raw_event() for more details.\n\nPlease note that this is a \"precise\" implementation, which means the\nkernel will check whether the requested raw events are supported by this\nCPU and which hardware counters can be assigned for them.\n\nTo test the functionality of Perf-event, you may want to compile the tool\n\"perf\" for your MIPS platform. You can refer to the following URL:\nhttp://www.linux-mips.org/archives/linux-mips/2010-10/msg00126.html\n\nYou also need to customize the CFLAGS and LDFLAGS in tools/perf/Makefile\nfor your libs, includes, etc.\n\nIn case you encounter the boot failure in SMVP kernel on multi-threading\nCPUs, you may take a look at:\nhttp://www.linux-mips.org/git?p\u003dlinux-mti.git;a\u003dcommitdiff;h\u003d5460815027d802697b879644c74f0e8365254020\n\nSigned-off-by: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nTo: linux-mips@linux-mips.org\nCc: a.p.zijlstra@chello.nl\nCc: paulus@samba.org\nCc: mingo@elte.hu\nCc: acme@redhat.com\nCc: jamie.iles@picochip.com\nCc: ddaney@caviumnetworks.com\nCc: matt@console-pimps.org\nPatchwork: https://patchwork.linux-mips.org/patch/1689/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n create mode 100644 arch/mips/kernel/perf_event_mipsxx.c\n" }, { "commit": "7e788d967c092343cca773542565c362991c87c0", "tree": "88c3ef91aba02a7dae93ccc674f5bed461c16d0d", "parents": [ "14f7001284185bffeb796a181664906f7160f593" ], "author": { "name": "Deng-Cheng Zhu", "email": "dengcheng.zhu@gmail.com", "time": "Tue Oct 12 19:37:23 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:49 2010 +0100" }, "message": "MIPS: Perf-events: Add callchain support\n\nAdds callchain support for MIPS Perf-events. For more info on this feature,\nplease refer to tools/perf/Documentation/perf-report.txt and\ntools/perf/design.txt.\n\nCurrently userspace callchain data is not recorded, because we do not have\na safe way to do this.\n\nSigned-off-by: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nAcked-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nCc: a.p.zijlstra@chello.nl\nCc: paulus@samba.org\nCc: mingo@elte.hu\nCc: acme@redhat.com\nCc: jamie.iles@picochip.com\nCc: matt@console-pimps.org\nPatchwork: https://patchwork.linux-mips.org/patch/1690/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "14f7001284185bffeb796a181664906f7160f593", "tree": "5524b4a8bfdee982b2d5db68053ae0a8dd599b57", "parents": [ "7f788d2d53085815d474559cd51ef1f38b0a9bb8" ], "author": { "name": "Deng-Cheng Zhu", "email": "dengcheng.zhu@gmail.com", "time": "Tue Oct 12 19:37:22 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:48 2010 +0100" }, "message": "MIPS: add support for hardware performance events (skeleton)\n\nThis patch provides the skeleton of the HW perf event support. To enable\nthis feature, we can not choose the SMTC kernel; Oprofile should be\ndisabled; kernel performance events be selected. Then we can enable it in\nKernel type menu.\n\nOprofile for MIPS platforms initializes irq at arch init time. Currently\nwe do not change this logic to allow PMU reservation.\n\nIf a platform has EIC, we can use the irq base and perf counter irq offset\ndefines for the interrupt controller in specific init_hw_perf_events().\n\nBased on this skeleton patch, the 3 different kinds of MIPS PMU, namely,\nmipsxx/loongson2/rm9000, can be supported by adding corresponding lower\nlevel C files at the bottom. The suggested names of these files are\nperf_event_mipsxx.c/perf_event_loongson2.c/perf_event_rm9000.c. So, for\nexample, we can do this by adding \"#include perf_event_mipsxx.c\" at the\nbottom of perf_event.c.\n\nIn addition, PMUs with 64bit counters are also considered in this patch.\n\nSigned-off-by: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nTo: linux-mips@linux-mips.org\nCc: a.p.zijlstra@chello.nl\nCc: paulus@samba.org\nCc: mingo@elte.hu\nCc: acme@redhat.com\nCc: jamie.iles@picochip.com\nCc: ddaney@caviumnetworks.com\nCc: matt@console-pimps.org\nPatchwork: https://patchwork.linux-mips.org/patch/1688/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7f788d2d53085815d474559cd51ef1f38b0a9bb8", "tree": "32c2b6af15da818a02502a678225ff4de754b542", "parents": [ "6dbd972850c092e50e10bd14a3324e2abe88997a" ], "author": { "name": "Deng-Cheng Zhu", "email": "dengcheng.zhu@gmail.com", "time": "Tue Oct 12 19:37:21 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:48 2010 +0100" }, "message": "MIPS: add support for software performance events\n\nSoftware events are required as part of the measurable stuff by the\nLinux performance counter subsystem. Here is the list of events added by\nthis patch:\nPERF_COUNT_SW_PAGE_FAULTS\nPERF_COUNT_SW_PAGE_FAULTS_MIN\nPERF_COUNT_SW_PAGE_FAULTS_MAJ\nPERF_COUNT_SW_ALIGNMENT_FAULTS\nPERF_COUNT_SW_EMULATION_FAULTS\n\nSigned-off-by: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nTo: linux-mips@linux-mips.org\nCc: a.p.zijlstra@chello.nl\nCc: paulus@samba.org\nCc: mingo@elte.hu\nCc: acme@redhat.com\nCc: jamie.iles@picochip.com\nAcked-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nReviewed-by: Matt Fleming \u003cmatt@console-pimps.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1686/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "6dbd972850c092e50e10bd14a3324e2abe88997a", "tree": "99445160e479bdab166672d9cd120c0dc7634f0a", "parents": [ "238dd317f74250983aefbde6dc0a1f345a717993" ], "author": { "name": "Deng-Cheng Zhu", "email": "dengcheng.zhu@gmail.com", "time": "Tue Oct 12 19:37:20 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:47 2010 +0100" }, "message": "MIPS: define local_xchg from xchg_local to atomic_long_xchg\n\nPerf-events is now using local_t helper functions internally. There is a\nuse of local_xchg(). On MIPS, this is defined to xchg_local() which is\nmissing in asm/system.h. This patch re-defines local_xchg() in asm/local.h\nto atomic_long_xchg(). Then Perf-events can pass the build.\n\nSigned-off-by: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nTo: linux-mips@linux-mips.org\nCc: a.p.zijlstra@chello.nl\nCc: paulus@samba.org\nCc: mingo@elte.hu\nCc: acme@redhat.com\nCc: jamie.iles@picochip.com\nCc: ddaney@caviumnetworks.com\nCc: matt@console-pimps.org\nPatchwork: https://patchwork.linux-mips.org/patch/1687/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "238dd317f74250983aefbde6dc0a1f345a717993", "tree": "7ba6759dbb6e5b2639666fb8b6a0b02dac55a61c", "parents": [ "3bc6968adc7b1926f4582a33a33ad42d9b302ce0" ], "author": { "name": "Florian Fainelli", "email": "florian@openwrt.org", "time": "Sun Aug 29 17:08:44 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:46 2010 +0100" }, "message": "MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant\n\nAdd support for Titan TNETV1050,1055,1056,1060 variants. This SoC is almost\ncompletely identical to AR7 except on a few points:\n- a second bank of gpios is available\n- vlynq0 on titan is vlynq1 on ar7\n- different PHY addresses for cpmac0\n\nThis SoC can be found on commercial products like the Linksys WRTP54G\n\nOriginal patch by Xin with improvments by Florian.\n\nSigned-off-by: Xin Zhen \u003cxlonestar2000@aim.com\u003e\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1563/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "3bc6968adc7b1926f4582a33a33ad42d9b302ce0", "tree": "67d37a08a426247ee059391c54bd363e542a4ca8", "parents": [ "340fbb8b12dd24c83b1e8ff094b8e2c218144217" ], "author": { "name": "Florian Fainelli", "email": "florian@openwrt.org", "time": "Sun Aug 29 17:08:41 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:46 2010 +0100" }, "message": "MIPS: AR7: Initialize GPIO earlier\n\nIn order to detect the Titan variant, we must initialize GPIOs earlier since\ndetection relies on some GPIO values to be set.\n\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1562/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "340fbb8b12dd24c83b1e8ff094b8e2c218144217", "tree": "95d9820ba6c2a2645c70ce6b2c2151587f215482", "parents": [ "1643accdaad4625c2877f7ceefa39c1cb3e90117" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 08 14:47:53 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:45 2010 +0100" }, "message": "MIPS: Add platform device and Kconfig for Octeon USB EHCI / OHCI\n\nDeclare that OCTEON reference boards have both OHCI and EHCI.\n\nAdd platform devices for the corresponding hardware.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-usb@vger.kernel.org\nTo: dbrownell@users.sourceforge.net\nPatchwork: http://patchwork.linux-mips.org/patch/1676/\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4169b86324fbefdf137a0bd69154d0e874f2bec2", "tree": "0c1bc321ff38fb9492907dd570ae94dc7acecb4b", "parents": [ "c9941158fd8a539a56b0e8a4740ec1f6beb23ea3" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 08 14:47:51 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:43 2010 +0100" }, "message": "MIPS: Octeon: Add register definitions for EHCI / OHCI USB glue logic.\n\nThe EHCI and OHCI blocks connection to the I/O bus is controlled by\nthese registers.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-usb@vger.kernel.org\nTo: dbrownell@users.sourceforge.net\nPatchwork: http://patchwork.linux-mips.org/patch/1674/\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n create mode 100644 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h\n" }, { "commit": "c9941158fd8a539a56b0e8a4740ec1f6beb23ea3", "tree": "73e3868737061e1d5b0b61c182ea443e3ccd94e3", "parents": [ "468ffde46d429fbd291b0ef43a06afe9c837629f" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:53 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:43 2010 +0100" }, "message": "MIPS: Octeon: Apply CN63XXP1 errata workarounds.\n\nThe CN63XXP1 needs a couple of workarounds to ensure memory is not written\nin unexpected ways.\n\nAll PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We\npass a flag to the assembler to cover compiler generated code, and patch\nuasm for the dynamically generated code.\n\nThe write buffer threshold is reduced to 4.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1672/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4b8bca7028fbed182c78b4f86769e365f2075d8e", "tree": "7dc9523d3ce671e708a2d3d199e768357cb2d07b", "parents": [ "e195aa3039c5c4eeb60c415a7a0f3006d5cdcd3b" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:50 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:41 2010 +0100" }, "message": "MIPS: Octeon: Use I/O clock rate for calculations.\n\nThe I2C and UARTS are clocked by the I/O clock, use its rate for these\ndevices.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1670/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e195aa3039c5c4eeb60c415a7a0f3006d5cdcd3b", "tree": "62817e61ddac8e1212f04cbdbbcf542849fdd8e6", "parents": [ "3b29dadff98887ecdc5db458c2961777016b7b86" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:49 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:40 2010 +0100" }, "message": "MIPS: Octeon: Add octeon_get_io_clock_rate() for cn63xx\n\nStarting with cn63xx Octeon I/O blocks are clocked at a different rate\nthan the CPU. Add a new function octeon_get_io_clock_rate() that\nyields the I/O clock rate.\n\nAlso rearrange octeon_get_clock_rate() to get the value from the saved\nsysinfo structure.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1671/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3b29dadff98887ecdc5db458c2961777016b7b86", "tree": "e9098cfce91940993ab06e55cb33ceac3ef1ba0c", "parents": [ "54954a6d6ba1c2f44375d2992d50f1db56a8857d" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:48 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:39 2010 +0100" }, "message": "MIPS: Octeon: Remove bogus code from octeon_get_clock_rate()\n\nWe can run with any simulator clock rate. Get rid of the code\noverriding it to 6MHz.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1669/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "54954a6d6ba1c2f44375d2992d50f1db56a8857d", "tree": "332959aa2067a9b8819cf9ccd8e735abb78d88cb", "parents": [ "f92a6b0875977132074a696e8d44c95e8472d8ac" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:47 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:38 2010 +0100" }, "message": "MIPS: Octeon: Scale Octeon2 clocks in octeon_init_cvmcount()\n\nThe per-CPU clocks are synchronized from IPD_CLK_COUNT, on cn63XX it must\nbe scaled by the clock frequency ratio.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1667/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f92a6b0875977132074a696e8d44c95e8472d8ac", "tree": "c1c7763f5dcbe637648f3c1b5174609673e30c54", "parents": [ "0e56b3852b1c3be83d1f07a82a86084fabacf789" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:46 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:38 2010 +0100" }, "message": "MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1666/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "0e56b3852b1c3be83d1f07a82a86084fabacf789", "tree": "3120f4ae30ef5933dc0bc9bf4c9f30ff29a155d6", "parents": [ "f8bf7e688c226ba83b35a1547146e296e14b33c7" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:45 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:37 2010 +0100" }, "message": "MIPS: Octeon: Probe for Octeon II CPUs.\n\nThe OCTEON II ISA extends the original OCTEON ISA, so give it its own\n__elf_platform string so optimized libraries can be selected in\nuserspace.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1665/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f8bf7e688c226ba83b35a1547146e296e14b33c7", "tree": "c46c98c7cb29e3c93d4b54c5e8e991e19485b79d", "parents": [ "1584d7f2d58999c00066a4afc4ad95e07b2a04e8" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:44 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:36 2010 +0100" }, "message": "MIPS: Octeon: Handle Octeon II caches.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1664/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1584d7f2d58999c00066a4afc4ad95e07b2a04e8", "tree": "cb451b435fb164ca6582a18a214643329adf87cc", "parents": [ "b8db85b5b5c22236d168eb03a67c2641bf7fa651" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:43 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:35 2010 +0100" }, "message": "MIPS: Add identifiers for Octeon II CPUs.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1662/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b8db85b5b5c22236d168eb03a67c2641bf7fa651", "tree": "a372c5f0db85255ce60f2670a1211f205239d045", "parents": [ "a70b13a9f07ae0e21870ed3e9b6829f556579c5c" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:42 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:35 2010 +0100" }, "message": "MIPS: Octeon: Update L2 Cache code for CN63XX\n\nThe CN63XX has a different L2 cache architecture. Update the helper\nfunctions to reflect this.\n\nSome joining of split lines was also done to improve readability, as\nwell as reformatting of comments.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1663/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "a70b13a9f07ae0e21870ed3e9b6829f556579c5c", "tree": "e15268066b0b35a0791c76568156812b8973dab4", "parents": [ "aa32a955ae46d4117e880417c89a2efcc88579c2" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:41 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:34 2010 +0100" }, "message": "MIPS: Octeon: Add cn63XX to Octeon chip detection macros.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1661/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "aa32a955ae46d4117e880417c89a2efcc88579c2", "tree": "538f1564b70d017b224a423d99bc2a0366c1f745", "parents": [ "b93b2abce497873be97d765b848e0a955d29f200" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:40 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:33 2010 +0100" }, "message": "MIPS: Octeon: Update register definitions for CN63XX chips\n\nThe CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.\n\nJoin some lines back together. This makes some of them exceed 80\ncolumns, but they are uninteresting and this unclutters things.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1668/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b93b2abce497873be97d765b848e0a955d29f200", "tree": "0372a9162b8bbf67f5a5f7367a1da2001ea0292c", "parents": [ "ee71b7d2f834d5e4b3a43001b2fa88743ed71a2c" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:34 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:32 2010 +0100" }, "message": "MIPS: Octeon: Rewrite DMA mapping functions.\n\nAll Octeon chips can support more than 4GB of RAM. Also due to how Octeon\nPCI is setup, even some configurations with less than 4GB of RAM will have\nportions that are not accessible from 32-bit devices.\n\nEnable the swiotlb code to handle the cases where a device cannot directly\ndo DMA. This is a complete rewrite of the Octeon DMA mapping code.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1639/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ee71b7d2f834d5e4b3a43001b2fa88743ed71a2c", "tree": "9d7c5359c42908712a982c14f7dbf2d0b59f9e3c", "parents": [ "48e1fd5a81416a037f5a48120bf281102f2584e2" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:33 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:32 2010 +0100" }, "message": "MIPS: Add a platform hook for swiotlb setup.\n\nThis allows platforms that are using the swiotlb to initialize it.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1638/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "48e1fd5a81416a037f5a48120bf281102f2584e2", "tree": "c5c4bd344f50493bb1d1c36d485300e9061c5aa2", "parents": [ "43e4f7ae4b4a96b5e84f6e1592d2e9353138e88c" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:32 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:31 2010 +0100" }, "message": "MIPS: Convert DMA to use dma-mapping-common.h\n\nUse asm-generic/dma-mapping-common.h to handle all DMA mapping operations\nand establish a default get_dma_ops() that forwards all operations to the\nexisting code.\n\nAugment dev_archdata to carry a pointer to the struct dma_map_ops, allowing\nDMA operations to be overridden on a per device basis. Currently this is\nnever filled in, so the default dma_map_ops are used. A follow-on patch\nsets this for Octeon PCI devices.\n\nAlso initialize the dma_debug system as it is now used if it is configured.\n\nIncludes fixes by Kevin Cernekee \u003ccernekee@gmail.com\u003e.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1637/\nPatchwork: http://patchwork.linux-mips.org/patch/1678/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "43e4f7ae4b4a96b5e84f6e1592d2e9353138e88c", "tree": "c8d00e0169241ac5c8965abb66bfa1ec5a032d4f", "parents": [ "f00e001e9c98c55bdd582f8bc6adcd99335e1a09" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:31 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:30 2010 +0100" }, "message": "MIPS: ip32, ip27, jazz: Make static functions in dma-coherence.h inline.\n\nAny function defined in a header file should be inline. This helps us\navoid \u0027unused\u0027 compiler warnings when we include the files in more\nplaces in subsequent patches.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1636/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f00e001e9c98c55bdd582f8bc6adcd99335e1a09", "tree": "697d20b876e8a5138439feec7c47eccbba10b190", "parents": [ "57575b5c81d9ced1133719bba82a65440371a010" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:30 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:30 2010 +0100" }, "message": "MIPS: Octeon: Select ZONE_DMA32\n\nGive us a nice place to allocate coherent DMA memory for 32-bit devices.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1635/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "57575b5c81d9ced1133719bba82a65440371a010", "tree": "7dac2f6d7e7da5ca3d679b4ae87ebd378065c02b", "parents": [ "cfd570990f863de90a86da73ef7b7d84e5190647" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:29 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:29 2010 +0100" }, "message": "MIPS: Octeon: Adjust top of DMA32 zone.\n\nOn OCTEON, we reserve the last 256MB of 32-bit PCI address space, mapping\nthe RAM in this region at a high DMA address. This makes memory in this\nregion unavailable for 32-bit DMA.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1634/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "cfd570990f863de90a86da73ef7b7d84e5190647", "tree": "3326708ee363f1266041981465076ec1927f0b95", "parents": [ "f12990720c5f9bc156ab3e992d3a1c2f43d8d51a" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:28 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:28 2010 +0100" }, "message": "MIPS: Allow MAX_DMA32_PFN to be overridden.\n\nDMA mapping may reduce the usable physical address range usable for\n32-bit DMA.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1633/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f12990720c5f9bc156ab3e992d3a1c2f43d8d51a", "tree": "8d60223ff01c8f527a904e24489f80271ac70171", "parents": [ "334c86c494b9a5754d4c0ffa3110b18c9771013b" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:27 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:27 2010 +0100" }, "message": "MIPS: Octeon: Set dma_masks for octeon_mgmt device.\n\nThis allows follow-on patches to dma mapping functions to work with\nthe octeon mgmt device..\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1632/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "334c86c494b9a5754d4c0ffa3110b18c9771013b", "tree": "ab0ceed9ff00fd7a0b7bbd194b537f8d1a271aef", "parents": [ "b78807158be93c4756f88b5fc0790863f2690fdc" ], "author": { "name": "From: jiang.adam@gmail.com", "email": "From: jiang.adam@gmail.com", "time": "Fri Aug 27 18:32:06 2010 +0900" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:27 2010 +0100" }, "message": "MIPS: IRQ: Add stackoverflow detection\n\nAdd stackoverflow detection to mips arch\n\nSigned-off-by: Adam Jiang \u003cjiang.adam@gmail.com\u003e\nCc: dmitri.vorobiev@movial.com\nCc: wuzhangjin@gmail.com\nCc: ddaney@caviumnetworks.com\nCc: peterz@infradead.org\nCc: fweisbec@gmail.com\nCc: tj@kernel.org\nCc: tglx@linutronix.de\nCc: mingo@elte.hu\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1559/\nPatchwork: https://patchwork.linux-mips.org/patch/1651/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b78807158be93c4756f88b5fc0790863f2690fdc", "tree": "e741711034cb4773908d4ad78e33e3db99025e4b", "parents": [ "48a26e60c6a5adb0d2f3ba56ea7c5bbb58d2118e" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Wed Sep 08 15:39:14 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:26 2010 +0100" }, "message": "MIPS: Kconfig cleanup\n\narch/mips/Kconfig already sets GENERIC_HARDIRQS_NO__DO_IRQ unconditionally.\nRemove the redundant select from the Loongson Kconfig.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "48a26e60c6a5adb0d2f3ba56ea7c5bbb58d2118e", "tree": "627c04e1a90ff6330c9c1e47164193eb9c2b3170", "parents": [ "c8c5f3fd9f0518cef58c9114513eee61855dec44" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:25 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:25 2010 +0100" }, "message": "MIPS: Remove wait argument of r4k_on_each_cpu\n\nAll callers were passing in 1 anyway.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" } ], "next": "c8c5f3fd9f0518cef58c9114513eee61855dec44" }